tangxifan 609e096b1a [test] added a new test to validate explicit port direction in pin table support		2022-10-17 15:25:19 -07:00
..
basic_reg_test.sh	[test] added a new test to validate explicit port direction in pin table support	2022-10-17 15:25:19 -07:00
basic_reg_yosys_only_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
fpga_bitstream_reg_test.sh	[test] fixed a few bugs	2022-09-29 15:32:31 -07:00
fpga_sdc_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
fpga_spice_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
fpga_verilog_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
iwls_benchmark_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
micro_benchmark_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
quicklogic_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00
vtr_benchmark_reg_test.sh	[test] now regression test script supports remove all run dir through command-line options	2022-05-22 13:15:39 +08:00