OpenFPGA/vpr7_x2p/vpr/SRC
tangxifan ae899f3b11 bug fixed for clock names 2020-02-27 16:51:55 -07:00
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base add new option: duplicate_grid_pin 2019-12-25 19:46:58 -07:00
device add local encoder support in bitstream generation refactoring 2019-10-24 22:49:24 -06:00
fpga_x2p bug fixed for clock names 2020-02-27 16:51:55 -07:00
mrfpga cleaned unused variables 2019-05-13 14:45:02 -06:00
pack cleaned unused variables 2019-05-13 14:45:02 -06:00
place add option to compact tileable routing arch 2019-07-04 17:13:34 -06:00
power bug fixing for memory leaking in allocating pb_rr_graph and power estimation 2019-06-15 12:23:36 -06:00
route reduce some error message to warnings 2019-11-02 00:09:13 -06:00
timing rename customized vpr7 to vpr7 XML to Production 2018-09-17 23:10:45 -06:00
util Scan chain support in directlist 2019-09-27 16:53:00 -06:00
ctags_vpr_src.sh adding XML parsing for design tech of circuit model 2020-01-14 14:10:00 -07:00
main.c make FPGA-X2P to be run conditionally 2019-12-03 13:50:39 -07:00
shell_main.c Update VPR7 X2P with new engine 2019-04-26 12:23:47 -06:00