OpenFPGA/openfpga/test_vpr_arch
tangxifan ff7ea99381 bug fixed in register scan-chain architecture 2020-04-07 17:06:16 -06:00
..
k6_N10_40nm.xml add support on packable/unpackable modes in VPR architecture 2020-04-06 16:07:49 -06:00
k6_N10_tileable_40nm.xml add support on packable/unpackable modes in VPR architecture 2020-04-06 16:07:49 -06:00
k6_frac_N10_40nm.xml add support on packable/unpackable modes in VPR architecture 2020-04-06 16:07:49 -06:00
k6_frac_N10_adder_chain_40nm.xml improve adder chain arch XML to support sequential output for sumout 2020-04-07 15:39:37 -06:00
k6_frac_N10_adder_chain_mem16K_40nm.xml improve adder chain arch XML to support sequential output for sumout 2020-04-07 15:39:37 -06:00
k6_frac_N10_tileable_40nm.xml add support on packable/unpackable modes in VPR architecture 2020-04-06 16:07:49 -06:00
k6_frac_N10_tileable_adder_chain_40nm.xml improve adder chain arch XML to support sequential output for sumout 2020-04-07 15:39:37 -06:00
k6_frac_N10_tileable_adder_chain_mem16K_40nm.xml improve adder chain arch XML to support sequential output for sumout 2020-04-07 15:39:37 -06:00
k6_frac_N10_tileable_adder_chain_mem16K_aib_40nm.xml improve adder chain arch XML to support sequential output for sumout 2020-04-07 15:39:37 -06:00
k6_frac_N10_tileable_adder_chain_mem16K_multi_io_capacity_40nm.xml improve adder chain arch XML to support sequential output for sumout 2020-04-07 15:39:37 -06:00
k6_frac_N10_tileable_adder_chain_mem16K_reduced_io_40nm.xml bug fixed in the example architecture 2020-04-07 16:03:34 -06:00
k6_frac_N10_tileable_adder_chain_wide_mem16K_40nm.xml improve adder chain arch XML to support sequential output for sumout 2020-04-07 15:39:37 -06:00
k6_frac_N10_tileable_adder_register_chain_40nm.xml add test cases using shift registers 2020-04-07 15:09:10 -06:00
k6_frac_N10_tileable_adder_register_scan_chain_40nm.xml bug fixed in register scan-chain architecture 2020-04-07 17:06:16 -06:00
k6_frac_N10_tileable_thru_channel_adder_chain_mem16K_40nm.xml add all the test cases considering tileable, carry chain, direct connection and memory blocks 2020-03-27 13:58:35 -06:00