tangxifan
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aa7f3bef7f
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fixed bugs in configure pb_rr_graph and dependence on testbenches
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2019-08-16 18:20:30 -06:00 |
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tangxifan
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95674c4687
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added Switch Block SubType and SubFs for tileable rr_graph generation
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2019-07-02 10:00:02 -06:00 |
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tangxifan
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c8bf456097
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bug fixing for memory leaking in allocating pb_rr_graph and power estimation
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2019-06-15 12:23:36 -06:00 |
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tangxifan
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21d0cb52bc
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Merge remote-tracking branch 'origin' into tileable_sb
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2019-06-05 13:31:49 -06:00 |
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tangxifan
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0f87ae9886
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support switch block submodule Verilog generation by segments
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2019-06-05 12:56:05 -06:00 |
AurelienUoU
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84fabbd43b
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Fix sdc analysis bug related to virtual nodes + add the option in regression test
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2019-06-05 12:10:28 -06:00 |
Baudouin Chauviere
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2019840d7c
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cleaned unused variables
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2019-05-13 14:45:02 -06:00 |
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tangxifan
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42daadee2f
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critical bug fixing
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2019-04-30 14:30:17 -06:00 |
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tangxifan
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46d44fa42a
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Update VPR7 X2P with new engine
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2019-04-26 12:23:47 -06:00 |