tangxifan
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af09120a52
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[doc] update fig
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2024-09-21 13:35:42 -07:00 |
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tangxifan
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26cda624d3
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[doc] add new syntax about clock network
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2024-09-21 13:31:30 -07:00 |
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tangxifan
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e7ab7a61f1
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[doc] update to use tile name and index when defining clock taps
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2024-08-09 18:09:12 -07:00 |
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tangxifan
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a390aad0b8
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[doc] add new syntax
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2024-07-10 15:07:16 -07:00 |
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tangxifan
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f42884304a
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[doc] update clock network details
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2024-07-09 11:40:41 -07:00 |
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tangxifan
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bf484dbc70
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[doc] add perimeter cb examples on prog clk network
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2024-07-08 21:25:12 -07:00 |
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tangxifan
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e3a258a5ab
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[doc] typo
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2024-07-02 19:31:45 -07:00 |
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tangxifan
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ec7ca1add1
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[doc] add example to example clock network
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2024-07-01 21:41:33 -07:00 |
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tangxifan
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18e2b994ac
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[doc] update syntax on clock network file
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2024-06-30 22:56:31 -07:00 |
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tangxifan
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3fb891094b
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[doc] add new syntax
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2024-06-27 11:02:37 -07:00 |
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tangxifan
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ec1ad94d4a
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[doc] add syntax about internal drivers
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2024-06-25 13:06:47 -07:00 |
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tangxifan
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253e3e0cba
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[doc] add new syntax for clock network
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2024-06-23 17:43:38 -07:00 |
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tangxifan
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081620055b
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[doc] fix broken links in the Clock Network file format
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2023-04-21 13:58:13 +08:00 |
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tangxifan
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509f5eb6dc
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[doc] add documentation about clock network description file
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2023-04-20 17:06:53 +08:00 |