[doc] update clock network details

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tangxifan 2024-07-09 11:40:41 -07:00
parent 5efc9d0e00
commit f42884304a
1 changed files with 4 additions and 0 deletions

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@ -187,6 +187,8 @@ Switch Point Settings
The following syntax are applicable to the XML definition tagged by ``switch_point``.
Note that a number of switch points can be defined under each clock spine ``spine``.
.. note:: Use the coordinate of switch block to define switching points!
.. option:: tap="<string>"
Define which clock spine will be tapped from the current clock spine.
@ -307,6 +309,8 @@ For example,
where all the clock spines of the clock network ``clk_tree_0`` tap the clock pins ``clk`` of tile ``clb`` in a VPR architecture description file:
.. note:: Use the name of ``subtile`` in the ``to_pin`` when there are a number of subtiles in your tile!
.. code-block:: xml
<tile name="clb">