Commit Graph

22 Commits

Author SHA1 Message Date
tangxifan e10cafe0a5 Critical patch on repacking about wire LUT support.
Previously, the wire LUT identification is too naive and does not consider all the cases
2020-04-19 16:42:31 -06:00
tangxifan 32ed609238 update micro benchmark set and regression tests using them 2020-04-19 12:49:07 -06:00
tangxifan cc163081f5 recover mcnc big20 test configuration 2020-04-18 21:06:43 -06:00
tangxifan 2e3a811f4f critical bug fixed in repacking. This is due to depop50% local routing where the same net may be mapped to two different pins in the same pb_graph_pin. Now we restrict the pin searching. But in long term, we should sync the pb_route results to post routing results 2020-04-18 21:04:46 -06:00
tangxifan f76a3090c4 add mcnc big20 test cases and start debugging 2020-04-18 19:25:16 -06:00
tangxifan 2ffd174e6a fixed a bug in single mode FPGA; add arch to regression test; deploy full testbench verification on Travis CI 2020-04-15 15:48:33 -06:00
tangxifan 1e742a3676 add test case on auto-check test benches 2020-04-15 12:52:52 -06:00
tangxifan 7ba3e27371 add duplicated_grid_pin test case to Travis CI 2020-04-12 20:10:51 -06:00
tangxifan e78643f108 add flatten routing test case to Travis CI 2020-04-12 20:06:40 -06:00
tangxifan 59ea0a6ad5 add implicit verilog test case to Travis CI 2020-04-12 20:00:20 -06:00
tangxifan 23aef96d3a add behavioral verilog test case to Travis CI 2020-04-12 19:55:47 -06:00
tangxifan 11e9014542 add notes about debugging the aib FPGA 2020-04-12 19:07:53 -06:00
tangxifan a614e5aad9 add long adder chain to Travis CI 2020-04-12 15:43:19 -06:00
tangxifan f71a85a1d4 add test cases on different routing multiplexer circuit designs to Travis CI 2020-04-12 15:39:45 -06:00
tangxifan 214d98fbcd add register chain and scan chain to Travis CI 2020-04-12 15:28:22 -06:00
tangxifan 148cc74d6a add io test cases to Travis CI 2020-04-12 15:01:47 -06:00
tangxifan da5af8f0e0 try to add aib test case. bug found 2020-04-12 14:54:45 -06:00
tangxifan 28cb412359 add test case of wide BRAM 16k to Travis CI 2020-04-12 14:37:08 -06:00
tangxifan 5d665aa04b reshape bram test case 2020-04-12 14:32:09 -06:00
tangxifan 600a48edc7 add test case of BRAM to Travis CI 2020-04-12 14:27:05 -06:00
tangxifan 2444752de8 add untileable test case to Travis CI 2020-04-12 14:08:24 -06:00
tangxifan d806ad3148 add testcases using openfpga_shell in openfpga_flow 2020-04-12 12:54:21 -06:00