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OpenFPGA
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8179 Commits

Author SHA1 Message Date
tangxifan 0aa9c4c6af
Merge pull request #1764 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2024-07-30 11:42:29 -07:00
github-actions[bot] a2906c4c94 Updated Patch Count 2024-07-30 18:42:13 +00:00
tangxifan 9ef31e6aec
Merge pull request #1762 from lnis-uofu/dependabot/submodules/yosys-c788484 
Bump yosys from `960bca0` to `c788484`
 2024-07-30 11:41:55 -07:00
tangxifan 44f63cb897
Merge pull request #1763 from lnis-uofu/dependabot/submodules/vtr-verilog-to-routing-9eef18c 
Bump vtr-verilog-to-routing from `ddc3ac4` to `9eef18c`
 2024-07-30 11:41:42 -07:00
dependabot[bot] 4d479f9d8c
Bump vtr-verilog-to-routing from `ddc3ac4` to `9eef18c` 
Bumps [vtr-verilog-to-routing](https://github.com/verilog-to-routing/vtr-verilog-to-routing) from `ddc3ac4` to `9eef18c`.
- [Release notes](https://github.com/verilog-to-routing/vtr-verilog-to-routing/releases)
- [Commits](ddc3ac408a...9eef18c4fa)

---
updated-dependencies:
- dependency-name: vtr-verilog-to-routing
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2024-07-30 07:00:11 +00:00
dependabot[bot] 9e59a1fa4a
Bump yosys from `960bca0` to `c788484` 
Bumps [yosys](https://github.com/YosysHQ/yosys) from `960bca0` to `c788484`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](960bca0196...c788484679)

---
updated-dependencies:
- dependency-name: yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2024-07-30 07:00:09 +00:00
chungshien-chai ca48841ae3 Pass in the OpenFPGA root dir 2024-07-29 11:04:03 -07:00
tangxifan 5f45d13bfd
Merge branch 'master' into openfpga-overwrite-bits 2024-07-29 16:22:02 +08:00
tangxifan 7f9dffec89
Merge pull request #1760 from lnis-uofu/dependabot/submodules/yosys-960bca0 
Bump yosys from `610d27d` to `960bca0`
 2024-07-29 16:06:55 +08:00
dependabot[bot] 3c547f2131
Bump yosys from `610d27d` to `960bca0` 
Bumps [yosys](https://github.com/YosysHQ/yosys) from `610d27d` to `960bca0`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](610d27dc1c...960bca0196)

---
updated-dependencies:
- dependency-name: yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2024-07-29 06:09:43 +00:00
chungshien-chai 3e3f089823 Get the filepath using definition under [OpenFPGA_SHELL] 2024-07-28 19:24:48 -07:00
chungshien-chai 0d9f1a3c6b Forward searching the config bit + some minor refactor 2024-07-28 19:12:34 -07:00
chungshien-chai 9882394c8b Use archfpga_throw 2024-07-28 02:53:18 -07:00
chungshien ae5b9a3f72
Merge branch 'lnis-uofu:master' into openfpga-overwrite-bits 2024-07-28 02:52:18 -07:00
chungshien-chai 22d7df5ffb Update doc 2024-07-28 02:40:24 -07:00
chungshien-chai 2a3d69aded Update code based on feedback 2024-07-28 02:37:15 -07:00
tangxifan 4a07a32902
Merge pull request #1759 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2024-07-28 17:04:48 +08:00
github-actions[bot] ec4be3595b Updated Patch Count 2024-07-28 09:04:21 +00:00
tangxifan f5051398b5
Merge pull request #1758 from lnis-uofu/dependabot/submodules/yosys-610d27d 
Bump yosys from `118b282` to `610d27d`
 2024-07-28 17:04:04 +08:00
chungshien-chai cbe9a46f95 Format and update doc 2024-07-28 00:02:20 -07:00
chungshien-chai 933155b08f Update test flow 2024-07-27 23:52:54 -07:00
chungshien-chai 0ff0c3445e Update doc 2024-07-26 13:43:31 -07:00
chungshien-chai fbe5ae6bd3 Update test 2024-07-26 02:18:08 -07:00
chungshien-chai 9641aaf6c4 Update test 2024-07-26 02:17:25 -07:00
chungshien 6974e1b7e7
Merge branch 'master' into openfpga-overwrite-bits 2024-07-26 01:37:57 -07:00
chungshien-chai e60777d23e Use Bitstream Setting XML 2024-07-26 01:36:49 -07:00
dependabot[bot] 67bc1b569b
Bump yosys from `118b282` to `610d27d` 
Bumps [yosys](https://github.com/YosysHQ/yosys) from `118b282` to `610d27d`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](118b2829db...610d27dc1c)

---
updated-dependencies:
- dependency-name: yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2024-07-26 06:52:25 +00:00
tangxifan aed082817e
Merge pull request #1757 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2024-07-26 10:28:21 +08:00
github-actions[bot] b635d17358 Updated Patch Count 2024-07-26 02:07:52 +00:00
tangxifan 4bf4a77861
Merge pull request #1754 from lnis-uofu/dependabot/submodules/yosys-118b282 
Bump yosys from `28ebefd` to `118b282`
 2024-07-26 10:07:28 +08:00
chungshien-chai 2ef362d53d Init support overwriting bitstream 2024-07-25 17:40:46 -07:00
chungshien f142c73a11
Merge branch 'lnis-uofu:master' into master 2024-07-25 12:53:25 -07:00
tangxifan 542d422911 Merge branch 'master' of github.com:lnis-uofu/OpenFPGA into xt_clkntwk2 2024-07-22 21:56:00 +08:00
dependabot[bot] cd9f533292
Bump yosys from `28ebefd` to `118b282` 
Bumps [yosys](https://github.com/YosysHQ/yosys) from `28ebefd` to `118b282`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](28ebefda4a...118b2829db)

---
updated-dependencies:
- dependency-name: yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2024-07-22 06:13:18 +00:00
tangxifan 0d82682a73
Merge pull request #1753 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2024-07-21 11:35:44 +08:00
github-actions[bot] 9570726ab9 Updated Patch Count 2024-07-21 03:13:52 +00:00
tangxifan ce17197614
Merge pull request #1751 from lnis-uofu/dependabot/submodules/yosys-28ebefd 
Bump yosys from `b08688f` to `28ebefd`
 2024-07-21 11:13:31 +08:00
dependabot[bot] df0d64ddb4
Bump yosys from `b08688f` to `28ebefd` 
Bumps [yosys](https://github.com/YosysHQ/yosys) from `b08688f` to `28ebefd`.
- [Release notes](https://github.com/YosysHQ/yosys/releases)
- [Commits](b08688f711...28ebefda4a)

---
updated-dependencies:
- dependency-name: yosys
  dependency-type: direct:production
...

Signed-off-by: dependabot[bot] <support@github.com>
 2024-07-19 06:34:08 +00:00
tangxifan 1513ea749b [core] supporting clk spine on the same direction 2024-07-16 22:12:51 -07:00
tangxifan 18d12109fb [core] fixed a critical bug where cb port name using index is not considered on clock network entry 2024-07-16 17:42:21 -07:00
tangxifan c1f46c448a [core] fixed a critical bug where clock network entry is on a CHANY 2024-07-16 17:04:44 -07:00
tangxifan cbd10e1222 [core] fixed a bug where tile module's global port is not derived from dedicated clock network 2024-07-16 16:58:21 -07:00
tangxifan f607987386 [core] patch the out-of-range in clock rr nodes 2024-07-16 16:45:55 -07:00
tangxifan fc58daa239
Merge pull request #1748 from lnis-uofu/patch_update 
Pulling refs/heads/master into master
 2024-07-10 16:58:40 -07:00
github-actions[bot] ab126d8cfc Updated Patch Count 2024-07-10 23:57:28 +00:00
tangxifan 1b9356e05c
Merge pull request #1747 from lnis-uofu/dependabot/submodules/yosys-b08688f 
Bump yosys from `dac5bd1` to `b08688f`
 2024-07-10 16:57:05 -07:00
tangxifan 37b302b335
Merge pull request #1746 from lnis-uofu/xt_clkntwk2 
Support global net routing on regular inputs of programmable blocks
 2024-07-10 16:56:47 -07:00
tangxifan 0c99fcf6f4 [doc] format 2024-07-10 15:07:57 -07:00
tangxifan c96f899c53 [core] code format 2024-07-10 15:07:26 -07:00
tangxifan a390aad0b8 [doc] add new syntax 2024-07-10 15:07:16 -07:00