tangxifan
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358e9892ac
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reduce some error message to warnings
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2019-11-02 00:09:13 -06:00 |
tangxifan
|
3077efa74f
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add option to compact tileable routing arch
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2019-07-04 17:13:34 -06:00 |
tangxifan
|
4392c6bc3a
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bug fixing in fpga_flow scripts and add more print-out message for VPR
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2019-07-02 15:34:59 -06:00 |
tangxifan
|
95674c4687
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added Switch Block SubType and SubFs for tileable rr_graph generation
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2019-07-02 10:00:02 -06:00 |
tangxifan
|
59df305668
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bug fixing and reorganize rr_graph builder source files
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2019-06-23 16:40:13 -06:00 |
tangxifan
|
7c38b32eb1
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keep bug fixing for tileable rr_graph generator
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2019-06-21 22:51:11 -06:00 |
tangxifan
|
41954056ce
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many bug fixing for tileable rr_graph generator. Still debugging
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2019-06-21 17:58:46 -06:00 |
tangxifan
|
548242b368
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plug-in tileable rr generator which can be enable by a XML property
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2019-06-20 21:06:26 -06:00 |
tangxifan
|
baab9c4a21
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basically finished the coding of tileable rr_graph generator. testing to go
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2019-06-20 18:17:07 -06:00 |
tangxifan
|
9ca1b42f4c
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developing switch block pattern for tileable routing architecture
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2019-06-18 16:52:42 -06:00 |
tangxifan
|
65b5454f3a
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start developing tileable_rr_graph_builder
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2019-06-11 16:49:10 -06:00 |
tangxifan
|
d683134b12
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rename customized vpr7 to vpr7 XML to Production
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2018-09-17 23:10:45 -06:00 |