tangxifan
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e305e60ee4
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minor fix on the shell interface of VPR
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2019-05-08 14:29:58 -06:00 |
Baudouin Chauviere
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4f386de2ef
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gen_xxx functions create mem-leaks because the mem is dynamically allocated inside and not freed. TBD later everywhere
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2019-05-06 17:25:29 -06:00 |
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Baudouin Chauviere
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3b62f8e024
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Conversion from s to ns for the loop breaking delays
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2019-05-06 16:12:30 -06:00 |
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Baudouin Chauviere
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a5a1a376ab
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Modified code for cleaner delay naming convention
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2019-05-06 12:52:49 -06:00 |
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tangxifan
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4e3487b691
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Add latest abc and update ace dependence
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2019-05-03 18:56:03 -06:00 |
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Baudouin Chauviere
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7860042276
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added before after loop breaker constraining
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2019-05-03 14:00:06 -06:00 |
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Baudouin Chauviere
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4e330ee463
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Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
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2019-05-03 10:43:22 -06:00 |
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Baudouin Chauviere
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921b694400
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Bug fix sdc breaking loop of edges outside current interconnect
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2019-05-03 10:42:35 -06:00 |
AurelienUoU
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42f20eda60
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Add the user matching for internal register in formal verification script generation
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2019-05-03 10:24:02 -06:00 |
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tangxifan
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974af5a2ae
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Merge branch 'multimode_clb' of https://github.com/LNIS-Projects/OpenFPGA into multimode_clb
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2019-04-30 14:30:38 -06:00 |
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tangxifan
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42daadee2f
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critical bug fixing
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2019-04-30 14:30:17 -06:00 |
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Baudouin Chauviere
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1ab4688339
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Create no segment constraint in loop_breaker if none is given by user
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2019-04-30 12:30:07 -06:00 |
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tangxifan
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c46c0fc97d
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bug fixing for SDC generator
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2019-04-26 14:07:44 -06:00 |
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tangxifan
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46d44fa42a
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Update VPR7 X2P with new engine
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2019-04-26 12:23:47 -06:00 |