tangxifan
|
0cb8457e21
|
[Test] Add test case for tileable I/O
|
2020-12-04 16:02:47 -07:00 |
tangxifan
|
179b0ce304
|
[Test] Use formal verification method to reduce the runtime of iverilog simulation for global tile
|
2020-11-30 18:11:47 -07:00 |
tangxifan
|
27a480b5f8
|
[Test] arch name fix in the test case
|
2020-11-30 17:45:54 -07:00 |
tangxifan
|
a1d3b439d3
|
[Test] Add a new test case to define a global reset port from a global tile port
|
2020-11-30 17:19:12 -07:00 |
tangxifan
|
655da9f3d0
|
[Flow] Rename OpenFPGA shell script folder name to consistent with naming convention
|
2020-11-22 16:37:19 -07:00 |
tangxifan
|
845436fa71
|
[Test] Add sequential benchmark for global tile clock test case
|
2020-11-17 14:34:54 -07:00 |
tangxifan
|
485258a9ea
|
[Test] Add test case for global clock from tiles
|
2020-11-10 19:24:25 -07:00 |
tangxifan
|
61376a2979
|
[Test] Add test cases for various tile organization
|
2020-11-04 16:32:52 -07:00 |
tangxifan
|
4c14428400
|
[Test] Add test case for fast configuration support on multi-region frame-based configuration protocol
|
2020-10-30 10:50:00 -06:00 |
tangxifan
|
ca7d43275d
|
[Test] Add test case for multi_region configuration frame
|
2020-10-30 10:48:29 -06:00 |
tangxifan
|
241ebf054a
|
[Test] Add a test case for validating fast configuration techniques on multi-region memory banks
|
2020-10-29 16:29:46 -06:00 |
tangxifan
|
ff386001c4
|
[Test] Add openfpga task for multi-region memory banks
|
2020-10-29 13:56:32 -06:00 |
tangxifan
|
dc68c52d0a
|
[Test] Now use a light architecture to speed up the test case runtime
|
2020-10-12 12:53:34 -06:00 |
tangxifan
|
8941e38613
|
[Test] Enable verification in the new test case
|
2020-10-12 12:50:08 -06:00 |
tangxifan
|
9e1fd300dc
|
[Test] Add test case for customized location of fabric netlists
|
2020-10-12 12:47:58 -06:00 |
tangxifan
|
d4d02ab16a
|
[Regression Test] Move fabric key tests to basic tests
|
2020-09-29 14:22:23 -06:00 |
tangxifan
|
a0d1d68402
|
[Regression Test] Add regression tests for smart fast configuration chain using multiple regions
|
2020-09-29 13:53:41 -06:00 |
tangxifan
|
5be5835b71
|
[Regression Test] Add multiple region configuration chain test case
|
2020-09-29 13:48:39 -06:00 |
tangxifan
|
19dd3778d9
|
[Architecture] Add test case for memory bank to use both reset and set
|
2020-09-24 17:04:24 -06:00 |
tangxifan
|
335f5b78c1
|
[Regression Test] Add test case to use both set and reset for configuration frame
|
2020-09-24 17:02:28 -06:00 |
tangxifan
|
2d81ff9012
|
[Regression test] Add configuration chain test case where both set and reset are used
|
2020-09-24 16:59:52 -06:00 |
tangxifan
|
7fbccdd102
|
[Regression Tests] Add test cases for configuration chain using different DFF cells
|
2020-09-24 14:34:12 -06:00 |
tangxifan
|
e7906899dd
|
[Regression test] Bug fix for fast configuration frame. Now should use a latch with reset
|
2020-09-24 13:53:12 -06:00 |
tangxifan
|
ffd1a72d22
|
[Architecture] Add regression tests for the frame-based configuration using reset and set signals
|
2020-09-24 12:18:26 -06:00 |
tangxifan
|
fde15c4f88
|
[Regression Test] Add test for fast memory bank configuration using set signals
|
2020-09-24 12:13:35 -06:00 |
tangxifan
|
48083d2276
|
[Regression Test] Adapt fast memory bank test case
|
2020-09-24 10:32:03 -06:00 |
tangxifan
|
186f00edfc
|
[Regression Test] Add test cases for memory bank using different SRAM cells
|
2020-09-24 10:25:03 -06:00 |
tangxifan
|
5b0d451f0f
|
[Regression Test] Add test case for configurable latch with active-low set
|
2020-09-23 23:04:10 -06:00 |
tangxifan
|
8e780635df
|
[Regression Test] Rename test case in CI
|
2020-09-23 22:59:46 -06:00 |
tangxifan
|
d0cef68242
|
[Regression test] Add test case for using resetb
|
2020-09-23 22:58:59 -06:00 |
tangxifan
|
73e59d67af
|
[Architecture] Add test case for fast configuration using set signals
|
2020-09-23 21:50:23 -06:00 |
tangxifan
|
349aa79069
|
[Regression test] Add test case for smart fast configuration
|
2020-09-23 21:49:38 -06:00 |
tangxifan
|
05c2e652a4
|
[Regression Test] Add a new test case for using scan-chain ff in frame-based configuration protocol
|
2020-09-23 20:44:06 -06:00 |
tangxifan
|
906191e931
|
[Architecture] Use strict latch Verilog HDL in frame-based procotol
|
2020-09-23 17:58:13 -06:00 |
tangxifan
|
ad385c6d69
|
[Regression Test] Add test case for using SRAM cell in frame-based configuration
|
2020-09-23 17:39:36 -06:00 |
tangxifan
|
f23c25e123
|
[Regression Test] Add test case for configurable latch with active-low reset
|
2020-09-23 17:25:17 -06:00 |
tangxifan
|
149d5b20bd
|
[Regression Test] Add test case for fixed device support
|
2020-09-23 16:47:11 -06:00 |
tangxifan
|
3350695806
|
[Regression test] Add test case for pattern based local routing architecture
|
2020-09-23 16:06:47 -06:00 |
tangxifan
|
51c0319657
|
[Regression tests] Add test case for the k4n4 with fracturable 32-bit multiplier
|
2020-09-22 15:32:54 -06:00 |
tangxifan
|
3d1f49fb2f
|
[Regression Test] Add testcase for k4n4 with multiple segments
|
2020-09-22 12:47:41 -06:00 |
tangxifan
|
5741664580
|
[Regression Test] Add test case for k4n4 bram architecture
|
2020-09-22 12:23:56 -06:00 |
tangxifan
|
7ed9f76b06
|
[Regression test] Move k4n4 no local routing to basic test
|
2020-09-22 11:47:03 -06:00 |
tangxifan
|
2dea97afb6
|
[Regression test] reduce runtime for k4n4 test in basic testing
|
2020-09-22 11:45:29 -06:00 |
tangxifan
|
ea4dd410b7
|
[Regression Test] Add k4n4 fracturable lut test case to basic test
|
2020-09-22 11:41:36 -06:00 |
tangxifan
|
dad19cac9a
|
[Regression test] Add k4 series architecture: fracturable adder
|
2020-09-22 11:39:18 -06:00 |
tangxifan
|
a156807559
|
enrich basic regression tests to cover more critical microbenchmarks
|
2020-07-27 19:47:43 -06:00 |
tangxifan
|
50cc4dfba3
|
classify regression test to dedicated categories
|
2020-07-27 17:18:59 -06:00 |