tangxifan
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4b852afeac
|
skip rotating mirror detection which is too time-consuming
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2019-05-25 23:41:46 -06:00 |
tangxifan
|
d3eae80e64
|
implemented an native way in finding rotable Switch blocks
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2019-05-25 19:37:18 -06:00 |
AurelienUoU
|
4f921b03da
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Add travis full path to avoid missing sources
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2019-05-16 15:51:10 -06:00 |
AurelienUoU
|
57d75520a6
|
Verilog verification with Travis
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2019-05-15 15:57:05 -06:00 |
AurelienUoU
|
a3656dde45
|
Add missing Verilog source, Archictecture folder and Testbenches correction
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2019-05-13 16:41:35 -06:00 |
tangxifan
|
46d44fa42a
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Update VPR7 X2P with new engine
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2019-04-26 12:23:47 -06:00 |
tangxifan
|
5e36aa82c5
|
fixa bug in determining mux structure
|
2019-01-22 13:54:50 -07:00 |
Baudouin Chauviere
|
510c27f816
|
Removed commercial scripts, replaced by academia ones
|
2019-01-09 11:56:07 -07:00 |
Baudouin Chauviere
|
3b4fc16c60
|
Adding help message on the go.sh
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2019-01-09 11:54:28 -07:00 |
tangxifan
|
66701838ff
|
update relative path in ARCH XML
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2019-01-08 11:41:24 -07:00 |
tangxifan
|
ee6b1d6cd6
|
adapt arch xml and act for demo
|
2018-12-13 22:46:40 -07:00 |
AurelienUoU
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5e94b7093d
|
Add scan-chain and timed architecture + update simulation script script (add script for autochecked testbench)
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2018-12-08 22:57:54 -07:00 |