tangxifan
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956b9aca01
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[Tool] Trim dead codes in port naming function
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2021-03-13 20:23:08 -07:00 |
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tangxifan
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2c5634ee76
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[Tool] Change pin naming of grid modules to be related to architecture port names
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2021-03-13 20:05:18 -07:00 |
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tangxifan
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23bcad0678
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use more robust net builder in inter tile connections
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2020-06-30 10:49:17 -06:00 |
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tangxifan
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e7d5736269
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add profile time to top module builder for better spot on runtime/memory overhead sources
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2020-06-29 23:17:03 -06:00 |
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tangxifan
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fc6abc13fd
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add physical tile utils to identify pins that have Fc=0
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2020-03-21 21:02:47 -06:00 |
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tangxifan
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7b9384f3b2
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add write_gsb command to shell interface
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2020-03-21 19:40:26 -06:00 |
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tangxifan
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c0e8d98c6f
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bug fixed in tile direct builder
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2020-03-21 12:43:56 -06:00 |
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tangxifan
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539f13720a
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tile direct supports inter-column/inter-row direct connections
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2020-02-15 13:42:53 -07:00 |