add write_gsb command to shell interface
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637be076dc
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7b9384f3b2
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@ -24,14 +24,17 @@ namespace openfpga {
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static
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void write_rr_switch_block_to_xml(const std::string fname_prefix,
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const RRGraph& rr_graph,
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const RRGSB& rr_gsb) {
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const RRGSB& rr_gsb,
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const bool& verbose) {
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/* Prepare file name */
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std::string fname(fname_prefix);
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vtr::Point<size_t> gsb_coordinate(rr_gsb.get_sb_x(), rr_gsb.get_sb_y());
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fname += generate_switch_block_module_name(gsb_coordinate);
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fname += ".xml";
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VTR_LOG("Output internal structure of Switch Block to '%s'\r", fname.c_str());
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VTR_LOGV(verbose,
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"Output internal structure of Switch Block to '%s'\n",
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fname.c_str());
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/* Create a file handler*/
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std::fstream fp;
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@ -173,18 +176,29 @@ void write_rr_switch_block_to_xml(const std::string fname_prefix,
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***************************************************************************************/
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void write_device_rr_gsb_to_xml(const char* sb_xml_dir,
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const RRGraph& rr_graph,
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const DeviceRRGSB& device_rr_gsb) {
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std::string fname_prefix = format_dir_path(std::string(sb_xml_dir));
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const DeviceRRGSB& device_rr_gsb,
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const bool& verbose) {
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std::string xml_dir_name = format_dir_path(std::string(sb_xml_dir));
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/* Create directories */
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create_dir_path(xml_dir_name.c_str());
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vtr::Point<size_t> sb_range = device_rr_gsb.get_gsb_range();
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size_t gsb_counter = 0;
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/* For each switch block, an XML file will be outputted */
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for (size_t ix = 0; ix < sb_range.x(); ++ix) {
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for (size_t iy = 0; iy < sb_range.y(); ++iy) {
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const RRGSB& rr_gsb = device_rr_gsb.get_gsb(ix, iy);
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write_rr_switch_block_to_xml(fname_prefix, rr_graph, rr_gsb);
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write_rr_switch_block_to_xml(xml_dir_name, rr_graph, rr_gsb, verbose);
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gsb_counter++;
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}
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}
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VTR_LOG("Output %lu XML files to directory '%s'\n",
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gsb_counter,
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xml_dir_name.c_str());
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}
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} /* end namespace openfpga */
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@ -17,7 +17,8 @@ namespace openfpga {
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void write_device_rr_gsb_to_xml(const char* sb_xml_dir,
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const RRGraph& rr_graph,
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const DeviceRRGSB& device_rr_gsb);
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const DeviceRRGSB& device_rr_gsb,
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const bool& verbose);
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} /* end namespace openfpga */
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@ -9,6 +9,7 @@
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#include "openfpga_lut_truth_table_fixup.h"
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#include "check_netlist_naming_conflict.h"
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#include "openfpga_build_fabric.h"
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#include "openfpga_write_gsb.h"
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#include "openfpga_setup_command.h"
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/* begin namespace openfpga */
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@ -95,6 +96,35 @@ ShellCommandId add_openfpga_link_arch_command(openfpga::Shell<OpenfpgaContext>&
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return shell_cmd_id;
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}
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/********************************************************************
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* - Add a command to Shell environment: write_gsb_to_xml
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* - Add associated options
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* - Add command dependency
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*******************************************************************/
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static
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ShellCommandId add_openfpga_write_gsb_command(openfpga::Shell<OpenfpgaContext>& shell,
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const ShellCommandClassId& cmd_class_id,
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const std::vector<ShellCommandId>& dependent_cmds) {
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Command shell_cmd("write_gsb_to_xml");
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/* Add an option '--file' in short '-f'*/
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CommandOptionId opt_file = shell_cmd.add_option("file", true, "path to the directory that stores the XML files");
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shell_cmd.set_option_short_name(opt_file, "f");
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shell_cmd.set_option_require_value(opt_file, openfpga::OPT_STRING);
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/* Add an option '--verbose' */
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shell_cmd.add_option("verbose", false, "Show verbose outputs");
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/* Add command 'write_openfpga_arch' to the Shell */
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ShellCommandId shell_cmd_id = shell.add_command(shell_cmd, "write internal structures of General Switch Blocks to XML file");
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shell.set_command_class(shell_cmd_id, cmd_class_id);
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shell.set_command_const_execute_function(shell_cmd_id, write_gsb);
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/* Add command dependency to the Shell */
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shell.set_command_dependency(shell_cmd_id, dependent_cmds);
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return shell_cmd_id;
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}
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/********************************************************************
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* - Add a command to Shell environment: check_netlist_naming_conflict
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* - Add associated options
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@ -240,6 +270,16 @@ void add_openfpga_setup_commands(openfpga::Shell<OpenfpgaContext>& shell) {
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ShellCommandId link_arch_cmd_id = add_openfpga_link_arch_command(shell,
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openfpga_setup_cmd_class,
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link_arch_dependent_cmds);
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/********************************
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* Command 'write_gsb'
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*/
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/* The 'write_gsb' command should NOT be executed before 'link_openfpga_arch' */
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std::vector<ShellCommandId> write_gsb_dependent_cmds;
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write_gsb_dependent_cmds.push_back(link_arch_cmd_id);
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add_openfpga_write_gsb_command(shell,
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openfpga_setup_cmd_class,
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write_gsb_dependent_cmds);
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/*******************************************
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* Command 'check_netlist_naming_conflict'
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*/
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@ -0,0 +1,43 @@
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/********************************************************************
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* This file includes functions to compress the hierachy of routing architecture
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*******************************************************************/
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/* Headers from vtrutil library */
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#include "vtr_time.h"
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#include "vtr_log.h"
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#include "write_xml_device_rr_gsb.h"
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#include "openfpga_write_gsb.h"
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/* Include global variables of VPR */
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#include "globals.h"
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/* begin namespace openfpga */
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namespace openfpga {
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/********************************************************************
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* Write internal structrure of all the General Switch Blocks (GSBs)
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* to an XML file
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*******************************************************************/
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void write_gsb(const OpenfpgaContext& openfpga_ctx,
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const Command& cmd, const CommandContext& cmd_context) {
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/* Check the option '--file' is enabled or not
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* Actually, it must be enabled as the shell interface will check
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* before reaching this fuction
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*/
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CommandOptionId opt_file = cmd.option("file");
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VTR_ASSERT(true == cmd_context.option_enable(cmd, opt_file));
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VTR_ASSERT(false == cmd_context.option_value(cmd, opt_file).empty());
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CommandOptionId opt_verbose = cmd.option("verbose");
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std::string sb_file_name = cmd_context.option_value(cmd, opt_file);
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write_device_rr_gsb_to_xml(sb_file_name.c_str(),
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g_vpr_ctx.device().rr_graph,
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openfpga_ctx.device_rr_gsb(),
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cmd_context.option_enable(cmd, opt_verbose));
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}
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} /* end namespace openfpga */
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@ -0,0 +1,23 @@
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#ifndef OPENFPGA_WRITE_GSB_H
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#define OPENFPGA_WRITE_GSB_H
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/********************************************************************
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* Include header files that are required by function declaration
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*******************************************************************/
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#include "command.h"
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#include "command_context.h"
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#include "openfpga_context.h"
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/********************************************************************
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* Function declaration
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*******************************************************************/
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/* begin namespace openfpga */
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namespace openfpga {
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void write_gsb(const OpenfpgaContext& openfpga_ctx,
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const Command& cmd, const CommandContext& cmd_context);
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} /* end namespace openfpga */
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#endif
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@ -96,7 +96,9 @@ void add_module_nets_tile_direct_connection(ModuleManager& module_manager,
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std::string src_port_name = generate_grid_port_name(src_clb_coord, src_pin_width, src_pin_height, src_pin_grid_side, src_tile_pin, false);
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ModulePortId src_port_id = module_manager.find_module_port(src_grid_module, src_port_name);
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if (true != module_manager.valid_module_port_id(src_grid_module, src_port_id)) {
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VTR_LOG("Fail to find port '%s'\n", src_port_name.c_str());
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VTR_LOG_ERROR("Fail to find port '%s.%s'\n",
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src_module_name.c_str(),
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src_port_name.c_str());
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}
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VTR_ASSERT(true == module_manager.valid_module_port_id(src_grid_module, src_port_id));
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VTR_ASSERT(1 == module_manager.module_port(src_grid_module, src_port_id).get_width());
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@ -10,6 +10,9 @@ read_openfpga_arch -f ./test_openfpga_arch/k6_frac_N10_adder_chain_40nm_openfpga
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# Annotate the OpenFPGA architecture to VPR data base
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link_openfpga_arch --activity_file ./test_blif/and.act --sort_gsb_chan_node_in_edges #--verbose
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# Write GSB to XML for debugging
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write_gsb_to_xml --file /var/tmp/xtang/openfpga_test_src/gsb_xml
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# Check and correct any naming conflicts in the BLIF netlist
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check_netlist_naming_conflict --fix --report ./netlist_renaming.xml
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@ -22,7 +25,7 @@ lut_truth_table_fixup #--verbose
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# Build the module graph
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# - Enabled compression on routing architecture modules
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# - Enable pin duplication on grid modules
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build_fabric --compress_routing --duplicate_grid_pin --verbose
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build_fabric --compress_routing --duplicate_grid_pin #--verbose
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# Repack the netlist to physical pbs
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# This must be done before bitstream generator and testbench generation
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