OpenFPGA/vpr7_x2p/vpr/SRC/fpga_x2p/verilog/verilog_api.h

5 lines
124 B
C
Raw Normal View History

2019-04-26 13:23:47 -05:00
void vpr_fpga_verilog(t_vpr_setup vpr_setup,
t_arch Arch,
char* circuit_name);