riscv-openocd/tcl
Sean Anderson 5b9da0eed2 board: Add LS1046ARDB
This adds support for the LS1046A Reference Design Board. There are
several JTAG headers accessable once the case is opened, but this config
is for the externally-accessable CMSIS DAP.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I0f83470da3758f0c4512ce47348c4db7de17b27e
Reviewed-on: https://review.openocd.org/c/openocd/+/6855
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-03-12 09:46:47 +00:00
..
board board: Add LS1046ARDB 2022-03-12 09:46:47 +00:00
chip tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
cpld cpld: altera-epm240: Increase adapter speed 2022-02-26 15:29:52 +00:00
cpu tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
fpga tcl: add lattice ECP5 family support 2021-08-25 03:47:50 +00:00
interface Cadence virtual debug interface (vdebug) integration 2022-02-14 15:12:10 +00:00
target target: Add LS1046A 2022-03-12 09:46:30 +00:00
test tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
tools tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
bitsbytes.tcl tcl: fix some minor typo 2021-05-22 10:06:26 +01:00
mem_helper.tcl tcl: [1/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:48:44 +01:00
memory.tcl tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00
mmr_helpers.tcl tcl: [3/3] prepare for jimtcl 0.81 'expr' syntax change 2021-05-08 09:49:08 +01:00