riscv-openocd

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FE_402_fix

archive

add_macos_build

autoconf

bscan_optimization

bscan_tunnel

buf_sget

build32

busy

compliance_dev

debug-log-reg-failure

deinit

dmi_read

dmstatus_version

dsp5680_build

eclipse_memory_read

eclipse_multicore_fix

examine_command

examine_unavailable_harts

examine_unavailable_harts_backup

examine_unavailable_harts_rebase

examine_unavailable_harts_squash

fence_i_fix_for_release

fix-halt-reason-after-singlestep

fix_macbuild

gd32vf103

gdb_next_port

gitignore-build

global

halt_examine

haltreq

hypervisor_translate

jlink

log_output

macbuild

macro

manual_hwbp

master

mem64

mpsse_flush

multicore

new_bscan_approach

newprogram

nohartstatus

old_fixes_and_eclipse_memory_read

old_triggers

print_port

race

rbb_cleanup

regcache

regression_test_janmat_experim

release

remove-slot_t-from-riscv-013

reset_test

reverse-resume-order

riscv

riscv-batch-cleanup

riscv-compliance

riscv-compliance-dev

s2_increment

sba_tests

set_group

static

travis-nop

update_defines

us_xds110

vector2

winbuild

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latest

openocd64-41b9c69e92d9660cb2eff508f3bc8218a3b3e461

openocd64-8b80fe1

openocd64-ad4c3e1

openocd64-d486b21

v20170608

v20170612

v20170621

v20170818

v20171231

v2018.12.0

v20180629

v20180928

v20181030

d94daf776c flash/nor/nrf5: add basic nRF53 and nRF91 support Tomas Vanek 2024-01-22 12:45:49 +0100
fc7a428fc2 flash/nor/nrf5: make flash erase little faster Tomas Vanek 2024-01-22 14:17:27 +0100
37f9485cef flash/nor/nrf5: introduce address maps Tomas Vanek 2024-01-21 23:25:13 +0100
ed9203f4aa gdb_server: do not start multiple instances on "pipe" Paul Fertser 2024-04-25 14:33:07 +0300
1fba55a9b6 flash/nor/tcl: Fix memory leak of flash bank name Marc Schink 2024-06-01 10:41:29 +0200
0a3217b8ff tcl/board: Add config for NXP FRDM-KV31F Marc Schink 2024-05-25 18:57:10 +0200
84126893ff tcl/board: Add config for NXP FRDM-KV11Z Marc Schink 2024-05-25 18:55:23 +0200
d382c95d57 target/riscv: support for smp group manipulation Parshintsev Anatoly 2023-06-22 19:28:52 +0300
2f8bb252ff doc: Minimally describe the BSCAN tunnel interface. Tim Newsome 2020-09-21 14:10:27 -0700
9623069e80 jtag/drivers/ftdi: Use command_print instead of LOG_USER for get_signal Mark Featherston 2024-05-23 13:24:32 -0700
72b39088ee target: reset examine after assert_reset Antonio Borneo 2024-04-08 17:42:52 +0200
b5e7118048 src/helper/startup: fix syntax errors Noah Moroze 2024-05-15 22:50:58 -0400
7050cade9d tcl/chip/st/spear: fix syntax errors Noah Moroze 2024-05-15 22:49:23 -0400
223e3d8fe7 tcl/target/c100helper: fix syntax errors Noah Moroze 2024-05-15 22:47:53 -0400
eecba412cd tcl/memory: fix syntax errors Noah Moroze 2024-05-15 22:39:12 -0400
c7c4d4d48c contrib: Drop 'coresight-trace.txt' Marc Schink 2024-05-20 11:32:19 +0200
71013521d7 server: gdb: respect command gdb_report_register_access_error Antonio Borneo 2024-05-03 23:04:46 +0200
568baf8c0b

Merge pull request #1044 from en-sc/en-sc/riscv-011-sep-reg-acc Evgeniy Naydanov 2024-06-07 17:01:42 +0300
9555b741b1 target/riscv: write registers using batch Evgeniy Naydanov 2024-01-24 15:05:59 +0300
ff9736cc3c .github/workflows: check git revisions instead of a diff Evgeniy Naydanov 2024-06-05 22:01:40 +0300
40cda81e8b

Merge pull request #1075 from en-sc/en-sc/from_upstream Evgeniy Naydanov 2024-06-05 19:26:06 +0300
cb87885c00 target/riscv: stop using register_get/set for 0.11 targets Evgeniy Naydanov 2024-04-16 16:49:29 +0300
c470cd21ae Revert "Initialize all registers in examine" Evgeniy Naydanov 2024-05-08 18:46:30 +0300
b548653f66

Merge pull request #1056 from aap-sc/aap-sc/no_hit_bit_status Anatoly Parshintsev 2024-06-04 18:49:42 +0300
8568f9b9af

Merge pull request #1077 from riscv-collab/remove-slot_t-from-riscv-013 Evgeniy Naydanov 2024-06-04 12:06:37 +0300
4ac35e4f39 riscv-013: Remove unused typedef slot_t remove-slot_t-from-riscv-013 Jan Matyas 2024-05-31 07:58:20 +0200
9c4a5d64ca Merge up to 437dde701c from upstream Evgeniy Naydanov 2024-05-30 19:46:03 +0300
347981ca55

Merge pull request #1072 from aap-sc/aap-sc/fix_warnings_on_hide_csrs Evgeniy Naydanov 2024-05-30 19:37:35 +0300
b201a5db23 target/riscv: do not emit warnings when a non-existent CSR is hidden Parshintsev Anatoly 2024-05-28 22:45:37 +0300
2c00a087da target/riscv: fix halt reason for targets that do not support hit bit on triggers Parshintsev Anatoly 2024-04-22 21:33:33 +0300
38ef9cc99b

Merge pull request #1033 from en-sc/en-sc/err-read-abs-arg Evgeniy Naydanov 2024-05-28 10:35:56 +0300
437dde701c Documentation: fix warning "unbalanced square brackets" R. Diez 2024-05-12 18:45:16 +0200
7c4ddfb546 Documentation: Fix 2 warnings "Underfull \hbox (badness 10000)" R. Diez 2024-05-12 22:03:08 +0200
cf48bf6d3d ChangeLog: fix warning "Wide character in print" from git2cl R. Diez 2024-05-12 20:50:34 +0200
1fba7d53bb configure.ac: show the dummy adapter in the configuration summary R. Diez 2024-04-21 22:58:21 +0200
fbea7d5d38 openocd: drop include of target_type.h Antonio Borneo 2024-04-09 01:29:34 +0200
ccc5c1642b Fix build with clang even if it sets __GNUC__ to >= 4.4 Bernhard Rosenkränzer 2024-05-09 15:30:13 +0200
bd89b91c69 target/semihosting: Fix double free() Marc Schink 2024-05-01 10:24:32 +0200
edb14a02e9 tcl/target/nrf52: Configure trace port speed Marc Schink 2024-05-05 15:28:20 +0200
1a00c67e10 tcl/target/nrf52: Use 'error' instead of 'echo' Marc Schink 2024-05-05 15:20:07 +0200
be1aebd818 target/arm_tpiu_swo: Handle errors in pre/post-enable events Marc Schink 2024-05-01 12:58:18 +0200
c831758ea4 server/gdb: Use 'bool' data type where appropriate Marc Schink 2024-05-03 09:18:00 +0200
2506ccb509 target/arm_tpiu_swo: Fix division by zero Marc Schink 2024-04-28 12:47:42 +0200
1db7ca1929 target/riscv: read abstract args using batch Evgeniy Naydanov 2023-12-15 16:57:58 +0300
ac120651c8

Merge pull request #1061 from en-sc/en-sc/dm-reset Evgeniy Naydanov 2024-05-18 17:25:06 +0300
4924f63926

Merge pull request #1029 from MrAlexei/add_decode_wp_rvc Evgeniy Naydanov 2024-05-17 16:39:12 +0300
418fcf1cea target/riscv: only `dmactive` can be written if `dmactive` is low Evgeniy Naydanov 2024-04-26 11:36:25 +0300
2c8376b79d target/xtensa: avoid IHI for writes to non-executable memory Ian Thompson 2024-01-31 15:14:25 -0800
22ddf62d75 gdb_server: enable keep-alive packets for qCRC packet Parshintsev Anatoly 2024-05-03 00:28:33 +0300
126d8a0972 cortex_a: drop cortex_a_dap_write_memap_register_u32() Antonio Borneo 2024-05-04 19:13:51 +0200
caabdd4a66 cortex_a: drop the command 'cache auto' Antonio Borneo 2024-05-04 20:09:51 +0200
dbef02789f cortex_a: drop useless cache invalidate on mem write Antonio Borneo 2024-05-02 15:24:57 +0200
ea57d2ae27 Improved handling of unavailable cores examine_unavailable_harts_rebase cgsfv 2024-05-08 16:07:16 -0700
ae7ffa424e

Merge pull request #1064 from en-sc/en-sc/from_upstream Evgeniy Naydanov 2024-05-07 10:54:01 +0300
0c748e52c0 Improved handling of unavailable harts examine_unavailable_harts_squash cgsfv 2024-02-13 18:00:52 -0800
cf13aee61f Handling harts becoming available when halted examine_unavailable_harts cgsfv 2024-03-20 20:14:53 -0700
bc9ca5f4a8 ipdbg: fix double free of virtual-ir data Daniel Anselmi 2024-03-17 01:15:16 +0100
a84d1b5f5e tcl/target: Add helpers for booting Xilinx ZynqMP from JTAG Sean Anderson 2024-02-22 12:18:36 -0500
3eba7b53bf smp: fix SIGSEGV for "smp off" during target examine Antonio Borneo 2024-04-15 17:42:12 +0200
c72afedce7 target: cortex_a: fix regs invalidation when -defer-examine Antonio Borneo 2024-04-13 18:54:12 +0200
42e31d75b4 target: aarch64: fix regs invalidation when -defer-examine Antonio Borneo 2024-04-13 18:46:11 +0200
89d881c19a cortex_m: don't try to halt not-examined targets Antonio Borneo 2024-04-08 17:40:09 +0200
8667a72653 target/target: Add 'debug_reason' to current target Marc Schink 2023-11-18 12:48:33 +0100
ac6b00c3ca target: cortex_m: fix display of DWT registers Antonio Borneo 2024-04-06 00:26:38 +0200
a9e8ca55a6 jtag: linuxgpiod: minor alignment to coding style Antonio Borneo 2024-04-07 12:28:55 +0200
495311d206 doc: style: report indentation of multi-line condition Antonio Borneo 2024-04-07 12:41:48 +0200
6a72b323da

Merge pull request #1028 from en-sc/en-sc/busy-reset-batch Evgeniy Naydanov 2024-05-02 10:55:16 +0300
69cf9babfb Add functions to decode RVC load and store instructions Aleksey Lotosh 2024-03-10 20:32:37 +0300
687f00c060

Merge pull request #1031 from aap-sc/aap-sc/hart_status_info_fixup Evgeniy Naydanov 2024-04-27 16:44:09 +0300
9563cd67e6

Merge pull request #1055 from aap-sc/aap-sc/bp_unitialized Evgeniy Naydanov 2024-04-27 16:42:29 +0300
c0791b1c9e Merge up to 04154af5d6 from upstream Evgeniy Naydanov 2024-04-27 15:16:16 +0300
55ae2534b3 Handle unavailability when deasserting reset examine_unavailable_harts_backup cgsfv 2024-04-26 17:05:16 -0700
68fcd1c5b7 target/riscv: reset delays during batch scans Evgeniy Naydanov 2024-01-24 10:35:00 +0300
e51f8695ed

Merge pull request #1025 from en-sc/en-sc/dump-field Evgeniy Naydanov 2024-04-26 20:49:35 +0300
de03da8c2c

Merge pull request #1046 from en-sc/en-sc/reg-rv011-segfault-propper Evgeniy Naydanov 2024-04-26 20:49:11 +0300
5aac841f4a

Merge pull request #1054 from en-sc/en-sc/rv011-pc-dpc Evgeniy Naydanov 2024-04-26 20:48:47 +0300
84ed43ec3a Using progbuf for set_dcsr_break now works cgsfv 2024-04-25 12:36:37 -0700
16db1b77ff

Merge pull request #1050 from TommyMurphyTM1234/update-github-actions Evgeniy Naydanov 2024-04-25 08:56:11 +0300
665fbf605b fix confusing status messages during resume Parshintsev Anatoly 2024-03-21 07:07:23 +0300
88f7650a6d target/riscv: use breakpoint_hw_set/watchpoint_set to properly initialize bp/wp descriptor Parshintsev Anatoly 2024-04-20 16:40:45 +0300
98ece6bac9 target/riscv/riscv-011: pc and dpc should be cached at the same location Evgeniy Naydanov 2024-04-23 16:20:05 +0300
b6da5a06e9 Can also use progbuf only for dcsr_ebreak cgsfv 2024-04-22 20:40:28 -0700
5c80ac8c57 Bump GitHub actions to latest versions - https://github.com/riscv-collab/riscv-openocd/issues/1048 Tommy Murphy 2024-04-22 09:21:05 +0100
967510cb1d target/riscv/riscv-011.c: fix access to non-existent register Evgeniy Naydanov 2024-04-19 22:59:58 +0300
005f68aa92 target/riscv: fix segfault on RISC-V Debug v0.11 Evgeniy Naydanov 2024-04-19 20:47:57 +0300
e1e6cdfec6 target/riscv: decode DMI scans in batch access Evgeniy Naydanov 2024-01-19 16:12:13 +0300
3991492cc1

Merge pull request #1040 from rivos-eblot/dev/ebl/read_mem_dmibase Evgeniy Naydanov 2024-04-14 17:00:24 +0300
740cdc78f3

Merge pull request #1023 from en-sc/en-sc/check-ac-busy Evgeniy Naydanov 2024-04-14 16:59:04 +0300
93f6260621

Merge pull request #1039 from en-sc/en-sc/running-cache Evgeniy Naydanov 2024-04-14 16:58:10 +0300
27fbc2767a

Merge pull request #1036 from en-sc/en-sc/from_upstream Evgeniy Naydanov 2024-04-14 16:57:29 +0300
34d6fe3676 target/riscv: check `abstractcs.busy` Evgeniy Naydanov 2024-02-20 20:02:14 +0300
8319eee9e1 target/riscv: introduce `examine_dm()` function Evgeniy Naydanov 2024-02-20 20:01:42 +0300
67b2a5a955 target/riscv: cache `abstractcs.busy` in `dm013_info_t` Evgeniy Naydanov 2024-02-20 18:17:49 +0300
04154af5d6 jtag: linuxgpiod: drop extra parenthesis Antonio Borneo 2024-03-24 22:57:52 +0100
47d983a77a target/mips32: fix clang sbuild check fail Walter Ji 2024-03-18 17:24:51 +0800
79b51fedab remote_bitbang: Change sleep commands to Zz to avoid conflict with SWD J. Neuschäfer 2024-03-30 13:18:43 +0100
e035756b22 jtag: linuxgpiod: fix detection for line request bias Antonio Borneo 2024-03-24 16:17:11 +0100
74e7fcb2dd configure: prevent build of linuxgpiod with libgpiod v2 Antonio Borneo 2024-03-24 15:53:33 +0100
329e983ee9 zynq_7000.cfg: Fix issue 'Error: can't read "zynq_pl": no such variable' Dominik Wernberger 2024-03-26 20:32:22 +0100
9c45c9f4be target/riscv: read registers are not valid on a running target Evgeniy Naydanov 2024-04-03 16:42:14 +0300