Commit Graph

10532 Commits

Author SHA1 Message Date
Marek Vrbka 851d1ad87a breakpoints: Add target logging to breakpoints and watchpoints
This patch adds target logging to breakpoint
handling code. This makes it easier to
debug multicore/multithread systems.

Change-Id: I6bea8079a457070a8f63d0ce381a4ece6f5a190a
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7922
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-11-18 11:20:11 +00:00
Kirill Radkin 7c60f6593e breakpoints: Fix endless loop in bp/wp_clear_target
If we can't remove bp/wp, we will stuck in endless loop

Change-Id: I44c0a164db1d15c0a0637d33c75087a49cf5c0f4
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7940
Tested-by: jenkins
Reviewed-by: Anatoly P <kupokupokupopo@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:19:45 +00:00
ianst f8096ce687 xtensa: update XDM register map for TRAX support
- Include additional debug module registers
- Add translation function for DM reg addr -> ID
- Add DM read/write commands

Signed-off-by: ianst <ianst@cadence.com>
Change-Id: If95419d24a9f27a40fa695c8c15326cdfd127ef1
Reviewed-on: https://review.openocd.org/c/openocd/+/7973
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-18 11:18:29 +00:00
ianst 9ebc2a6519 doc: xtensa architecture clarifications/fixes
- Fix Xtensa .cfg file references for NXP EVK
- Add clarification note for "xtensa xtmem" command
- Resolve TEX build warnings

Signed-off-by: ianst <ianst@cadence.com>
Change-Id: I0f2b56d0d084d86f557fadf3ac35fd04bf99650c
Reviewed-on: https://review.openocd.org/c/openocd/+/7972
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:17:31 +00:00
Marc Schink 3862e07688 target: Remove break/watchpoints in target_destroy()
Break- and watchpoints are not removed when a target is destroyed
which introduces a memory leak.

Change-Id: I6143d48f7efd765b7752a12fdc337da3496d896f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7956
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-18 11:16:53 +00:00
Antonio Borneo d4575b647a target: fix segmentation fault on target create
In the unusual (and even incorrect) case of running the command
target create ...
before defining an adapter and the associated transport, the
command causes a segmentation fault. E.g.:
	openocd -c 'target create cpu cortex-m -endian little'

Check that get_current_transport() returns a valid pointer before
referencing it.

Change-Id: I9796a7e92196ef3df5c7152b27c34102045dc9e7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7962
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2023-11-18 11:16:27 +00:00
Antonio Borneo b39072f2ef target: use boolean values for 'valid' and 'dirty' flags
Convert to boolean the remaining numeric assignment and comparison

Change-Id: Idc25221d93e85236185aab9ee36f0a379939c89c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7961
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
2023-11-18 11:16:06 +00:00
Antonio Borneo 5587710c1a nor: rsl10: fix minor coding style
I use a script to compare the commands in the code with the ones
in the documentation.
Fix the style of the data to simplify the parsing.

Change-Id: I0f1d7e9ff5e2928312ca1a2f3424f82d2910580a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7960
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
2023-11-18 11:15:47 +00:00
Antonio Borneo 9fcf33da8e contrib/rtos-helpers/FreeRTOS-openocd: change license to CC0-1.0
This file is intended to be included in any user's project that
plans to use OpenOCD awareness for FreeRTOS.
It is supposed to be distributed under a permissive license to not
impact the original license of the user's project.

Distribute it under Creative Commons Zero v1.0 Universal license.

Change-Id: I7ac90e8b742517bcafc08c00662625671c8159c4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7995
Reviewed-by: Karl Palsson <karlp@tweak.au>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
2023-11-11 18:48:41 +00:00
Antonio Borneo edf8e916a2 LICENSES: Add the CC0-1.0 license
Add the full text of the CC0-1.0 license to the OpenOCD tree. It
was copied directly from:

  https://spdx.org/licenses/CC0-1.0.html#licenseText

Add the required tags for reference and tooling.

Change-Id: Iae9c1431b6ffdd68ad5780deb78a257edb0b67f3
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7994
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.au>
2023-11-11 18:48:07 +00:00
Daniel Anselmi d378c3a1d6 pld/certus: fix crash when loading bitstream
Loading a bitstream to cetrus device crashed due to
missing initialization.

Change-Id: Ibd9a04b84e514f9635af01a2b73bae478e534eb7
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7908
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11 18:47:36 +00:00
Nishanth Menon 5b878b6e8b tcl/board: Add TI AM273 launchpad config
Add basic connection details with AM273 Launchpad

For further details, see: https://www.ti.com/tool/LP-AM273

Change-Id: I88a02cdbccb65c185e808503d080cc1f12c909ae
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7951
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11 18:46:46 +00:00
Nishanth Menon cb60f75a56 tcl/target/ti_k3: Add AM273 SoC
Add support for the TI K3 family AM273 SoC.

For further details, see https://www.ti.com/lit/pdf/spruiu0

Change-Id: Ifa21d0760831f4f525ecd976fb8d086ffdbc9e9f
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7950
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:46:30 +00:00
Nishanth Menon 17f34355e5 tcl/board: Add TI AM263 launchpad config
Add basic connection details with AM263 Launchpad

For further details, see: https://www.ti.com/tool/LP-AM263

Change-Id: I94c7a9ca70734ae89c6df3f02137d5bd32fde774
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7949
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:46:17 +00:00
Nishanth Menon e4e94a355d tcl/target/ti_k3: Add AM263 SoC
Add support for the TI K3 family AM263 SoC.

For further details, see https://www.ti.com/lit/pdf/spruim2

Change-Id: I9a91b3d675511661dfc2710a7183bd59b98da133
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7948
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11 18:45:52 +00:00
Nishanth Menon ba39343e3d tcl/board: Add TI AM243 launchpad config
Add basic connection details with AM243 Launchpad

For further details, see: https://www.ti.com/tool/LP-AM243

Change-Id: Id8cec6675a222888b0007484209558d6503dbcda
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7947
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11 18:45:39 +00:00
Nishanth Menon a646057c7e tcl/target/ti_k3: Add AM243 SoC
Add support for the TI K3 family AM243 SoC. This SoC is built on the
same base of AM642, so reuse the configuration with the exception of
Cortex-A53 which is not available on this device.

For further details, see https://www.ti.com/lit/pdf/spruim2

Change-Id: I971ba878b0f503e5120f6853634776eb61d05080
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7946
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11 18:45:22 +00:00
Nishanth Menon 7919b0965b tcl/target/ti_k3: Sort the SoC documentation alphabetically
Sort the documentation for the TI K3 parts alphabetically.

Change-Id: I2c40714ad590e3d9232a6f915c157d677e0c3610
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7945
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:45:08 +00:00
Nishanth Menon 9a79dfb709 tcl/target/ti_k3: Make Cortex-A processors optional
The AM2x family of K3 SoCs typically do not contain a Cortex-A53 or
A72 processor. So, make the cpu "up" functions available when armv8
processor count > 0.

Change-Id: I985b194fe7cc63e4134ad84ccd921cc456eb412f
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7944
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11 18:44:54 +00:00
Nishanth Menon 5ea20d7ed9 tcl/target/ti_k3: Convert memory access ap port num as a variable
Convert the memory access ap port num as a variable to allow support
for the AM2x family of K3 SoCs.

Change-Id: Ibd96c94055721f60d95179dab21d014c15b0f562
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7943
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:44:40 +00:00
Nishanth Menon 4b879bb017 tcl/target/ti_k3: Convert Cortex-R5 ap port num as a variable
Convert the Cortex-R5 ap port num as a variable to allow support for
the AM2x family of K3 SoCs.

Change-Id: I7dc8b459dca8b5f21395230b5cb782b14538bd48
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7942
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:44:28 +00:00
Nishanth Menon 00b0739082 tcl/target/ti_k3: Convert sysctrl ap port num as a variable
Convert the sysctrl ap port num as a variable to allow support for the
AM2x family of K3 SoCs.

Change-Id: I1b5b55e48240e6654779dd636fdf07bca055e192
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7941
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-11-11 18:44:10 +00:00
Peter Collingbourne 42441fd96c target: Add a debug_reason command
This allows programmatically determining the debug reason.

Change-Id: I0c3e85cebb6dc28fc0fc212beca84a484ac654a5
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7952
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:43:43 +00:00
Erhan Kurubas a9080087d8 target/breakpoints: make breakpoint_watchpoint_remove_all static
Fixes below Sparse tool warning.
warning: symbol 'breakpoint_watchpoint_remove_all' was not declared.
Should it be static?

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I4af1d5aa54abcb45f746b877513ba0b5fccbeb47
Reviewed-on: https://review.openocd.org/c/openocd/+/7955
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
2023-11-11 18:05:46 +00:00
Evgeniy Naydanov 0f261188f1 target: fix a memory leak in image_open
Change-Id: I629be26e7752858091ad58c2b3b07f43e22e8c23
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7935
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:05:11 +00:00
Walter Ji d209598ce9 target/mips32: update mips32 config register parsing
Enhance `mips32_read_config_regs` to better detect MIPS32 ISA,
DSP, and FPU features, allowing user to get more detailed
target information.
Most of these information will be used in MIPS m/iAptiv support.

Change-Id: I23571a626ec64fa019acac91bdbfcb434373bfc1
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7911
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2023-11-11 18:04:19 +00:00
Marek Vrbka 7d1f132cea target: Fix get_reg, prevent returning invalid data
This patch forces a read of register from the target
in the get_reg command in case the register cache
does not hold a valid value at that moment.

Note that the command "reg" already handles it
correctly, no fix is needed there.

Change-Id: I75fad25188e94ee4e06162ab6d600ea24dbf590a
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7958
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-11-11 18:03:47 +00:00
Oliver Graute cca530c09d tcl/board: add board configuration for Advantech IMX8QM DMSSE20
Change-Id: Iebf2a901b428cf3b99110aea0f3ab0e1f17b0250
Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7974
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
2023-11-11 18:03:19 +00:00
Marc Schink f58b5ddaf2 target/target: Use boolean values for 'valid' flag
Change-Id: Ieaa25b9ef0997c0f75ddfb652325c1a9e53a8d8d
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7959
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-11-11 18:02:52 +00:00
Antonio Borneo 59c4d35fa4 jep106: update to revision JEP106BH September 2023
The original documents from Jedec since JEP106BG, do not report
the entry for "21  NXP (Philips)", replaced by "c".
It's clearly a typo.

Keep the line from JEP106BF.01 for "NXP (Philips)".

Change-Id: I273c8c5ecf48336ce5189b484a7236273ba90184
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7954
Tested-by: jenkins
2023-11-11 18:02:24 +00:00
Kirill Radkin b388f4805c OpenOCD memory leak in `hwthread_update_threads()`
Update `os_free()` from `rtos/rtos.c:96` to fix memory leaks

Change-Id: Id7b4c775291b735a0b4423151c2930afce6bf0bd
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7934
Reviewed-by: Tim Newsome <tim@sifive.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-10-27 11:41:30 +00:00
Tomas Vanek e5d26f1546 flash/nor/spi: add guide to select proper erase cmd
Extend comments in flash_devices array.

Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I7ab85a2d37803b6bc9fc7a2a91ae2effb6ec288d
Reviewed-on: https://review.openocd.org/c/openocd/+/7925
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
2023-10-27 11:41:11 +00:00
EasyDevKits a080d9795a jtag/drivers: Extension of jtag_libusb_open
In jtag_libusb_open I've added a parameter for delivering the device
description for which this function should search and adjusted all
callers of this function. A new driver for WCH CH347 JTAG chips
will use this new parameter.
See also: https://review.openocd.org/c/openocd/+/7937

Change-Id: I85e1d7b1f7912ba5e223f0f26323ff3b7600e17d
Signed-off-by: EasyDevKits <info@easydevkits.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7938
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-25 01:35:16 +00:00
EasyDevKits 1d555d21d9 tools/scripts: iManufacturer added to camelcase.txt
The iManufacturer is also a member of structure libusb_device_descriptor.
No need to output a check message by checkpatch.sh

Change-Id: Ibbb2eb9cde3482c8d4d6ea784f51a973eb36f8c5
Signed-off-by: EasyDevKits <info@easydevkits.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7936
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-10-25 01:34:28 +00:00
Walter Ji e887cfb9e8 target/mips32: check read regs result in save context
Add result check for mips32_pracc_read_regs in mips32_save_context.

Change-Id: Ie796d2b05a9feb11e246c2d0771b52cad4fb70db
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7932
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-25 01:34:00 +00:00
Walter Ji 18c64af135 target/mips32: rework mips core register related functions
Update mips core definitions.
Reworked mips core register structure and read/write function.
Add coprocessor0 register definitions for target configuration.

Change-Id: I59c1f4cc4020db8a78e8d79f7421b87382fa1709
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7864
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-25 01:33:10 +00:00
Parshintsev Anatoly c7d1f0ddab target: check if target is not examined on reg command
Change-Id: I46093c85374986a36d10eaac38b98bd5e05835ca
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7841
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
2023-10-14 12:06:40 +00:00
Tim Newsome 14b1b35e42 server/gdb_server: Log gdb index in debug messages.
This makes it easier to look at log files where multiple gdb instances
are connected.

Change-Id: Ic5aca52b32ee03ac35ffbed9a2fc552abb0a1cba
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7895
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-10-14 12:04:02 +00:00
Marek Vrbka 7822260ed4 target: Change the watchpoint type print from number to letter
Previously, when listing the watchpoints, OpenOCD printed
numbers 0, 1 and 2 representing READ, WRITE and ACCESS type
watchpoints.

This patch changes it to 'r', 'w' and 'a'. This increases the
clarity as what type the watchpoint actually is.

Change-Id: I9eac72dfd0bb2a9596a5b0c080a3f584556ed599
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7909
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-10-14 12:02:57 +00:00
Marek Vrbka eba5d21193 breakpoints: add rwp all command
This patch adds the "all" option to the rwp command.
It removes all watchpoints, much like rbp all removes
all breakpoints.

Change-Id: Id58dd103085e558f17afa4a287888cf085566ca9
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7907
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-14 12:01:38 +00:00
Marek Vrbka 2c8c2cb6b1 command: Prepend logs during command capture
Previously, if you ran a tcl command in capture like so:
"capture { reg 0x1000 hw }"
Such command did overwrite the tcl result if LOG_LVL_INFO or
lower was logged during it.

This patch changes it by prepending the log to the tcl result instead.
As the tcl results should not be lost during capture.

Change-Id: I37381b45e15c931ba2844d65c9d38f6ed2f6e4fd
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7902
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-10-14 12:00:16 +00:00
Kirill Radkin bcaac692d0 target: Fix an issue with rwp/rbp command in smp targets
If wp/bp is missing at address rwp/rbp won't return zero code (on smp).
Now it fixed.

Fixes: 022e438292 ("target: Change policy of removing watchpoints/breakpoints.")

Change-Id: I3a3c245f7088fc23227b286d2191fc7f3edba702
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7910
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-14 11:59:34 +00:00
Florian Fainelli d27a3a00b8 arm_opcode: Add support for ARM MCRR/MRRC
Add support for the ARM MCRR/MRRC instructions which require the use of
two registers to transfer a 64-bit co-processor registers. We are going
to use this in a subsequent patch in order to properly dump 64-bit page
table descriptors that exist on ARMv7A with VMSA extensions.

We make use of r0 and r1 to transfer 64-bit quantities to/from DCC.

Change-Id: Ic4975026c1ae4f2853795575ac7701d541248736
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Michael Chalfant <michael.chalfant@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5228
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-14 11:55:42 +00:00
Frank Plowman 1bc4182ceb target/nrf52: Create and configure TPIU
Firstly, create the TPIU nrf52.tpiu if using the nrf52 target. This is
standard, using AP 0 and TPIU base address 0xE0040000.
Secondly, add a pre_enable handler for this TPIU which configures the
TRACEMUX field of the TRACECONFIG register. This register is reset
every time the MCU resets, so the pre_enable handler creates a
reset-end handler to ensure the register remains set.

Change-Id: I408b20fc03dc2060c21bad0c21ed713eee55a113
Signed-off-by: Frank Plowman <post@frankplowman.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7901
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-10-07 14:46:52 +00:00
Nishanth Menon 9c7c5ca4eb tcl/target/ti_k3: Add AXI-AP port for direct SoC memory map access
While we can read and write from memory from the view of various
processors, all K3 debug systems have a AXI Access port that allows
us to directly access memory from debug interface. This port is
especially useful in the following scenarios:

1. Debug cache related behavior on processors as this provides a
   direct bypass path.
2. Processor has crashed or inaccessible for some reason (low power
   state etc.)
3. Scenarios prior to the processor getting active.
4. Debug MMU or address translation issues (example: TI's Region
   Address Table {RAT} translation table used to physically map
   SoC address space into R5/M4F processor address space)

The AXI-AP port is the same for all processors in TI's K3 family.

To prevent a circular-loop scenario for axi-ap accessing debug memory
with dmem (direct memory access debug), enable this only when dmem is
disabled.

Change-Id: Ie4ca9222f034ffc2fa669fb5124a5f8e37b65e3b
Reported-by: Dubravko Srsan <dubravko.srsan@dolotron.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7899
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-10-07 14:46:18 +00:00
Nishanth Menon d14fef8495 tcl/target/ti_k3: Introduce RTOS array variable to set various CPU RTOSes
The Texas Instruments' K3 devices are a mix of AMP and SMP systems.
The operating systems used on these processors can vary dramatically
as well. Introduce a RTOS array variable, which is keyed off the cpu
to identify which RTOS is used on that CPU. This can be "auto" or
"hwthread" in case of SMP debug etc.

For example:
AM625 with an general purpose M4F running Zephyr and 4 A53s running SMP
Linux could be invoked by:
openocd -c 'set V8_SMP_DEBUG 1' -c 'set RTOS(am625.cpu.gp_mcu) Zephyr' \
	-c "set RTOS(am625.cpu.a53.0) hwthread" -f board/ti_am625evm.cfg

Change-Id: Ib5e59fa2583b3115e5799658afcdd0ee91935e82
Reported-by: Dubravko Srsan <dubravko.srsan@dolotron.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7898
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-07 14:46:01 +00:00
Dubravko Srsan 7abb93aad4 tcl/target/ti_k3: Add coreid identification to SMP processors
Describe the SMP Armv8 cores in SMP configuration with coreid
explicitly called out. This allows for gdb session to call the smp
behavior clearly.

Change-Id: Ie43be22db64737bbb66181f09d3c83567044f3ac
Signed-off-by: Dubravko Srsan <dubravko.srsan@dolotron.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7897
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-10-07 14:45:11 +00:00
Dubravko Srsan 871276cfea tcl/target/ti_k3: Fix smp target description
When _v8_smp_targets is used with V8_SMP_DEBUG=1, describe the targets
as SMP targets. However, the variable expansion is not in the context of
a proc, and a typo in referring to global $_v8_smp_targets causes this
to fail. Just refer to $_v8_smp_targets directly.

Change-Id: Iffe5fd2703bed6a9c840284285e70b8a8ce84e17
Signed-off-by: Dubravko Srsan <dubravko.srsan@dolotron.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7896
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-10-07 14:44:41 +00:00
Parshintsev Anatoly 2f17449dff target: return error if attempting to access non-existing registers
Change-Id: Ic22edcab46d21dbc71f78275a78bdea9c2bcc394
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7886
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-10-07 14:43:59 +00:00
Artemiy Volkov d20304b3fb target/arc: do not invalidate icache when (un)setting breakpoints
Currently, instruction cache is being invalidated in
arc_{un,}set_breakpoint() regardless of whether the breakpoint's type is
HW or SW. For SW breakpoints, this has no net effect as the caches are
flushed as a by-product of overwriting instructions in main memory and
is thus merely unnecessary; but for HW breakpoints this invalidation is
not preceded by a flush and might lead to loss of data. This patch
removes the invalidate() call altogether to correct this undesired
behavior for HW breakpoints.

With this patch applied, all supported HW breakpoint tests from the gdb
testsuite are now passing with the arc-openocd backend.

Change-Id: I3d252b97f01f1a1e2bf0eb8fb257bdab0c544bc2
Signed-off-by: Artemiy Volkov <artemiy@synopsys.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7767
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-10-07 14:42:13 +00:00