This patch adds configuration files for ARM CoreLink SSE-200 SoCs. Also
adds configuration file for SSE-200 based Musca A board. Flash programming
support for Musca A QSPI flash is still not functional. This configuration
will be updated once that support lands into OpenOCD.
Please refer to ARM documentation for more information about SSE-200 and
Musca A.
Change-Id: Id3783c34d6e2609d659ef91c0bf7252c39439874
Signed-off-by: Omair Javaid <omair.javaid@linaro.org>
Reviewed-on: http://openocd.zylin.com/5006
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Add configuration for the Renesas RZ/A1H GR-Peach board,
which is a cheap development kit for the RZ/A1H SoC.
Change-Id: I7f5596ae47e6dff8e6d06cffd4dddca20f57d0ca
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5142
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Add a config to access the Amazon Kindle Model No. D00701 and D00801.
Both ebook readers are based on a Freescale i.MX31. A JTAG interface is
included in a 40 pin FFC connector marked "J9" on both variants.
Change-Id: I58bb1ded3d6706bc3798af488ca8bafb7dc45225
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3956
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
The new Microchip (former Atmel) series powered by Cortex-M4 looks
very similar to older M0+ powered SAM D2x at the first sight.
Unfortunately the new series differs a lot in important details.
NVMCTRL has different register addresses, moved important bits
and even changed binary command set. An universal driver for all SAM D/E
would be very complicated. That's why a new driver was derived.
Tested on Microchip SAM E54 Xplained Pro kit (board cfg included).
Adjusted for the restructured dap support.
Checked by valgrind and clang static analyzer.
Change-Id: I26c67047a552076f4b207b9b89285a53d69b4ca4
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4272
Tested-by: jenkins
Reviewed-by: Andres Vahter <andres.vahter@gmail.com>
The original script was broken by changes to the Cortex-A code. The
recent introduction of the mem_ap target provided a new mechanism to
allow the script to be fixed. This also adds an example board script
for the ADSP-SC584-EZBRD.
Change-Id: I36bc1ac6b6c036539f4175f1e65223ba10a35355
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/4855
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The xilinx_ultrascale.cfg target is actually the configuration for a
ZynqMP, which is a combination of an UltraScale+ FPGA core and a quad
core A53. Update the filename/comments to reflect this, and include
the tap IDs for all known FPGA cores for this part.
Change-Id: I70dfcc99861a482b83b6a795e83021d9cf1fe047
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/4850
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Currently it is impossible to flash ELF with correct offsets. The reason
is a bogus offset calculation extracted from base.
Since any other spi drivers do not care about base, do the same for
ath79 as well.
Change-Id: I9e46e01c9e7a709c2d07da9203c634f302603afd
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4821
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
original CC3200 launchpad works only with ti-icdi driver
which stopped to work after merging to master commit
d02de3a8a9
Change-Id: I247b5d99831fa744de1fdc5b8a7cffdf49fe953c
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/4792
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Since commit bae76053dc
gdb-attach event is defined as halt by default.
Remove useless and in case of bcm281xx wrong definitions of the event.
Change-Id: I8e69780a93722eb9392673303f54d502e71eceb6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4763
Tested-by: jenkins
Reviewed-by: Steven Stallion <sstallion@gmail.com>
The Mimas A7 FPGA board has FTDI FT2232 whose channel B is connected to
Artix-7 FPGA's JTAG interface. Hence, OpenOCD can easily interface with
it via the its ftdi driver interface. Tested to be working great up to
30 MHz.
Change-Id: Ieda015fbc6135bf95ad5a069cbf38650da45911e
Signed-off-by: Rohit Singh <rohit91.2008@gmail.com>
Reviewed-on: http://openocd.zylin.com/4720
Tested-by: jenkins
Reviewed-by: Tim "mithro" Ansell <me@mith.ro>
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested with Olimex ARM-USB-TINY-H adapter
Simple commands work fine but there are currently issues when attaching
remote gdb or running virt2phys:
https://sourceforge.net/p/openocd/tickets/201/
Change-Id: I86ccf1d93c5d23870bb522f92b3e2af190d529e8
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-on: http://openocd.zylin.com/4646
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
it is Atheros AR9331 based IoT dev board.
Change-Id: I6fc3cdea1bef49c53045018ff5acfec4d5610ba6
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4424
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The ar9331_25mhz_pll_init and ar9331_ddr1_init routines
can be used not only for TP-Link MR3020 board,
so move them to the common atheros_ar9331.cfg file.
Change-Id: I04090856b08151d6bb0f5ef9cc654efae1c81835
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2999
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
More information about this board can be found here:
https://www.8devices.com/products/lima
Change-Id: Id35a35d3e986630d58d37b47828870afd107cc6a
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4406
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This supports both 0.11 and 0.13 versions of the debug spec.
Support for `-rtos riscv` will come in a separate commit since it was
easy to separate out, and is likely to be more controversial.
Flash support for the SiFive boards will also come in a later commit.
Change-Id: I1d38fe669c2041b4e21a5c54a091594aac3e2190
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: http://openocd.zylin.com/4578
Tested-by: jenkins
Reviewed-by: Liviu Ionescu <ilg@livius.net>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Added msp432 flash driver to support the TI MSP432P4x and
MSP432E4x microcontrollers. Implemented the flash algo
helper as used in the TI debug and flash tools. This
implemention supports the MSP432E4, Falcon, and Falcon 2M
variants. The flash driver automatically detects the
connected variant and configures itself appropriately.
Added command to mass erase device for consistency with
TI tools and added command to unlock the protected BSL
region.
Tested using MSP432E401Y, MSP432P401R, and MSP432P4111
LaunchPads.
Tested with embedded XDS110 debug probe in CMSIS-DAP
mode and with external SEGGER J-Link probe.
Removed ti_msp432p4xx.cfg file made obsolete by this
patch.
Change-Id: I3b29d39ccc492524ef2c4a1733f7f9942c2684c0
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4153
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Id996c4de6dc9f25f71424017bf07689fea7bd3af
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
Reviewed-on: http://openocd.zylin.com/4507
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
cortex m0+ on a tiny board, with an mEDBG (CMSIS-DAP) debug interface.
Change-Id: Iaedfab578b4eb4aa2d923bd80f220f59b34e6ef9
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3402
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Factor out the code shared by all R-Car Gen2 boards into a single
file to get rid of the duplication.
Change-Id: I70b302c2e71f4e6fdccb2817dd65a5493bb393d8
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/4533
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Add configuration for the Renesas R-Car R8A7794 E2
based Silk evaluation board.
Change-Id: I504b5630b1a2791ed6967c6c2af8851ceef9723f
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
---
NOTE: This requires SW7[1] in position 1 (default is 0)
Reviewed-on: http://openocd.zylin.com/4532
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Added cc26xx flash driver to support the TI CC26xx and CC13xx
microcontrollers. Driver is capable of determining which MCU
is connected and configures itself accordingly. Added config
files for four specific variants: CC26x0, CC13x0, CC26x2, and
CC13x2.
Note that the flash loader code is based on the sources used
to support flash in Code Composer Studio and Uniflash from TI.
Removed cc26xx.cfg file made obsolete by this patch.
Change-Id: Ie2b0f74f8af7517a9184704b839677d1c9787862
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4358
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Fredrik Hederstierna <fredrik@hederstierna.com>
Added cc3220sf flash driver to support the TI CC3220SF
microcontrollers. Implemented flash driver to support the
internal flash of the CC3220SF. The implementation does not
support the serial flash of the CC32xx family that requires
connection over UART, and not via JTAG/SWD debug. Added config
files for both CC32xx devices (no flash) and CC3220SF (with
flash).
Updated to implement comments from code review.
Additional updates to handle remaining comments from review.
Additional updates per review.
Added code to only request aligned writes and full 32-bit
words down to flash helper algorithm. Updated for recent
changes in OpenOCD flash code.
Removed cc32xx.cfg file made obsolete by this patch.
Change-Id: I58fc1478d07238d39c7ef02339f1097a91668c47
Signed-off-by: Edward Fewell <efewell@ti.com>
Reviewed-on: http://openocd.zylin.com/4319
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The "Blue Pill" is a popular development board with an STM32F103C8
micro controller. According to sources, it has a 128kB Flash on board
even though the option bytes only report 64kB. This patch therefore also
modifies target/stm32f1x.cfg to take an optional FLASH_SIZE variable into
account which the board file sets to 0x20000.
Change-Id: I8a78ccd2b5faf637c539ee3cf8136789ee15c95d
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4495
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
includes target configuration for i.MX8M SoC family,
board file needs to set up CHIPNAME and CHIPCORES
to match the actual hardware configuration
Change-Id: Ieb6d89cab2477a58f85d0ef9cd242710950191c0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4434
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
configuration also contains a reset-init procedure that disables the
watchdog and initilizes the boards DDR memory so that you can upload
baremetal (e.g. boot loader) code into DDR and start it from there.
Change-Id: I4d2311b3708a5fcb5174a3447f34ae3904de7243
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4227
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Most Xilinx FPGA devices contain an embedded, unique device identifier.
The identifier is nonvolatile, permanently programmed into the FPGA, and is
unchangeable providing a great serial / tracking number.
This commit adds generic support for reading the Xilinx Spartan 6 and 7
Series (Kintex, Artix, Ultrascale) Device DNA. The code is similar to
the function in fpga/xilinx-xc6s.cfg for Spartan 6 but the register
addresses are different and the logic has been simplified.
The code was not placed in xilinx-xc7.cfg. The approach of defining taps
in the same file as library code to use them is fundamentally broken on
boards that have more than one FPGA or other chips. This commit (like
the addition of support for Xilinx XADC) starts to remedy that by
splitting library code from board-specific fixed definitions.
The support code is sourced in the Kasli and KC705 board support files
as it was tested on these boards.
Change-Id: Iba559c7c1b7e93e1270535fd9e6650007f3794da
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4396
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
The 7 Series FPGAs contain an on-chip 12 bit ADC that can probe die
temperature, internal power supply rail voltages as well as external
voltages. The XADC is available both from fabric as well as through the
JTAG TAP.
This code implements access throught the JTAG TAP.
https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf
Change-Id: I6cef4d0244add71749fa28b58a736302151cc4dd
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4395
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Kasli is an open hardware FPGA board. It is part of the Sinara family of
devices designed to control quantum physics experiments (see Sayma_AMC
for other boards already suppported by openocd).
Kasli was developed as part of the opticlock project. It features a
Xilinx Artix 7 100T FPGA, DDR3 RAM, a clock reconstruction and
distribution network, four 6 Gb/s transceiver links (three SFP and
one SATA) as well as interfaces to up to 12 Eurocard Extension Modules
(EEMs).
https://github.com/m-labs/sinara/wiki/Kaslihttp://www.opticlock.de/en/
Change-Id: I88b5e9f16b79e1e731056c45da6b5e1448d2c0e7
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4341
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
* Disables the data output pin while SWD is reading, so that a simple FTDI
SWD interface can be made by connecting TCK to SWD_CLK and TDI+TDO directly
to SWDIO. Enabled by setting SWDIO_OE to 0.
Change-Id: I7d3b71cf3f4eea163cb320aff69ed95d219190bd
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Signed-off-by: Roger Lendenmann <roger.lendenmann@intel.com>
Reviewed-on: http://openocd.zylin.com/2274
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
We can now use the generic stlink.cfg which allows for both ST-LINK/V2
and V2-1 debuggers.
Change-Id: I229c6fe5f6a6a4f2d3c787a49939846f102f9e24
Signed-off-by: Pushpal Sidhu <psidhu.devel@gmail.com>
Reviewed-on: http://openocd.zylin.com/4313
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Extend HLA interface to allow multiple VID/PID pairs and use it to
autodetect the connected stlink version.
Change-Id: I35cd895b2260e23cf0e8fcb1fc11a78c2b99c69b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3961
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Similar to the Sheevaplug fix inf95f8b70fbd0f7e9c91a2d9006b1abb2dd07ebf2
the OpenRD device has its JTAG interface on the first channel of the
ft2232, which is 0 for the new driver but was 1 for the old one. Correct
the config file appropriately. Also the device description was missing
the trailing " B" and thus not picking up the device correctly. Finally
add an adapter_khz setting in the OpenRD board configuration file - set
to 2MHz to match the Sheeva variant.
Confirmed as working thanks to Phil Hands providing me access to his
hardware to test on.
See also Debian Bug#793214; https://bugs.debian.org/793214
Change-Id: Ifacf53124eaa330bbbdf36dfa79e3256bf2a5201
Signed-off-by: Jonathan McDowell <noodles@earth.li>
Reviewed-on: http://openocd.zylin.com/4254
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This config covers the 4x Cortex A53 CPUs. A custom connector
is required from J14 to standard ARM JTAG on v1 boards. However
v2 hardware should have a standard FTSH-105-01-L-DV connector.
Pinmuxing code to enable JTAG pins is included in l-loader-poplar
repository, so board is flashed with open source code, JTAG
is available at very early boot. Alternatively the following
pokes can be issued from U-Boot to enable JTAG (e.g. to debug
hisilicon SDK).
mw 0xf8a210ec 0x130;
mw 0xf8a210f0 0x130;
mw 0xf8a210f4 0x130;
mw 0xf8a210f8 0x130;
mw 0xf8a210fc 0x130;
mw 0xf8a21100 0x130;
Change-Id: I2b83dfcb3dc5461c1620f94dd99aa7b31fdda59b
Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Reviewed-on: http://openocd.zylin.com/4161
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Finally we can use this driver by default!
Change-Id: I09d215d1bd1dc16873a7379637e6869af65ad8f1
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/4193
Tested-by: jenkins
Reviewed-by: Dmytro <dioptimizer@hotmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This patch adds the file ti_beaglebone-base.cfg as the common base
configuration for all TI BeagleBone derived boards. It also modifies
ti_beaglebone.cfg to source the base board and only add the on-board
JTAG adapter. Lastly, it adds a file ti_beaglebone_black.cfg with
a suitable configuraton for the BeagleBone "Black" variant.
Change-Id: I40cacb8abed7bdb308929713891f7b5e5b685c95
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3099
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
configuration covers all 8 Cortex-A53 cores and auxiliary Cortex-M3
used for power management.
Change-Id: I5509f275aa669abe285f9152935ecdcbcd0c402e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4009
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This patch contains configuration for the twr-vf65gs10 system module
of the Freescale (NXP) tower system. It provides support for both the
CMSIS-DAP available via USB and the Cortex+ETM connector
on J5. The configuration also contains DDR and clock init code
hooked into the reset-init event handler.
Change-Id: I68303e0038e137dcadc57525e662428769fb69f2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3564
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Both boards use SEGGER interface.
nRF52 flash driver is in change 3511.
The board files were needed for transport select to SWD. The default
jtag transport didn't failover to SWD.
Change-Id: Id9c72aa88eeeb6a4e1999ee182f5284dbe535c05
Signed-off-by: Rick Foos <rfoos@solengtech.com>
Reviewed-on: http://openocd.zylin.com/3600
Tested-by: jenkins
Reviewed-by: Fredrik Hederstierna <fredrik.hederstierna@gmail.com>
Reviewed-by: Michael Dietz <mjdietzx@gmail.com>
Reviewed-by: Jiří Pinkava <j-pi@seznam.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The Linksys WAG200G router has a TI AR7 SoC and a 4MB Flash layout
similar to the Netgear DG834v3 router [1].
Below is an example of a successful flash recovery, using a TUMPA,
connected to the MIPS EJTAG 2.6 header (JP102) of the router.
WAG200G [2] TUMPA [3]
Desc Pin Pin Desc
------------------------
nTRST 1 3 nTRST
TDI 3 5 TDI
TDO 5 13 TDO
TMS 7 7 TMS
TCK 9 9 TCK
nSRST 11 15 RST
GND 2 4 GND
Note that nSRST is optional to halt the CPU, but is required to probe
the flash. For instance, recover the kernel with:
$ sudo ./src/openocd -s tcl \
-f interface/ftdi/tumpa.cfg \
-f tools/firmware-recovery.tcl \
-c 'board linksys-wag200g;
reset_config srst_only;
flash_part kernel /path/to/kernel.bin;
shutdown'
[1] https://wiki.openwrt.org/toh/linksys/wag200g
[2] https://www.linux-mips.org/wiki/JTAG#JTAG_headers
[3] http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User's_Manual#20_PIN_JTAG_Connector
Change-Id: I952ba9f706e2e4f8f95ca03a5fa58f391ca030b6
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-on: http://openocd.zylin.com/3776
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Increase workareasize when it is know we have a larger device.
Change-Id: Ieaee92e7cd25cc201989f14de122349698871412
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3378
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Just like observed with the General App Kit earlier, it now started to
fail halting:
SWD IDCODE 0x2ba01477
TARGET: xmc4500.cpu - Not halted
in procedure 'reset'
in procedure 'ocd_bouncer'
SWD IDCODE 0x2ba01477
Halt timed out, wake up GDB.
Rely on the target's default sysresetreq behavior to allow flashing to
work seemlessly again.
Change-Id: Ib9ce5f2c0ab99dca6d0fc74435fe26a58437fae5
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3416
Tested-by: jenkins
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The current configuration leads to the following error when trying to
program the target:
SWD IDCODE 0x2ba01477
timed out while waiting for target halted
TARGET: efm32.cpu - Not halted
in procedure 'program'
in procedure 'reset' called at file "embedded:startup.tcl", line 478
in procedure 'ocd_bouncer'
Use the default reset handling of the target (SYSRESETREQ) to reset the
system rather than SRST to fix the problem.
Tested on EFM32GG, EFM32TG and EZR32WG STK.
Change-Id: I788c41baf08b20814cbe0934b563424c4bc144b8
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3420
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Both the STM32F429I-DISC{O,1} boards are equipped with the same MCU, but
differ by the debugging chip:
- the STM32F429I-DISCO uses the ST-LINK/V2 chip;
- the STM32F429I-DISC1 uses the ST-LINK/V2-B chip (which matches the USB
VID/PID set in stlink-v2-1.cfg).
Change-Id: I07d637f72d26cf5d714472638da974eb6ca02325
Signed-off-by: Samuel Martin <s.martin49@gmail.com>
Reviewed-on: http://openocd.zylin.com/3492
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The XMC1000 family uses a very different flash interface from XMC4000.
Tested on XMC 2Go and XMC1100 Boot Kit.
Change-Id: I3edaed420ef1c0fb89fdf221022c8b04163d41b3
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3418
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
The Spansion FM4 family of microcontrollers does not offer a way to
identify the chip model nor the flash size, except for Dual Flash vs.
regular layout. Therefore the family is passed as argument and
wildcard-matched - MB9BFx6x and S6E2CC families are supported.
Iterations showed that ...
1) Just doing the flash command sequence from SRAM loader code for each
half-word took 20 minutes for an 8 KB block.
2) Doing the busy-wait in the loader merely reduced the time to 19 minutes.
3) Significant performance gains were achieved by looping in loader code
rather than in OpenOCD and by maximizing the batch size across sectors,
getting us down to ~2 seconds for 8 KB and ~2.5 minutes for 1.1 MB.
(Tested with SK-FM4-176L-S6E2CC-ETH v11, CMSIS-DAP v23.)
gcc, objcopy -Obinary and bin2char.sh are used for automating the
integration of hand-written assembler snippets.
Change-Id: I092c81074662534f50b71b91d54eb8e0098fec76
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2190
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add support for the Intel Quark mcu D2000 using the new quark_d2xx
target.
Changes to the lakemont part are needed for the D2000 core and
backwards compatible with the X1000 one.
Change-Id: I6e1ef5a5d116344942f08e413965abd3945235fa
Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com>
Reviewed-on: http://openocd.zylin.com/3199
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested with "J-Link OB RX621-ARM-SWD V1 compiled Nov 4 2014 10:47:22".
Change-Id: Ib64c0be407f99df57f058a4498556fd5ab7e9112
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3170
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested with Relax Kit for 5V Shields:
J-Link Lite-XMC4200 Rev.1 compiled Oct 14 2015 10:14:50
and with Relax Lite Kit:
J-Link Lite-XMC4200 Rev.1 compiled Oct 14 2015 10:14:50
Derived from xmc4800-relax.cfg.
Change-Id: I4e10fb6ed1f85168634d3b5259d3041ffc6b74d8
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3130
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The pflash.0 bank should not be present as it overlaps with
the flash bank created by target/kx.cfg, triggering an error.
This is also in line with the existing twr-k60f120m.cfg.
Change-Id: I5f620e01319d967f12e029fb6865ccdd031713b3
Signed-off-by: Jonathan Larmour <jifl@eCosCentric.com>
Reviewed-on: http://openocd.zylin.com/3108
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
16000kHz is only safe after PLLs have been locked
properly. Until that's done (with reset init), we
can only safely run at 1000kHz.
Change-Id: I4e0a17e88aa9919cd6c34d44da68e23115c0d3a3
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/3015
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested with cmsis-dap using the EDBG chip on the board.
Change-Id: I3d398685c81e4701a9f6c1a66e60f7a87f839daa
Signed-off-by: Morgan Quigley <morgan@osrfoundation.org>
Reviewed-on: http://openocd.zylin.com/3092
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This reverts commit 7d7a43fd36.
The change concerns the "Black" variant of the TI BeagleBone, while the
configuration file is for the original BeagleBone board, which actually
embeds a debug interface on the PCB.
Change-Id: I2232af210deb698f8b3c0a547f26cd0a0a8f89d0
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3094
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Add configs for Atheros ar2313 MIPS based WiSoC and
board based on this chip: La Fonera FON2200
Change-Id: Ibfdbfc9c2beca6cf436c9ee5e493b08bfb55ac85
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2839
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add configs for Atheros ar2313 MIPS based WiSoC and
board based on this chip: Netgear WP102
Change-Id: Id93957b5d5851a272f15be35f9f448a9ce6d8a08
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2835
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Since 2cbbe9a it was actually decreasing the configured work area size.
We could now do "set WORKAREASIZE 0x2000" before sourcing lpc4350.cfg,
but there seems no point in doing so. Simply drop the configuration here.
Change-Id: I25b9dbbc007ba652b66099832198b7c329929858
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3086
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Board files should not select the interface. The BeagleBone Black is not
limited to just one JTAG interface.
Change-Id: I71ccc3dd9e2ca331a436701fab04e548b0abf829
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3083
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Adapted from diolan_lpc4350-db1.cfg. Both boards are identical except
for the SoC, so keep them in sync.
Change-Id: If892d8e953b0e3a9209a95b3b23a547357c10b7a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3038
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Its memory layout is different from MB9BFxxx.
Change-Id: I39c9f9cf582cd182971a9f83bb88c7a18da6cf15
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3007
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The xCORE-XA Core Module board has an XS1-XAU8A-10 SoC with 8 xCORE cores
and one ARM core. This config is for the ARM Cortex-M3, via J-Link OB.
Tested with "J-Link OB-STM32F103 V1 compiled Feb 5 2014 13:48:52".
Change-Id: Id7fadf8f323b45d5cfc0cae1054bd7b916771d6a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2763
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Another board supported by the ixo-usb-jtag project.
Change-Id: I676197c64e208886bc03d1bafcc964ef1fc2160b
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/2963
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The board is supported via the ixo-usb-jtag firmware.
Change-Id: I1e8a5ead850c0843b8532a5b54a7e7117778278e
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/2962
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested with Porcupine-1 JTAG adapter board and Digilent JTAG-HS3 interface;
reset does not yet work, pending nSRST configuration of the interface used.
Change-Id: I0d0679e098d93ffbd1539004cdb900e2a8ae4a25
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2730
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Marc Schink
Omair Javaid
Marek Vasut
Alexander Kurz
Tomas Vanek
Peter Lawrence
Jonathan McDowell
Oleksij Rempel
Jiri Kastner
William D. Jones
Rohit Singh
Adam Bass
Guido Günther
Cody P Schafer
Oleksij Rempel
Antony Pavlov
Tim Newsome
Edward Fewell
Karl Palsson
Andreas Färber
Matthias Welwarsky
Robert Jordens
Michele Sardo
Patrick Stewart
Pushpal Sidhu
Paul Fertser
Alexandre Torgue
Peter Griffin
Jan Čapek
Jerome Lambourg
Matthias Welwarsky
Andreas Fritiofson
Rick Foos
Vivien Didelot
Sean Cross
Uwe Bonnes
Samuel Martin
Freddie Chopin
Ivan De Cesaris
Tim 'mithro' Ansell
Manuel Limones
Jonathan Larmour
Felipe Balbi
Rémi PRUD’HOMME
Morgan Quigley
Maxime Coquelin
Forest Crossman