tcl/board: Add config for the Amazon Kindle 2 and DX
Add a config to access the Amazon Kindle Model No. D00701 and D00801. Both ebook readers are based on a Freescale i.MX31. A JTAG interface is included in a 40 pin FFC connector marked "J9" on both variants. Change-Id: I58bb1ded3d6706bc3798af488ca8bafb7dc45225 Signed-off-by: Alexander Kurz <akurz@blala.de> Reviewed-on: http://openocd.zylin.com/3956 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
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Alexander Kurz
Matthias Welwarsky
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# Board configuration file for Amazon Kindle Model No. D00701 and D00801
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# AKA Kindle 2nd generation and Kindle DX
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# using a Freescale MCIMX31LDVKN5D i.MX31 processor
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#
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# Pins at J9 40-Pin FFC-A:
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# 1 - GND
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# 16 - TRSTB
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# 17 - TDI
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# 18 - TMS
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# 19 - TCK
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# 20 - RTCK
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# 21 - TDO
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# 22 - DE
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# 25 - BOOT_MODE4
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# 27 - BOOT_MODE2
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source [find target/imx31.cfg]
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source [find target/imx.cfg]
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$_TARGETNAME configure -event reset-init { kindle2_init }
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$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
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# 8MiB NOR Flash
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME cfi 0xa0000000 0x800000 2 2 $_TARGETNAME
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# 16kiB internal SRAM
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$_TARGETNAME configure -work-area-phys 0x1fffc000 \
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-work-area-size 0x4000 -work-area-backup 0
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# FIXME: currently SRST is not wired to the system
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reset_config trst_only
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jtag_ntrst_assert_width 10
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jtag_ntrst_delay 30
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# this is broken but enabled by default
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arm11 memwrite burst disable
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adapter_khz 1000
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ftdi_tdo_sample_edge falling
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proc kindle2_init {} {
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imx3x_reset
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kindle2_clock_setup
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disable_mmu_and_cache
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kindle2_misc_init
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kindle2_sdram_init
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arm core_state arm
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}
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proc kindle2_clock_setup {} {
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# CCMR: clock from FPM/CKIL
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mww 0x53f80000 0x074b0b7b
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# IPU_CONF
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mww 0x53fc0000 0x040
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# 398MHz
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mww 0x53f80004 0xff871650
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mww 0x53f80010 0x00331c23
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}
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proc kindle2_misc_init { } {
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# AIPS1
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mww 0x43f00040 0x0
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mww 0x43f00044 0x0
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mww 0x43f00048 0x0
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mww 0x43f0004c 0x0
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mww 0x43f00050 0x0
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mww 0x43f00000 0x77777777
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mww 0x43f00004 0x77777777
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# AIPS2
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mww 0x53f00040 0x0
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mww 0x53f00044 0x0
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mww 0x53f00048 0x0
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mww 0x53f0004c 0x0
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mww 0x53f00050 0x0
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mww 0x53f00000 0x77777777
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mww 0x53f00004 0x77777777
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# Start 16 bit NorFlash Initialization on CS0
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mww 0xb8002000 0x0000cc03
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mww 0xb8002004 0xa0330d01
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mww 0xb8002008 0x00220800
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}
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proc disable_mmu_and_cache {} {
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# Mode Supervisor, disable FIQ, IRQ and imprecise data aborts
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reg cpsr 0x1d3
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# flush entire BTAC
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arm mcr 15 0 7 5 6 0
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# invalidate instruction and data cache
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# MCR CP15, 0, R1, C7, C7, 0
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arm mcr 15 0 7 7 0
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# clean and invalidate cache
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arm mcr 15 0 7 15 0
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# disable MMU and caches
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arm mcr 15 0 1 0 0 0
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arm mcr 15 0 15 2 4 0
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# invalidate TLBs
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arm mcr 15 0 8 7 0 0
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# Drain the write buffer
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arm mcr 15 0 7 10 4 0
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# start from AIPS 2GB region
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arm mcr 15 0 15 2 4 0x40000015
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}
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proc kindle2_sdram_init {} {
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#--------------------------------------------
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# Samsung K4X1G323PC-8GC3 32Mx32 Mobile DDR SDRAM
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#--------------------------------------------
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# SDCLK
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mww 0x43fac26c 0
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# CAS
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mww 0x43fac270 0
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# RAS
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mww 0x43fac274 0
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# CS2 (CSD0)
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mww 0x43fac27c 0x1000
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# DQM3
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mww 0x43fac284 0
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# DQM2, DQM1, DQM0, SD31-SD0, A25-A0, MA10 (0x288..0x2dc)
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mww 0x43fac288 0
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mww 0x43fac28c 0
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mww 0x43fac290 0
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mww 0x43fac294 0
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mww 0x43fac298 0
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mww 0x43fac29c 0
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mww 0x43fac2a0 0
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mww 0x43fac2a4 0
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mww 0x43fac2a8 0
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mww 0x43fac2ac 0
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mww 0x43fac2b0 0
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mww 0x43fac2b4 0
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mww 0x43fac2b8 0
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mww 0x43fac2bc 0
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mww 0x43fac2c0 0
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mww 0x43fac2c4 0
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mww 0x43fac2c8 0
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mww 0x43fac2cc 0
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mww 0x43fac2d0 0
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mww 0x43fac2d4 0
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mww 0x43fac2d8 0
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mww 0x43fac2dc 0
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# ?
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mww 0xb8002000 0x00006602
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mww 0xb8002004 0x00000501
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mww 0xb8002008 0x00000000
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# LPDDR1 Initialization script
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mww 0xb8001010 0x00000002
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mww 0xb8001010 0x00000004
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# ESDCFG0: set timing paramters
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mww 0xb8001004 0x007fff7f
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# ESDCTL0: select Prechare-All mode
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mww 0xb8001000 0x92100000
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mww 0x80000f00 0x12344321
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# ESDCTL0: Auto Refresh
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mww 0xb8001000 0xa2100000
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mww 0x80000000 0x12344321
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mww 0x80000000 0x12344321
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# ESDCTL0: Load Mode Register
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mww 0xb8001000 0xb2100000
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mwb 0x80000033 0xda
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mwb 0x81000000 0xff
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# ESDCTL0: enable Auto-Refresh
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mww 0xb8001000 0x82226080
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mww 0x80000000 0xdeadbeef
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}
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