Prepare for additional flash banks not located at address 0
Change-Id: I60b78c917f94fa52bf24df9e3315536f776eec84
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-on: http://openocd.zylin.com/4440
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
S6 record is equivalent to S5 but it uses 24-bit value (instead of 16-bit)
to store total number of data records. It can be found in big srec files
with total number of data records bigger than 65535
Handle S6 record in the same way as S5 (simply ignore it)
Change-Id: I3e15a4e8f784fd38803c00accf422f803e8469cd
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4645
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The reset_config line in the config file does not actually set
connect_assert_srst (the default is connect_deassert_srst), but it reads
as if it does. Clarify that the target is compatible with
connect_assert_srst, without suggesting that the file actually sets it
to that value.
Change-Id: I14e9445ab282d386b5d0055f6adf03d7c8878a8c
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4743
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
In previous versions of OpenOCD, it was possible to connect to the TCL
RPC interface without a current target. In `tcl_new_connection`, the
curent target would be queried by number, and the possibility of a null
current target was handled properly.
In commit bb9d9c6026, the
`get_target_by_num` call was replaced by a `get_current_target` call,
without noticing that `get_current_target` aborts if there is no current
target, whereas `tcl_new_connection` is perfectly able to handle that
situation.
Provide a `get_current_target_or_null` function for use by consumers who
are OK with a null current target, and use it in `tcl_new_connection`.
Change-Id: I06f7e1e149f1169e23c73ba328c7ad9f9425cc2a
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4730
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
Since 31c58c139d there is a unified config
for all stlink versions.
Change-Id: Id736063496ecd96e2024ed69dcb67a22c44b80bb
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4672
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The stm32h7x.cfg does not specify connect_assert_srst or
connect_deassert_srst in its reset_config. The comment claims that it
will therefore connect in reset. However, per the manual, the default
configuration is actually connect_deassert_srst, not
connect_assert_srst. In actual fact, connect_assert_srst does not work
on the STM32H7 because, while SRST is asserted, everything on the AXI
bus is inaccessible. The CPU core is accessible, but since the
examine-end event handler also pokes at the DBGMCU peripheral, that will
fail in connect_assert_srst mode. So using connect_deassert_srst is
appropriate, so fix the comment accordingly.
Change-Id: If3e32e871fb19cc61183bdf911b7c5efd80b62e2
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4741
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The for loop inside bitq_path_move function is not correct, this will
overflow the cmd->path array and produces an unpredictable result.
Change-Id: I81e3bc9ee6d1dd948acd2fe4c667103ac22bb26f
Signed-off-by: xuguangxiao <szgxxu@qq.com>
Reviewed-on: http://openocd.zylin.com/4733
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The functions cortex_a_dap_{read,write}_coreregister_u32() are
duplicate of the functions dpm_{read,write}_reg().
Remove both duplicated functions in cortex_a.c while export only
dpm_read_reg(), since dpm_write_reg() is currently not used.
Rename dpm_read_reg() as arm_dpm_read_reg() to keep uniform the
naming style.
Change-Id: I501bc99dc402039e630c47917a086a0bb382782c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4747
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
The name of the function dpm_modeswitch() does not follow the
common style of the other function names in the same file.
Rename it as arm_dpm_modeswitch().
Change-Id: Idebf3c7bbddcd9b3c7b44f8d0dea1e5f7549b0eb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4756
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
The armv7m debug port provides a direct access to the CPU memory
bus, allowing the debugger to bypass the CPU for every memory
operation.
The armv7a debug port doesn't offer the same feature, mainly
because CPU caches and MMU makes the direct memory access more
tricky. Nevertheless most SoC with armv7a provide direct memory
access through an AHB bus available on another DAP access port,
different from the debug port.
The original port of cortex_a in OpenOCD was inspired from the
working cortex_m code, and provided optional memory access
through the AHB, if present.
The code for AHB access is problematic and partially buggy due
to incomplete management of cache coherency and missing check of
page boundary during virtual address operations.
With the commit 5d458cf727
("target/mem_ap: generic mem-ap target") we have a clean support
for memory access through system buses connected to DAP AP, which
obsoletes the buggy memory AP hack in cortex_a.
Remove any code that uses the memory AP accesses in cortex_a.
Change-Id: I7cd1f94885e5817448058953e043d8da90dea3cc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4748
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
The variable fast_reg_read is always zero, causing some code to
never be executed.
Such code try to read the target registers by dumping them in
memory and then reading back the memory through the debugger. But
it is broken due to lack of cache and MMU management.
This code also uses the broken memory_ap access that is going to
be removed soon.
Remove all the code that depends on fast_reg_read not zero.
Add a missing check on arm_dpm_read_current_registers() return.
Keep the unused function cortex_a_dap_write_coreregister_u32()
to balance the used "read" version.
Change-Id: If2ff28a8c49eb0a87dc85207f5431978efd158db
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4746
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Handle write protection status in blocks instead of sectors, removing
unnecessary complexity in the process. Now closer to stm32f2x.
Support sequential modification of option bytes by read/modify/write
directly to option bytes area instead of always starting with the
currently loaded bytes from FLASH_OBR/WRPR registers.
Added new command 'options_load' to force re-load of option bytes w/o
having to power cycle target.
Change-Id: I5c76191e29c17a1e11482df06379d10ca8d6d04d
Signed-off-by: Dominik Peklo <dom.peklo@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4576
Tested-by: jenkins
Reviewed-by: Jan Vojtěch <honza.vojtech@gmail.com>
At OpenOCD start-up the operation of clearing the sticky error in
CTRL/STAT register ignores the current value of the power domains
bits CDBGPWRUPREQ and CSYSPWRUPREQ in the same register and
incorrectly set them to zero.
This abrupt disable does not follow the requirement in IHI0031 to
wait for the acknowledgment of power disabled before continuing.
The power domains are then re-enabled immediately after; it is
possible that such short disable period has passed undetected or
has been tested only on devices that do not implement the power
domains.
Anyway, this sequence is incorrect and can generate unexpected
and hard-to-debug issues while OpenOCD attaches to a running
target that implements power domains.
Anticipate the initialization of dap->dp_ctrl_stat and use it
while clearing the sticky bit. This has the additional effect of
avoiding a power disable in the error recovery part of the
function dap_dp_read_atomic().
Keep the same sequence of read/write in dap_dp_init() to avoid
breaking the initialization of some problematic target.
Add comments to document these choices.
Change-Id: I8d6da788f2dd11909792b5d6b69bc90fbe4df25d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4677
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
While on it correct RAM amount of SAMR21x16A devices
Change-Id: Ie9ab9de1551bdceff17af7597a9a2ee41f5aebe0
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4734
Reviewed-by: Eduardo Montoya
Tested-by: jenkins
When using stlink for CM7 targets we have to rely on its firmware
to do the right thing as direct DAP access is not possible.
Change-Id: Ieee69f4eeea5c911f89f060f31ce86ed043bdfd0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4732
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The performance of CMSIS-DAP in long data transfers was improved substantially in
ef02b69b14. But it not as good as some
other USB/MCU based adapters. Using HID and therefore interrupt endpoint
is slower than USB bulk transfer.
CMSIS-DAP adapter implements multiple HID buffer handling and OpenOCD already
reads number of buffers from info command.
This change adds capability to sumbit more than one HID requests before
driver waits for a HID response. This scenario is used for long transfers only.
Results show about double speed on USB FS and ~140% speed on USB HS:
| w/o this change | with multi HIDrq
-----------------------------------------+-----------------+-----------------
Open source CMSIS-DAP, USB FS, adapter_khz 1000
dump_image ram32k.bin 0x1fffe000 0x8000 | 23.225 KiB/s | 45.901 KiB/s
load_image ram32k.bin 0x1fffe000 | 23.324 KiB/s | 46.552 KiB/s
Cypress' Kitprog in CMSIS-DAP mode, USB FS, adapter_khz 1000 (over firmware limit)
dump_image ram64k.bin 0x20000000 0x10000 | 15.537 KiB/s | 42.558 KiB/s
load_image ram64k.bin 0x20000000 | 15.605 KiB/s | 43.291 KiB/s
Atmel's EDBG, USB HS, adapter_khz 10000 (#3945 applied)
dump_image ram384k.bin 0x20400000 0x6000 | 248.402 KiB/s | 345.250 KiB/s
load_image ram384k.bin 0x20400000 | 256.039 KiB/s | 365.945 KiB/s
Change-Id: I9edbe018086176d357c6aaba5d6b657a5e5e1c64
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4080
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Adding the call to keep_alive() to suppress warnings when
running the async flash algorithm. Issue observed when
loading large pieces of code on slower debuggers.
Change-Id: I7660fa05f68ebd7be07b2ca0a55b0f3b6ae718f3
Signed-off-by: Kevin Gillespie <kgills@gmail.com>
Reviewed-on: http://openocd.zylin.com/4686
Tested-by: jenkins
Reviewed-by: Jesse Marroquin
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This allows for programming the PL part of the Xilinx Zynq 7000
Change-Id: I89e86c0f381951091f6948c46802d17d7f1f3500
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: http://openocd.zylin.com/4177
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Commit c8926d1457 introduces the
context and hybrid breakpoint types beside existing SW and HW
types. The new field "asid" is non-zero only for these new types.
The commit above did not properly initialize "asid" to 0 for a
temporarily HW breakpoint used during single step. This causes
cortex_a_unset_breakpoint() to identify this breakpoint as of
type "hybrid".
Identified through valgrind error:
Conditional jump or move depends on uninitialised value(s)
Actually valgrind triggers a total of 10 messages about use of
uninitialized variables, but they are all caused by the first
conditional jump bases on "asid != 0".
Fixed by initializing "asid" to 0 in cortex_a_step().
Fixes: c8926d1457 ("cortex_a hybrid & context breakpoints")
Change-Id: Ib674d8457d1e02e10332fd9d73554d13719ef93d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4613
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Add/detect missing IDCODEs for the Spartan 7 family and Artix 25T
and Artix 12T.
Change-Id: Ib6c83c5592e90df1eb8e715e79b279da9a95f9c6
Signed-off-by: William D. Jones <wjones@wdj-consulting.com>
Reviewed-on: http://openocd.zylin.com/4428
Reviewed-by: Robert Jördens
Tested-by: jenkins
Reviewed-by: Rohit Singh <rohit91.2008@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Commit 0057c71ab6 updates the OpenOCD
cached values of CSW and TAR registers if these registers are modified
by an apreg command.
The condition to force the update of CSW cache is incorrect and it will
erase the default CSW value.
Moreover, calling mem_ap_setup_csw() does not honor the value requested
in the apreg command because such value is incorrectly bitwise or-ed
with csw_default.
Fix it by updating csw_value, instead of erasing csw_default, and writing
directly in CSW register the new value from the command line.
Change-Id: I40273cb64d22ccfb9b6d3499bd39b586eb60de38
Fixes: 0057c71ab6 ("target/arm_adi_v5: sync CSW and TAR cache on apreg write")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4679
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The Mimas A7 FPGA board has FTDI FT2232 whose channel B is connected to
Artix-7 FPGA's JTAG interface. Hence, OpenOCD can easily interface with
it via the its ftdi driver interface. Tested to be working great up to
30 MHz.
Change-Id: Ieda015fbc6135bf95ad5a069cbf38650da45911e
Signed-off-by: Rohit Singh <rohit91.2008@gmail.com>
Reviewed-on: http://openocd.zylin.com/4720
Tested-by: jenkins
Reviewed-by: Tim "mithro" Ansell <me@mith.ro>
Reviewed-by: Robert Jordens <jordens@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Some protocols make use of empty scan fields for optional padding, which
causes the log to fill with unhelpful messages that a field is empty.
The remaining LOG_DEBUG messages in ftdi_execute_scan have been demoted
to DEBUG_JTAG_IO such that these messages are only seen when debugging
JTAG.
Change-Id: I61fd4551411ce851da34e67d003bca5d7a71cd92
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4112
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This patch corrects a crash in uCOS-III on a new GDB connection when
RTOS autodetection is not used. The crash was caused by not checking if
the symbol list had been loaded prior to updating threads.
Change-Id: I64c5133e02fe22fc8d14584cc40d87b49c935b0b
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4719
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
eSi-RISC is a highly configurable microprocessor architecture for
embedded systems provided by EnSilica. This patch adds support for
32-bit targets and also includes an internal flash driver and
uC/OS-III RTOS support. This is a non-traditional target and required
a number of additional changes to support non-linear register numbers
and the 'p' packet in RTOS support for proper integration into
EnSilica's GDB port.
Change-Id: I59d5c40b3bb2ace1b1a01b2538bfab211adf113f
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4660
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
This patch makes the cmd_queue_scan_field_clone function public. This
permits targets to insert fields without affecting the submitted
scan_field list. This will be used in an upcoming target implementation
that needs to insert additional padding bits.
Change-Id: I8fbd3b9b4e413432471f4f1444048932c8fa189e
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4082
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
This change adds optional support for a target to report architecture
information in the target description to GDB. This is needed by some GDB
implementations to properly support remote target with custom behavior.
More information on the architecture element can be found here:
https://sourceware.org/gdb/onlinedocs/gdb/Target-Description-Format.html#Target-Description-Format
Change-Id: I57b19cae5ac3496256e4e5cc52cf6526ca5c322d
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4078
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
This patch adds support for p packet responses by targets configured
with RTOS support. This change required moving to a rtos_reg struct,
which is similar to struct reg used by targets, which resulted in
needing to update each stacking with register numbers. This patch also
allows targets with non-linear register numbers to function with RTOSes
as well.
Change-Id: I5b189d74110d6b6f2fa851a67ab0762ae6b1832f
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4121
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
This patch fixes a number of bugs caused by incomplete support for
non-existent registers. This is needed for targets that provide optional
registers or non-linear register numbers.
Change-Id: I216196e0051f28887a2c3da410959382369eed80
Signed-off-by: Steven Stallion <stallion@squareup.com>
Reviewed-on: http://openocd.zylin.com/4113
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Commit 5aceec2412 ("drivers:
cmsis-dap: pull up common connect code") breaks the driver and it
cannot connect anymore in JTAG mode.
The issue is caused in cmsis_dap_init() by anticipating the call to
cmsis_dap_usb_open(), which then sets cmsis_dap_handle and makes the
following test to always fail.
Actually the original code was quite tricky:
if (swd_mode)
do something that also sets cmsis_dap_handle;
if (cmsis_dap_handle == NULL)
do something for !swd_mode;
Convert the sequence of tricky "if"s in a single "if-then-else" to
handle clearly the cases swd_mode and !swd_mode.
Change-Id: I359a23bf26a3edc2461f4352daa0be83e78868f7
Fixes: 5aceec2412 ("drivers: cmsis-dap: pull up common connect code")
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4697
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Add configuration for the Renesas R-Car Generation 3 targets.
These are SoCs with Cortex A57s, A53s, and R7s. All cores
are supported.
Change-Id: I795233210e4f647a1a2a0adea7c058ae98b5db70
Signed-off-by: Adam Bass <adam.bass@renesas.com>
Reviewed-on: http://openocd.zylin.com/4669
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Virtual targets, like mem_ap, do not or cannot implement the required
functionality to accept a GDB connection. In the case of mem_ap, the
method get_gdb_reg_list() is missing and a following connection from
gdb causes OpenOCD to segfault.
OpenOCD opens a GDB port for each target; it's always possible to
connect, by mistake, GDB to one virtual target.
Add a method to check if the target supports GDB connections (for the
moment just checking if get_gdb_reg_list is implemented).
Skip opening a gdb server for every targets that don't support GDB
connections.
Change-Id: Ia439a43efe1a9adbb1771cd9d252db8ffa32eb9d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4676
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Change-Id: Ic00d3192642c682f370a6f7f8b70ae29744eb746
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4678
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I7c5c9720ded329848647f17db95f845e46c01c19
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4674
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
No need to reboot the Linux box when new rules are added to udev.
Suggest the command in the script header.
Change-Id: Ie95383bfd73914a3d2e2c05d77fa3eb32e68b7e2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4665
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The subunit of the debug unit is called the Flash Patch and Breakpoint
unit, abbreviated (by ARM no less) as FPB, not FBP.
Change-Id: Ia2f08470da705f0f1518feeca878f0f500507308
Signed-off-by: Christopher Head <chead@zaber.com>
Reviewed-on: http://openocd.zylin.com/4675
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Enables the programming of Write protection lock bits.
- Updated/re-factored with option_read, option_write and option_load commands.
Change-Id: I86358c7eb1285c3c0baac1564e46da8ced5fd025
Signed-off-by: Thomas Søhus <tls@ceepro.dk>
Reviewed-on: http://openocd.zylin.com/4654
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Commit 31c58c139d ("jtag: drivers: stlink: handle all versions with
single config") deprecates the use of "interface/stlink-v2-1.cfg" in
favor of a unique config file "interface/stlink.cfg".
Update the example in the documentation.
Change-Id: I1aed7c70e15f4edb4f81a3ee8e3bce575fde873b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4667
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The field ap_num in struct adiv5_private_config is already of type int.
Casting it to type int has no sense.
Change-Id: Ida642e808c02591bb58609425eccd096d404e2c4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4666
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested with Olimex ARM-USB-TINY-H adapter
Simple commands work fine but there are currently issues when attaching
remote gdb or running virt2phys:
https://sourceforge.net/p/openocd/tickets/201/
Change-Id: I86ccf1d93c5d23870bb522f92b3e2af190d529e8
Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-on: http://openocd.zylin.com/4646
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
The periodic poll scans all the targets in the same order they
have been declared in the configuration file.
When one target in a SMP node halts, the transition is detected
in the following poll and this triggers a halt request to all the
other cores of the SMP node.
The targets that will be polled afterwards will be identified as
"halted", but the targets already scanned will remain as
"running" until the next periodic poll.
This creates a race condition with GDB; GDB sets the breakpoints
when runs the target and removes them as soon as the target is
halted. When it receives the halt event, it starts removing the
breakpoints and fails on the targets that are still reported as
"running".
Fixed by polling all the targets in the SMP node before informing
GDB about the halt event.
This implementation is almost copy/paste from the one in aarch64.
Change-Id: Id2bd99f1e56b014e48e9e34ccb891b4219c518f8
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4622
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
To existing <bus>:<port>,<port> format add <bus>-<port>.<port> support.
The last format is used by kernel and other drivers.
Change-Id: I6528970d3af4f6a8bf7b27a0f7a763b5957fdf2b
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: http://openocd.zylin.com/4631
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Andreas Kemnade
Bohdan Tymkiv
Christopher Head
Paul Fertser
Spencer Oliver
xuguangxiao
Matthias Welwarsky
Antonio Borneo
Dominik Peklo
Tomas Vanek
Kevin Gillespie
Moritz Fischer
William D. Jones
Rohit Singh
Steven Stallion
Anders Westrup
Adam Bass
Tim Newsome
Thomas Søhus
Kai Geissdoerfer
Guido Günther
Oleksij Rempel