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156 Commits

Author SHA1 Message Date
Tim Newsome d942bce996 Conform to OpenOCD style guide. 
Change-Id: I2b23ac79639ed40e9d59db5c52ea2196df0349bc
 2017-12-26 11:38:11 -08:00
Tim Newsome 56ad0e5b30 Avoid another assertion failure. 
Change-Id: Ia54f778152974164697b712c360918e17a127d95
 2017-12-19 10:41:48 -08:00
Tim Newsome 10c17fdf17 Read misa before using it to check for extensions. 
Change-Id: I7a172d83055d8bd833e3349a5b22b47dd5f31f5c
 2017-12-19 10:41:48 -08:00
Tim Newsome ec1c814017 Don't rely on hart count until it's correct. 
Change-Id: I4e05eb091823b2e0fb481ca0b599072ba1ca70f2
 2017-12-19 10:41:48 -08:00
Tim Newsome 120477b2a2 Simplify examine() 
Now we don't have to play tricks fooling other parts of our code that
might assert.

Change-Id: Ia574378e1f95ed62d297e6b2e852245e58c9ffc9
 2017-12-19 10:41:48 -08:00
Tim Newsome f341db9f72 WIP xml register for 0.11. 
On HiFive1, FPRs show up with no name, and misa is 0x1105 instead of
0x40001105.

Change-Id: I4ee223c905ad7d860147014e7b6394668658c6ea
 2017-12-19 10:41:48 -08:00
Tim Newsome 8926e66d3a Hide unknown registers, which probably don't exist 
Change-Id: Iffa8fa5ff4b0a01abd30fa302b7087e2011337bf
 2017-12-19 10:41:48 -08:00
Tim Newsome 26a54452d2 Fix register names. 
Use the ABI ones for every register that we have one for.

Change-Id: I2a993abff416d2652dbe026b3fb498e144a5006f
 2017-12-19 10:41:48 -08:00
Tim Newsome 7c989698a1 WIP better CSR names, and include only existing 
Change-Id: I1a234ee07c417ba56da10a61fc2bdbdcc60490a8
 2017-12-19 10:41:48 -08:00
Tim Newsome a5cb0b2270 WIP. Hide FPRs if the hart doesn't support F/D. 
Change-Id: I988c0c36f2de8157d76874a697b3c054773b787d
 2017-12-19 10:41:48 -08:00
Tim Newsome e648856a41 `make all` debug tests now pass. 
Also properly support (I think) D extension on RV32.

Change-Id: I2f0162d36e4c18c251f99b6943403cef30d17d29
 2017-12-19 10:41:48 -08:00
Tim Newsome c421fefdcb Checkpoint that seems to work. 
Change-Id: I9599aacc256f6340795097732b6f8e8869c2099f
 2017-12-19 10:41:48 -08:00
Tim Newsome 6aff46adcc Fix cut and paste bug. 
Now reading 64-bit FPRs on 32-bit harts using scratch memory might work.

Change-Id: Ie8c0fc689386c6e724ecab5e8c855e725fa8dd97
 2017-12-14 13:51:13 -08:00
Tim Newsome 0a65a6527d Fix build. 
Change-Id: I4e3a36fac77fefa271ae9facbaa990fa330501ae
 2017-12-11 12:58:20 -08:00
Tim Newsome 52cdf286ca Add missing return. 
Change-Id: Ida32482903cdfd8eeb043088e84bb1f4f5ac673c
 2017-11-16 15:58:08 -08:00
Tim Newsome e28abf7c9e Merge branch 'riscv' into small_progbuf 
Change-Id: I1d48cb1f8448ebbf98c8bb369928d1e7a7a78c75
 2017-11-01 13:38:17 -07:00
Tim Newsome db754536e8 Support 64-bit FPRs on RV32. 
Because there is no instruction that moves just half of a 64-bit FPR
to/from a GPR, we need to use scratch memory for this operation. This
code can theoretically use:
1. DMI_DATA, if it is memory mapped in the target.
2. DMI_PROGBUF, if it is writable in the target.
3. A user-configured address.

I have only tested this code very lightly. One reason is that gdb thinks
that on RV32 harts every register is 32 bits wide. Another is that this
is mostly proof-of-concept to satisfy the small program buffer code
review, which I don't want to drag out forever.

Existing tests don't realize that floating support was broken with
RV32D, and don't realize that it still doesn't work because of the gdb
problem mentioned above.

This change improves Issue #110 but there's more work to be done.

Change-Id: I99b8a36e5fea26f1d9e16e36cf99adc7be26b944
 2017-10-27 13:15:22 -07:00
Tim Newsome 1acb128290 Remove unused variables. 
Change-Id: I678d0a65c22792895375dc6916381f81af8f83e4
 2017-10-25 13:37:56 -07:00
Tim Newsome 23bd6d08c9 Remove more unused functionality. 
Change-Id: I43283b9556c959f891a587fb39bdd1ab9206e8af
 2017-10-24 15:11:33 -07:00
Tim Newsome dbecbfee99 Add a fence after memory writes. 
Change-Id: I5137479b685f735aa573cec5d40170016c40f597
 2017-10-24 12:15:25 -07:00
Tim Newsome 59a0340261 Remove more unused code. 
Change-Id: I962660f58d948f85df6e073065e15e5d8f4a02b6
 2017-10-24 11:38:39 -07:00
Tim Newsome 8432b7cf3d Remove more unused code. 
Change-Id: Id91237c163d86e8f4d039503ca33b4ad7571ecd1
 2017-10-24 11:34:48 -07:00
Tim Newsome 5425c871c9 Properly fix memory read when encountering busy. 
Change-Id: I377054495e860076edc2f38d1cc0f11c23f98d3b
 2017-10-23 14:13:46 -07:00
Tim Newsome a3a137062d Pay attention to impebreak. 
This required updating debug_defines.h, which caused a few other small
cleanups as well.

Change-Id: I3c2cb418d7eff3093d7664c5563b2af5e8b530eb
 2017-10-18 14:21:23 -07:00
Tim Newsome 5d3f5c35d2 Still restore registers if an access failed. 
Change-Id: I11571f0926f69a34f95b4929f633fdecd3a4e810
 2017-10-18 12:32:41 -07:00
Tim Newsome 7edd9b1786 Fix FPR access. 
Change-Id: I1379de87904f1cf40b45d1a5490249e3ba90d7d0
 2017-10-18 11:47:15 -07:00
Tim Newsome a0623b2fa8 Don't crash when encountering RV64. 
Change-Id: Ie915ce830c3499919e4918ad443a5e225cf8c4d9
 2017-10-17 11:58:51 -07:00
Tim Newsome 65be0776d8 Memory read/write works if the core can keep up. 
Change-Id: Ieca50ece266fbc9d2ff16a5cc2e6b4b926ad5e6f
 2017-10-17 11:52:07 -07:00
Tim Newsome fbe2980eb7 MemTest64 passes. 
Change-Id: I75996b71c3f31025c89ef596a08e01d191405336
 2017-10-17 11:15:51 -07:00
Tim Newsome d94b38279a Memtest{16,32} pass. 
Change-Id: I15c2a4fd2bb9a7b30762d07f3b3a74d2f477746b
 2017-10-16 21:08:59 -07:00
Tim Newsome 7ec7bc32fe At least some memory writes work. 
Change-Id: I6fcf261341f10ec34df01bb844744439d02471a8
 2017-10-13 12:50:02 -07:00
Tim Newsome e7bb815e87 Register read/write might be working. 
Change-Id: I6c51d6157dde56d8cd666b4d30ec7bbc7a4bef9f
 2017-10-12 14:38:52 -07:00
Tim Newsome 94e8250713 WIP; doesn't work. 
Change-Id: Ia407e82ccbd2044ad61e0845d285dd5765154476
 2017-10-12 11:45:52 -07:00
Tim Newsome 77802af655 Remove duplicate progbuf size variable. 
Change-Id: I662ff84d13ecfc7faae51406a4df57a3643116f0
 2017-10-10 16:27:51 -07:00
Tim Newsome abe7eba25a Merge pull request #118 from riscv/priv 
Fix priv access
 2017-10-04 12:52:21 -07:00
Tim Newsome e64bb8c44a Fix priv access on 0.13. 2017-09-30 14:15:37 -07:00
Tim Newsome 744894e965 Better debug messages. 2017-09-26 15:40:41 -07:00
Tim Newsome f0195868d3 Fall back on ndmreset if hartreset is unsupported. 2017-09-21 14:53:12 -07:00
Tim Newsome fe36097ff8 Fix reset for multicore. 2017-09-21 12:42:40 -07:00
Tim Newsome 848fe0ffcf Cleaning up single-hart reset. 2017-09-19 17:41:52 -07:00
Tim Newsome 4e701669b7 Merge pull request #113 from riscv/macos_build 
Add clang build
 2017-09-19 14:11:10 -07:00
Tim Newsome 0abd94b50c Make constants unsigned for clang. 2017-09-18 14:23:59 -07:00
Tim Newsome 604dfa0dcc Try to fix some clang warnings. 2017-09-18 14:03:33 -07:00
Tim Newsome 157a67a98a Be more clear in multi-core systems without -rtos 
Don't print out there's a hart with XLEN of 0.
 2017-09-18 11:29:14 -07:00
Tim Newsome ce20be3d78 Add support for F extension. 2017-09-14 16:23:47 -07:00
Tim Newsome f9b2549e20 Tell user how to increase timeout. 2017-09-11 12:11:24 -07:00
Tim Newsome a6ec1a0e68 Add timeout to another infinite loop. 2017-09-11 11:35:47 -07:00
Tim Newsome 6721988ce3 Ensure read_memory() only reads each address once. 
Previously it might read an address multiple times if an abstract
command took longer to execute than expected.

The new implementations reads from the target how far it has gotten
along reading memory, and resumes from there if cmderr=busy.

This ended up being a bigger change than I envisioned, but in the end it
deleted more lines than it added, so I'm happy. :-)
 2017-08-29 17:25:04 -07:00
Tim Newsome 2efc415db4 Finally nailed memory read on slow targets 
The downloaded program now post-increments, and there's no longer an
attempt to read the current address from the target. This made it easier
to fix the problem where at the start of the loop the current address
was already read (in regular entry) or has not yet been read (when the
first round through the loop encountered busy more than once, or busy
was encountered at least once later on).
 2017-08-28 11:17:55 -07:00
Tim Newsome 5f53655e65 Fix off-by-one error. 2017-08-26 18:25:10 -07:00