ARM11 and newer cores include updated ETM modules. Recognize
their version codes and some key config differences. Sanity
checked on an OMAP2, with an ETM11RV r0p1 (ETMv3.1).
This still handles only scan chain 6, with at most 128 registers.
Newer cores (mostly, Cortex) will need to use the DAP instead.
Note that the newer ETM modules don't quite fit the quirky config
model of the older ones ... having more port widths is easy, but
the modes aren't the same. That still needs to change.
Fix a curious bug ... how did the register cache NOT get saved??
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Now that nothing uses the old ETM handle any more, remove it.
Add minimal header tweaks, letting non-ARM7 and non-ARM9 cores
access ETM facilities.
Now ARM11 could support standard ETM (and ETB) access as soon as
it derives from "struct arm" ... its scanchain 6 is used access
the ETM, just like ARM7 and ARM9.
The Cortex parts (both M3 and A8) will need modified access methods
(via ETM init parameters), so they use the DAP. Our first A8 target
(OMAP3) needs that for both ETM and ETB, but the M3 ETM isn't very
useful without SWO trace support (it's painfully stripped down), so
that support won't be worth adding for a while.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Make ETM itself use the new toplevel ETM handle, instead
of the to-be-removed lower level one. As of this patch,
nothing should be using the old ARM7/ARM9-specific handle.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename "struct armv4_5_common_s" as "struct arm". It needs
a bit more work to be properly generic, and to move out of
this header, but it's the best start we have on that today.
Add and initialize an optional ETM pointer, since that will
be the first thing that gets generalized.
The intent being: all ARMs should eventually derive from
this "struct arm", so they can reuse the current ETM logic.
(And later, more.) Currently the ARM cores that *don't* so
derive are only ARMv7-M (and thus Cortex-M3) and ARM11.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Various cleanups of ETM related code.
- Saner error return paths
- Simplify arm7_9 init ... no need for extra zeroing!
- Shrink some lines
- Tweak some diagnostics
- Use shorter name for ETM struct type.
- Don't exit()
and similar. The diagnostics look forward to having
this ETM code work with more than just ARM7/ARM9.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Remove most remaining uses of target->arch_info from ARM
infrastructure, where it hasn't already been updated.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The register names are perversely not documented as zero-indexed,
so rename them to match that convention. Also switch to lowercase
suffixes and infix numbering, matching ETB and EmbeddedICE usage.
Update docs to be a bit more accurate, especially regarding what
the "trigger" event can cause; and to split the issues into a few
more paragraphs, for clarity.
Make "configure" helptext point out that "oocd_trace" is prototype
hardware, not anything "real".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
- ETB
* report _actual_ hardware status, not just expected status
* add a missing diagnostic on a potential ETB setup error
* prefix any diagnostics with "ETB"
- ETM
* make "etm status" show ETM hardware status too, instead of
just traceport status (which previously was fake, sigh)
- Docs
* flesh out "etm tracemode" docs a bit
* clarify "etm status" ... previously it was traceport status
* explain "etm trigger_percent" as a *traceport* option
ETM+ETB tracing still isn't behaving, but now I can see that part of
the reason is that the ETB turns itself off almost immediately after
being enabled, and before collecting any data.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2790 b42882b7-edfa-0310-969c-e2dbd0fdcd60
only expose the registers which are actually present. They
could be missing for two basic reasons:
- This version might not support them at all; e.g. ETMv1.1
doesn't have some control/status registers. (My sample of
ARM9 boards shows all with ETMv1.3 support, FWIW.)
- The configuration on this chip may not populate as many
registers as possible; e.g. only two data value comparators
instead of eight.
Includes a bugfix in the "etm info" command: only one of the
two registers is missing on older silicon, so show the first
one before bailing.
Update ETM usage docs to explain that those registers need to be
written to configure what is traced, and that some ETM configs
are not yet handled. Also, give some examples of the kinds of
constrained trace which could be arranged.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2752 b42882b7-edfa-0310-969c-e2dbd0fdcd60
system, removes 20 non-existent registers ... but still includes
over 45 (!) ETM registers which don't even exist there ...
- Integrate the various tables to get one struct per register
- Get rid of needless per-register dynamic allocation
- Double check list of registers:
* Remove sixteen (!) non-registers for data comparators
* Remove four registers that imply newer ETM than we support
* Change some names to match current architecture specs
- Handle more register info
* some are write-only
* some are read-only
* record which versions have them, just in case
- Reorganize the registers to facilitate removing the extras
* group e.g. comparator/counter #N registers together
* add and use lookup-by-ID
git-svn-id: svn://svn.berlios.de/openocd/trunk@2751 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Add a header comment
- Line up the ETM context struct, pack it a bit
- Remove unused context_id (this doesn't support ETMv2 yet)
- Make most functions static
- Remove unused string table and other needless lines of code
- Correct "tracemode" helptext
Also provide and use an etm_reg_lookup() to find entries in the ETM
register cache. This will help cope with corrected contents of that
cache, which doesn't include entires for non-existent registers.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2750 b42882b7-edfa-0310-969c-e2dbd0fdcd60
this fn has something to do with the queue, which it does not as such.
git-svn-id: svn://svn.berlios.de/openocd/trunk@2050 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Provide basic documentation on the ARM ETM and ETB trace commands.
Fix minor goofs in registration of the ETM commands; and whitespace
issues in the proof-of-concept oocd_trace code. (Plus include a
ref to Dominic's email saying that it's just proof-of-concept code.)
Note that I'm still not sure whether the ETM support works. But
documenting how it's expected to work should help sort out which
behaviors are bugs, which will help get bugs patched.
ZW: whitespace changes were split out of this patch but will follow.
git-svn-id: svn://svn.berlios.de/openocd/trunk@1945 b42882b7-edfa-0310-969c-e2dbd0fdcd60
the key command_*() helper functions, fixng the bugs that turned up.
Several of these bugs were from misuse of PRIi64; that's for 64-bit
integers, NOT for "long long" or "u64" (which work best with %lld).
git-svn-id: svn://svn.berlios.de/openocd/trunk@1873 b42882b7-edfa-0310-969c-e2dbd0fdcd60
a problem with arm7_9_debug_entry not executing a code path upon crashes.
git-svn-id: svn://svn.berlios.de/openocd/trunk@669 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Work in progress to allow launching GDB/telnet server *before* jtag
chain enum, validate & examine
git-svn-id: svn://svn.berlios.de/openocd/trunk@569 b42882b7-edfa-0310-969c-e2dbd0fdcd60
More precise, less code.
- removed unused code in fileio.c
- Windows should now find debug_handler.bin
git-svn-id: svn://svn.berlios.de/openocd/trunk@390 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- bugfix in server.c
- removed unused parameter from jtag_add_ir_scan et al. This
wasn't necessary in hindsight but anyway.
- arm11 source committed but not not in Makefile.am/target.c for now.
git-svn-id: svn://svn.berlios.de/openocd/trunk@341 b42882b7-edfa-0310-969c-e2dbd0fdcd60
flash verify_image and flash erase_address.
- added patch for new parport_write_on_exit command.
Even this patch will fix some memory leaks.
(thanks too oyvind and Spen for these patches)
git-svn-id: svn://svn.berlios.de/openocd/trunk@240 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- use 'etm trigger_percent' setting when programming ETB trigger count
- fixed some small bugs in ETM trace analysis
- fixed minor bug in flash writing (thanks to Pavel Chromy)
git-svn-id: svn://svn.berlios.de/openocd/trunk@197 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- increase memory pseudo-image cache size to 1024 byte for improved trace analysis performance
- added OpenOCD+trace as an ETM capture driver example implementation
- new usbprog driver (thanks to Benedikt Sauter)
git-svn-id: svn://svn.berlios.de/openocd/trunk@186 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- added support for usbprog (thanks to Benedikt Sauter)
- make OpenOCD listen for WM_QUIT messages on windows (thanks to Pavel Chromy)
- register at_exit handler to do necessary unregistering (thanks to Pavel Chromy)
- added dummy ETM capture driver to allow ETM to be registered without a capture driver
git-svn-id: svn://svn.berlios.de/openocd/trunk@180 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- added support for scans coming from or ending in Shift-DR or Shift-IR to bitbang code (required for XScale debugging)
- cleaned up errror handlers. only use when there's a catchable error
- fix segfault when etm was configured without a valid driver
git-svn-id: svn://svn.berlios.de/openocd/trunk@176 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- fixed bug in ARM926EJ-S cache handling that caused cache linefills to be disabled after first debug entry
- added support for auto image type detection (thanks to Vincent Palatin)
- further work on ETM trace decoding (tested with a ETB interface using an ETM in normal 16-bit port mode, still experimental)
git-svn-id: svn://svn.berlios.de/openocd/trunk@169 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- reworked etm/etb into a generic etm part with trace capture drivers (currently only etb supported)
- added XScale debug handler binary to repository
- added Thumb disassembling (thanks to Vincent Palatin for this patch)
- added support for non-CFI compatible flashes to cfi driver (currently only SST39VFxxx devices supported)
This checkin is experimental, not suitable for general use
git-svn-id: svn://svn.berlios.de/openocd/trunk@155 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- str75x flash support (Thanks to Spencer Oliver)
- correct reporting of T-Bit in CPSR (Thanks to John Hartman for reporting this)
- core-state (ARM/Thumb) can be switched by modifying CPSR
- fixed bug in gdb_server register handling
- register values > 32-bit should now be supported
- several minor fixes and enhancements
git-svn-id: svn://svn.berlios.de/openocd/trunk@100 b42882b7-edfa-0310-969c-e2dbd0fdcd60
- Added state-move support to ftd2xx and bitbang JTAG drivers (required for XScale, possibly useful for other targets, too)
- various fixes
git-svn-id: svn://svn.berlios.de/openocd/trunk@78 b42882b7-edfa-0310-969c-e2dbd0fdcd60
Zachary T Welch
David Brownell
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