- calculate cycles since last executed instruction when cycle-accurate tracing is enabled
- increase memory pseudo-image cache size to 1024 byte for improved trace analysis performance - added OpenOCD+trace as an ETM capture driver example implementation - new usbprog driver (thanks to Benedikt Sauter) git-svn-id: svn://svn.berlios.de/openocd/trunk@186 b42882b7-edfa-0310-969c-e2dbd0fdcd60
This commit is contained in:
drath
parent
f251b925ff
commit
dbd95cb8a2
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@ -1,6 +1,14 @@
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/***************************************************************************
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* Copyright (C) 2007 by Benedikt Sauter sauter@ixbat.de *
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* based on Dominic Rath's usbprog.c *
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* based on Dominic Rath's amt_jtagaccel.c *
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* *
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* usbprog is a free programming adapter. You can easily install *
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* different firmware versions from an "online pool" over USB. *
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* The adapter can be used for programming and debugging AVR and ARM *
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* processors, as USB to RS232 converter, as JTAG interface or as *
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* simple I/O interface (5 lines). *
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* *
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* http://www.embedded-projects.net/usbprog *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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@ -17,6 +25,7 @@
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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@ -33,6 +42,12 @@
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#define VID 0x1781
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#define PID 0x0c62
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// Pins at usbprog
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#define TDO_BIT 0
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#define TDI_BIT 3
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#define TCK_BIT 2
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#define TMS_BIT 1
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int usbprog_execute_queue(void);
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int usbprog_speed(int speed);
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int usbprog_register_commands(struct command_context_s *cmd_ctx);
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@ -49,23 +64,14 @@ void usbprog_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size);
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jtag_interface_t usbprog_interface =
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{
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.name = "usbprog",
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.execute_queue = usbprog_execute_queue,
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.support_pathmove = 0,
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.speed = usbprog_speed,
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.register_commands = usbprog_register_commands,
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.init = usbprog_init,
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.quit = usbprog_quit
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};
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// pins from avr
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#define TDO_BIT 0
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#define TDI_BIT 3
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#define TCK_BIT 2
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#define TMS_BIT 1
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#define UNKOWN_COMMAND 0x00
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#define PORT_DIRECTION 0x01
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#define PORT_SET 0x02
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@ -76,6 +82,7 @@ jtag_interface_t usbprog_interface =
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#define READ_TDO 0x07
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#define WRITE_AND_READ 0x08
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#define WRITE_TMS 0x09
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#define WRITE_TMS_CHAIN 0x0A
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struct usbprog_jtag
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{
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@ -95,6 +102,11 @@ void usbprog_jtag_write_tdi(struct usbprog_jtag *usbprog_jtag, char * buffer, in
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void usbprog_jtag_write_and_read(struct usbprog_jtag *usbprog_jtag, char * buffer, int size);
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void usbprog_jtag_write_tms(struct usbprog_jtag *usbprog_jtag, char tms_scan);
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char tms_chain[64];
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int tms_chain_index;
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void usbprog_jtag_tms_collect(char tms_scan);
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void usbprog_jtag_tms_send(struct usbprog_jtag *usbprog_jtag);
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void usbprog_write(int tck, int tms, int tdi);
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void usbprog_reset(int trst, int srst);
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@ -201,6 +213,7 @@ int usbprog_init(void)
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{
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usbprog_jtag_handle = usbprog_jtag_open();
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tms_chain_index=0;
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if(usbprog_jtag_handle==0){
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ERROR("Can't find USB JTAG Interface! Please check connection and permissions.");
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return ERROR_JTAG_INIT_FAILED;
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@ -245,11 +258,6 @@ void usbprog_state_move(void) {
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tms = (tms_scan >> i) & 1;
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}
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// moved into firmware
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// INFO("4");
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// koennte man in tms verlagern
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//usbprog_write(0, tms, 0);
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cur_state = end_state;
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}
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@ -295,23 +303,25 @@ void usbprog_runtest(int num_cycles)
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enum tap_state saved_end_state = end_state;
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/* only do a state_move when we're not already in RTI */
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/* only do a state_move when we're not already in RTI */
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if (cur_state != TAP_RTI)
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{
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usbprog_end_state(TAP_RTI);
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//INFO("6");
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usbprog_state_move();
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}
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/* execute num_cycles */
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if(num_cycles>0)
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{
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INFO("5");
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usbprog_write(0, 0, 0);
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}
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else {
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usbprog_jtag_tms_send(usbprog_jtag_handle);
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}
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for (i = 0; i < num_cycles; i++)
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{
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INFO("3");
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usbprog_write(1, 0, 0);
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usbprog_write(0, 0, 0);
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}
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@ -336,10 +346,11 @@ void usbprog_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size)
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else
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usbprog_end_state(TAP_SD);
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//INFO("7");
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usbprog_state_move();
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usbprog_end_state(saved_end_state);
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usbprog_jtag_tms_send(usbprog_jtag_handle);
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if (type == SCAN_OUT) {
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usbprog_jtag_write_tdi(usbprog_jtag_handle,buffer, scan_size);
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}
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@ -363,8 +374,6 @@ void usbprog_scan(int ir_scan, enum scan_type type, u8 *buffer, int scan_size)
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void usbprog_write(int tck, int tms, int tdi)
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{
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//INFO("->USBPROG SLICE");
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//DEBUG("slice tck %i tms %i tdi %i",tck,tms,tdi);
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unsigned char output_value=0x00;
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if (tms)
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@ -380,7 +389,6 @@ void usbprog_write(int tck, int tms, int tdi)
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/* (1) assert or (0) deassert reset lines */
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void usbprog_reset(int trst, int srst)
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{
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//INFO("->USBPROG RESET");
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DEBUG("trst: %i, srst: %i", trst, srst);
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if(trst)
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void usbprog_jtag_write_tms(struct usbprog_jtag *usbprog_jtag, char tms_scan)
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{
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char tmp[2]; // fastes packet size for usb controller
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tmp[0] = WRITE_TMS;
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tmp[1] = tms_scan;
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usb_bulk_write(usbprog_jtag->usb_handle,3,tmp,2,1000);
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usbprog_jtag_tms_collect(tms_scan);
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}
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@ -630,3 +635,21 @@ int usbprog_jtag_get_bit(struct usbprog_jtag *usbprog_jtag, int bit)
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return 0;
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}
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void usbprog_jtag_tms_collect(char tms_scan){
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tms_chain[tms_chain_index]=tms_scan;
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tms_chain_index++;
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}
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void usbprog_jtag_tms_send(struct usbprog_jtag *usbprog_jtag){
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int i;
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if(tms_chain_index>0) {
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char tmp[tms_chain_index+2];
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tmp[0] = WRITE_TMS_CHAIN;
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tmp[1] = (char)(tms_chain_index);
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for(i=0;i<tms_chain_index+1;i++)
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tmp[2+i] = tms_chain[i];
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usb_bulk_write(usbprog_jtag->usb_handle,3,tmp,tms_chain_index+2,1000);
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tms_chain_index=0;
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}
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}
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@ -1,11 +1,18 @@
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if OOCD_TRACE
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OOCD_TRACE_FILES = oocd_trace.c
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else
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OOCD_TRACE_FILES =
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endif
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INCLUDES = -I$(top_srcdir)/src/gdb -I$(top_srcdir)/src/helper -I$(top_srcdir)/src/jtag -I$(top_srcdir)/src/xsvf $(all_includes)
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METASOURCES = AUTO
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noinst_LIBRARIES = libtarget.a
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libtarget_a_SOURCES = target.c register.c breakpoints.c armv4_5.c embeddedice.c etm.c arm7tdmi.c arm9tdmi.c \
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arm_jtag.c arm7_9_common.c algorithm.c arm920t.c arm720t.c armv4_5_mmu.c armv4_5_cache.c arm_disassembler.c \
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arm966e.c arm926ejs.c etb.c xscale.c arm_simulator.c image.c armv7m.c cortex_m3.c cortex_swjdp.c \
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etm_dummy.c
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etm_dummy.c $(OOCD_TRACE_FILES)
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noinst_HEADERS = target.h register.h armv4_5.h embeddedice.h etm.h arm7tdmi.h arm9tdmi.h \
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arm_jtag.h arm7_9_common.h arm920t.h arm720t.h armv4_5_mmu.h armv4_5_cache.h breakpoints.h algorithm.h \
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arm_disassembler.h arm966e.h arm926ejs.h etb.h xscale.h arm_simulator.h image.h armv7m.h cortex_m3.h cortex_swjdp.h \
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etm_dummy.h
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etm_dummy.h oocd_trace.h
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169
src/target/etm.c
169
src/target/etm.c
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@ -285,12 +285,12 @@ reg_cache_t* etm_build_reg_cache(target_t *target, arm_jtag_t *jtag_info, etm_co
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reg_cache->next = etb_build_reg_cache(etb);
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etb->reg_cache = reg_cache->next;
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if (etm_ctx->capture_driver->init(etm_ctx) != ERROR_OK)
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{
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ERROR("ETM capture driver initialization failed");
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exit(-1);
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}
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}
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if (etm_ctx->capture_driver->init(etm_ctx) != ERROR_OK)
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{
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ERROR("ETM capture driver initialization failed");
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exit(-1);
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}
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return reg_cache;
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@ -466,11 +466,17 @@ int etm_store_reg(reg_t *reg)
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*/
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extern etm_capture_driver_t etb_capture_driver;
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extern etm_capture_driver_t etm_dummy_capture_driver;
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#if BUILD_OOCD_TRACE == 1
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extern etm_capture_driver_t oocd_trace_capture_driver;
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#endif
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etm_capture_driver_t *etm_capture_drivers[] =
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{
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&etb_capture_driver,
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&etm_dummy_capture_driver,
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#if BUILD_OOCD_TRACE == 1
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&oocd_trace_capture_driver,
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#endif
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NULL
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};
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@ -753,6 +759,8 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
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u32 next_pc = ctx->current_pc;
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u32 old_data_index = ctx->data_index;
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u32 old_data_half = ctx->data_half;
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u32 old_index = ctx->pipe_index;
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u32 cycles = 0;
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if (ctx->trace_data[ctx->pipe_index].flags & ETMV1_TRIGGER_CYCLE)
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{
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@ -762,6 +770,8 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
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/* if we don't have a valid pc skip until we reach an indirect branch */
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if ((!ctx->pc_ok) && (pipestat != STAT_BE))
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{
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if (pipestat == STAT_IE)
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ctx->last_instruction = ctx->pipe_index;
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ctx->pipe_index++;
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continue;
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}
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@ -800,27 +810,32 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
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{
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case 0x0: /* normal PC change */
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next_pc = ctx->last_branch;
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ctx->last_instruction = old_index;
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break;
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case 0x1: /* tracing enabled */
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command_print(cmd_ctx, "--- tracing enabled at 0x%8.8x ---", ctx->last_branch);
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ctx->current_pc = ctx->last_branch;
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ctx->pipe_index++;
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ctx->last_instruction = old_index;
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continue;
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break;
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case 0x2: /* trace restarted after FIFO overflow */
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command_print(cmd_ctx, "--- trace restarted after FIFO overflow at 0x%8.8x ---", ctx->last_branch);
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ctx->current_pc = ctx->last_branch;
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ctx->pipe_index++;
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ctx->last_instruction = old_index;
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continue;
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break;
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case 0x3: /* exit from debug state */
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command_print(cmd_ctx, "--- exit from debug state at 0x%8.8x ---", ctx->last_branch);
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ctx->current_pc = ctx->last_branch;
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ctx->pipe_index++;
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ctx->last_instruction = old_index;
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continue;
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break;
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case 0x4: /* periodic synchronization point */
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next_pc = ctx->last_branch;
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ctx->last_instruction = old_index;
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break;
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default: /* reserved */
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ERROR("BUG: branch reason code 0x%x is reserved", ctx->last_branch_reason);
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@ -839,6 +854,8 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
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if (((ctx->last_branch >= 0x0) && (ctx->last_branch <= 0x20))
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|| ((ctx->last_branch >= 0xffff0000) && (ctx->last_branch <= 0xffff0020)))
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{
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ctx->last_instruction = old_index;
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if ((ctx->last_branch & 0xff) == 0x10)
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{
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command_print(cmd_ctx, "data abort");
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@ -871,6 +888,9 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
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/* TODO: handle incomplete images */
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}
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}
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cycles = old_index - ctx->last_instruction;
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ctx->last_instruction = old_index;
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}
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if ((pipestat == STAT_ID) || (pipestat == STAT_BD))
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@ -963,8 +983,22 @@ int etmv1_analyze_trace(etm_context_t *ctx, struct command_context_s *cmd_ctx)
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if ((pipestat != STAT_TD) && (pipestat != STAT_WT))
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{
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command_print(cmd_ctx, "%s%s",
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instruction.text, (pipestat == STAT_IN) ? " (not executed)" : "");
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char cycles_text[32] = "";
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/* if the trace was captured with cycle accurate tracing enabled,
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* output the number of cycles since the last executed instruction
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*/
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if (ctx->tracemode & ETMV1_CYCLE_ACCURATE)
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{
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snprintf(cycles_text, 32, " (%i %s)",
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cycles,
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(cycles == 1) ? "cycle" : "cycles");
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}
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command_print(cmd_ctx, "%s%s%s",
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instruction.text,
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(pipestat == STAT_IN) ? " (not executed)" : "",
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cycles_text);
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ctx->current_pc = next_pc;
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|
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|
|
@ -1265,6 +1299,7 @@ int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char
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}
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etm_ctx->target = target;
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etm_ctx->trigger_percent = 50;
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etm_ctx->trace_data = NULL;
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etm_ctx->trace_depth = 0;
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etm_ctx->portmode = portmode;
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|
|
@ -1280,6 +1315,7 @@ int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char
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etm_ctx->last_ptr = 0x0;
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etm_ctx->ptr_ok = 0x0;
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etm_ctx->context_id = 0x0;
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etm_ctx->last_instruction = 0;
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arm7_9->etm_ctx = etm_ctx;
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|
|
@ -1288,6 +1324,78 @@ int handle_etm_config_command(struct command_context_s *cmd_ctx, char *cmd, char
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return ERROR_OK;
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}
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|
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int handle_etm_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
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{
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target_t *target;
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armv4_5_common_t *armv4_5;
|
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arm7_9_common_t *arm7_9;
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reg_t *etm_config_reg;
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reg_t *etm_sys_config_reg;
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int max_port_size;
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target = get_current_target(cmd_ctx);
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if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
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{
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command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
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return ERROR_OK;
|
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}
|
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|
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if (!arm7_9->etm_ctx)
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{
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command_print(cmd_ctx, "current target doesn't have an ETM configured");
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return ERROR_OK;
|
||||
}
|
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|
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etm_config_reg = &arm7_9->etm_ctx->reg_cache->reg_list[ETM_CONFIG];
|
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etm_sys_config_reg = &arm7_9->etm_ctx->reg_cache->reg_list[ETM_SYS_CONFIG];
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|
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etm_get_reg(etm_config_reg);
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command_print(cmd_ctx, "pairs of address comparators: %i", buf_get_u32(etm_config_reg->value, 0, 4));
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command_print(cmd_ctx, "pairs of data comparators: %i", buf_get_u32(etm_config_reg->value, 4, 4));
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command_print(cmd_ctx, "memory map decoders: %i", buf_get_u32(etm_config_reg->value, 8, 4));
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command_print(cmd_ctx, "number of counters: %i", buf_get_u32(etm_config_reg->value, 12, 4));
|
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command_print(cmd_ctx, "sequencer %spresent",
|
||||
(buf_get_u32(etm_config_reg->value, 16, 1) == 1) ? "" : "not ");
|
||||
command_print(cmd_ctx, "number of ext. inputs: %i", buf_get_u32(etm_config_reg->value, 17, 3));
|
||||
command_print(cmd_ctx, "number of ext. outputs: %i", buf_get_u32(etm_config_reg->value, 20, 3));
|
||||
command_print(cmd_ctx, "FIFO full %spresent",
|
||||
(buf_get_u32(etm_config_reg->value, 23, 1) == 1) ? "" : "not ");
|
||||
command_print(cmd_ctx, "protocol version: %i", buf_get_u32(etm_config_reg->value, 28, 3));
|
||||
|
||||
etm_get_reg(etm_sys_config_reg);
|
||||
|
||||
switch (buf_get_u32(etm_sys_config_reg->value, 0, 3))
|
||||
{
|
||||
case 0:
|
||||
max_port_size = 4;
|
||||
break;
|
||||
case 1:
|
||||
max_port_size = 8;
|
||||
break;
|
||||
case 2:
|
||||
max_port_size = 16;
|
||||
break;
|
||||
}
|
||||
command_print(cmd_ctx, "max. port size: %i", max_port_size);
|
||||
|
||||
command_print(cmd_ctx, "half-rate clocking %ssupported",
|
||||
(buf_get_u32(etm_sys_config_reg->value, 3, 1) == 1) ? "" : "not ");
|
||||
command_print(cmd_ctx, "full-rate clocking %ssupported",
|
||||
(buf_get_u32(etm_sys_config_reg->value, 4, 1) == 1) ? "" : "not ");
|
||||
command_print(cmd_ctx, "normal trace format %ssupported",
|
||||
(buf_get_u32(etm_sys_config_reg->value, 5, 1) == 1) ? "" : "not ");
|
||||
command_print(cmd_ctx, "multiplex trace format %ssupported",
|
||||
(buf_get_u32(etm_sys_config_reg->value, 6, 1) == 1) ? "" : "not ");
|
||||
command_print(cmd_ctx, "demultiplex trace format %ssupported",
|
||||
(buf_get_u32(etm_sys_config_reg->value, 7, 1) == 1) ? "" : "not ");
|
||||
command_print(cmd_ctx, "FIFO full %ssupported",
|
||||
(buf_get_u32(etm_sys_config_reg->value, 8, 1) == 1) ? "" : "not ");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int handle_etm_status_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
target_t *target;
|
||||
|
|
@ -1540,6 +1648,46 @@ int handle_etm_load_command(struct command_context_s *cmd_ctx, char *cmd, char *
|
|||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int handle_etm_trigger_percent_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
target_t *target;
|
||||
armv4_5_common_t *armv4_5;
|
||||
arm7_9_common_t *arm7_9;
|
||||
etm_context_t *etm_ctx;
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
|
||||
if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (!(etm_ctx = arm7_9->etm_ctx))
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (argc > 0)
|
||||
{
|
||||
u32 new_value = strtoul(args[0], NULL, 0);
|
||||
|
||||
if ((new_value < 2) || (new_value > 100))
|
||||
{
|
||||
command_print(cmd_ctx, "valid settings are 2% to 100%");
|
||||
}
|
||||
else
|
||||
{
|
||||
etm_ctx->trigger_percent = new_value;
|
||||
}
|
||||
}
|
||||
|
||||
command_print(cmd_ctx, "%i percent of the tracebuffer reserved for after the trigger", etm_ctx->trigger_percent);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int handle_etm_start_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
target_t *target;
|
||||
|
|
@ -1660,6 +1808,11 @@ int etm_register_user_commands(struct command_context_s *cmd_ctx)
|
|||
register_command(cmd_ctx, etm_cmd, "tracemode", handle_etm_tracemode_command,
|
||||
COMMAND_EXEC, "configure trace mode <none|data|address|all> <context id bits> <cycle accurate> <branch output");
|
||||
|
||||
register_command(cmd_ctx, etm_cmd, "info", handle_etm_info_command,
|
||||
COMMAND_EXEC, "display info about the current target's ETM");
|
||||
|
||||
register_command(cmd_ctx, etm_cmd, "trigger_percent <percent>", handle_etm_trigger_percent_command,
|
||||
COMMAND_EXEC, "amount (<percent>) of trace buffer to be filled after the trigger occured");
|
||||
register_command(cmd_ctx, etm_cmd, "status", handle_etm_status_command,
|
||||
COMMAND_EXEC, "display current target's ETM status");
|
||||
register_command(cmd_ctx, etm_cmd, "start", handle_etm_start_command,
|
||||
|
|
|
|||
|
|
@ -145,6 +145,7 @@ typedef struct etm_context_s
|
|||
reg_cache_t *reg_cache; /* ETM register cache */
|
||||
etm_capture_driver_t *capture_driver; /* driver used to access ETM data */
|
||||
void *capture_driver_priv; /* capture driver private data */
|
||||
u32 trigger_percent; /* percent of trace buffer to be filled after the trigger */
|
||||
trace_status_t capture_status; /* current state of capture run */
|
||||
etmv1_trace_data_t *trace_data; /* trace data */
|
||||
u32 trace_depth; /* number of trace cycles to be analyzed, 0 if no trace data available */
|
||||
|
|
@ -162,6 +163,7 @@ typedef struct etm_context_s
|
|||
u32 last_ptr; /* address of the last data access */
|
||||
u32 ptr_ok; /* whether last_ptr is valid */
|
||||
u32 context_id; /* context ID of the code being traced */
|
||||
u32 last_instruction; /* index of last instruction executed (to calculate cycle timings) */
|
||||
} etm_context_t;
|
||||
|
||||
/* PIPESTAT values */
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@
|
|||
#define IMAGE_MAX_ERROR_STRING (256)
|
||||
#define IMAGE_MAX_SECTIONS (128)
|
||||
|
||||
#define IMAGE_MEMORY_CACHE_SIZE (128)
|
||||
#define IMAGE_MEMORY_CACHE_SIZE (1024)
|
||||
|
||||
typedef enum image_type
|
||||
{
|
||||
|
|
|
|||
|
|
@ -0,0 +1,429 @@
|
|||
/***************************************************************************
|
||||
* Copyright (C) 2007 by Dominic Rath *
|
||||
* Dominic.Rath@gmx.de *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program; if not, write to the *
|
||||
* Free Software Foundation, Inc., *
|
||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||
***************************************************************************/
|
||||
#ifdef HAVE_CONFIG_H
|
||||
#include "config.h"
|
||||
#endif
|
||||
|
||||
#include <string.h>
|
||||
#include <errno.h>
|
||||
|
||||
#include "oocd_trace.h"
|
||||
#include "etm.h"
|
||||
|
||||
#include "log.h"
|
||||
#include "types.h"
|
||||
#include "binarybuffer.h"
|
||||
#include "target.h"
|
||||
#include "register.h"
|
||||
#include "jtag.h"
|
||||
#include "arm7_9_common.h"
|
||||
|
||||
#include <stdlib.h>
|
||||
|
||||
int oocd_trace_read_reg(oocd_trace_t *oocd_trace, int reg, u32 *value)
|
||||
{
|
||||
size_t bytes_written, bytes_read, bytes_to_read;
|
||||
u8 cmd;
|
||||
|
||||
cmd = 0x10 | (reg & 0x7);
|
||||
bytes_written = write(oocd_trace->tty_fd, &cmd, 1);
|
||||
|
||||
bytes_to_read = 4;
|
||||
while (bytes_to_read > 0)
|
||||
{
|
||||
bytes_read = read(oocd_trace->tty_fd, ((u8*)value) + 4 - bytes_to_read, bytes_to_read);
|
||||
bytes_to_read -= bytes_read;
|
||||
}
|
||||
|
||||
DEBUG("reg #%i: 0x%8.8x\n", reg, *value);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int oocd_trace_write_reg(oocd_trace_t *oocd_trace, int reg, u32 value)
|
||||
{
|
||||
size_t bytes_written;
|
||||
u8 data[5];
|
||||
|
||||
data[0] = 0x18 | (reg & 0x7);
|
||||
data[1] = value & 0xff;
|
||||
data[2] = (value & 0xff00) >> 8;
|
||||
data[3] = (value & 0xff0000) >> 16;
|
||||
data[4] = (value & 0xff000000) >> 24;
|
||||
|
||||
bytes_written = write(oocd_trace->tty_fd, data, 5);
|
||||
DEBUG("reg #%i: 0x%8.8x\n", reg, value);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int oocd_trace_read_memory(oocd_trace_t *oocd_trace, u8 *data, u32 address, u32 size)
|
||||
{
|
||||
size_t bytes_written, bytes_read, bytes_to_read;
|
||||
u8 cmd;
|
||||
int i;
|
||||
|
||||
oocd_trace_write_reg(oocd_trace, OOCD_TRACE_ADDRESS, address);
|
||||
oocd_trace_write_reg(oocd_trace, OOCD_TRACE_SDRAM_COUNTER, size);
|
||||
|
||||
cmd = 0x20;
|
||||
bytes_written = write(oocd_trace->tty_fd, &cmd, 1);
|
||||
|
||||
bytes_to_read = size * 16;
|
||||
while (bytes_to_read > 0)
|
||||
{
|
||||
if ((bytes_read = read(oocd_trace->tty_fd,
|
||||
((u8*)data) + (size * 16) - bytes_to_read, bytes_to_read)) < 0)
|
||||
{
|
||||
DEBUG("read() returned %i (%s)", bytes_read, strerror(errno));
|
||||
}
|
||||
else
|
||||
bytes_to_read -= bytes_read;
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int oocd_trace_init(etm_context_t *etm_ctx)
|
||||
{
|
||||
u8 trash[256];
|
||||
oocd_trace_t *oocd_trace = etm_ctx->capture_driver_priv;
|
||||
size_t bytes_written, bytes_read, bytes_to_read;
|
||||
|
||||
oocd_trace->tty_fd = open(oocd_trace->tty, O_RDWR | O_NOCTTY | O_NONBLOCK);
|
||||
|
||||
if(oocd_trace->tty_fd < 0)
|
||||
{
|
||||
ERROR("can't open tty");
|
||||
return ERROR_ETM_CAPTURE_INIT_FAILED;
|
||||
}
|
||||
|
||||
/* clear input & output buffers, then switch to "blocking mode" */
|
||||
tcflush(oocd_trace->tty_fd, TCOFLUSH);
|
||||
tcflush(oocd_trace->tty_fd, TCIFLUSH);
|
||||
fcntl(oocd_trace->tty_fd, F_SETFL, fcntl(oocd_trace->tty_fd, F_GETFL) & ~O_NONBLOCK);
|
||||
|
||||
tcgetattr(oocd_trace->tty_fd, &oocd_trace->oldtio); /* save current port settings */
|
||||
|
||||
bzero(&oocd_trace->newtio, sizeof(oocd_trace->newtio));
|
||||
oocd_trace->newtio.c_cflag = CS8 | CLOCAL | CREAD | B2500000;
|
||||
|
||||
oocd_trace->newtio.c_iflag = IGNPAR | IGNBRK | IXON | IXOFF;
|
||||
oocd_trace->newtio.c_oflag = 0;
|
||||
|
||||
/* set input mode (non-canonical, no echo,...) */
|
||||
oocd_trace->newtio.c_lflag = 0;
|
||||
|
||||
cfmakeraw(&oocd_trace->newtio);
|
||||
oocd_trace->newtio.c_cc[VTIME] = 1; /* inter-character timer used */
|
||||
oocd_trace->newtio.c_cc[VMIN] = 0; /* blocking read until 0 chars received */
|
||||
|
||||
tcflush(oocd_trace->tty_fd, TCIFLUSH);
|
||||
tcsetattr(oocd_trace->tty_fd, TCSANOW, &oocd_trace->newtio);
|
||||
|
||||
/* occasionally one bogus character is left in the input buffer
|
||||
* read up any leftover characters to ensure communication is in sync */
|
||||
while ((bytes_read = read(oocd_trace->tty_fd, trash, sizeof(trash))) > 0)
|
||||
{
|
||||
DEBUG("%i bytes read\n", bytes_read);
|
||||
};
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
trace_status_t oocd_trace_status(etm_context_t *etm_ctx)
|
||||
{
|
||||
oocd_trace_t *oocd_trace = etm_ctx->capture_driver_priv;
|
||||
u32 status;
|
||||
|
||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status);
|
||||
|
||||
/* if tracing is currently idle, return this information */
|
||||
if (etm_ctx->capture_status == TRACE_IDLE)
|
||||
{
|
||||
return etm_ctx->capture_status;
|
||||
}
|
||||
else if (etm_ctx->capture_status & TRACE_RUNNING)
|
||||
{
|
||||
/* check Full bit to identify an overflow */
|
||||
if (status & 0x4)
|
||||
etm_ctx->capture_status |= TRACE_OVERFLOWED;
|
||||
|
||||
/* check Triggered bit to identify trigger condition */
|
||||
if (status & 0x2)
|
||||
etm_ctx->capture_status |= TRACE_TRIGGERED;
|
||||
|
||||
if (status & 0x1)
|
||||
{
|
||||
etm_ctx->capture_status &= ~TRACE_RUNNING;
|
||||
etm_ctx->capture_status |= TRACE_COMPLETED;
|
||||
}
|
||||
}
|
||||
|
||||
return etm_ctx->capture_status;
|
||||
}
|
||||
|
||||
int oocd_trace_read_trace(etm_context_t *etm_ctx)
|
||||
{
|
||||
oocd_trace_t *oocd_trace = etm_ctx->capture_driver_priv;
|
||||
u32 status, address;
|
||||
u32 first_frame = 0x0;
|
||||
u32 num_frames = 1048576;
|
||||
u8 *trace_data;
|
||||
int i;
|
||||
|
||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status);
|
||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_ADDRESS, &address);
|
||||
|
||||
/* check if we overflowed, and adjust first frame of the trace accordingly
|
||||
* if we didn't overflow, read only up to the frame that would be written next,
|
||||
* i.e. don't read invalid entries
|
||||
*/
|
||||
if (status & 0x4)
|
||||
first_frame = address;
|
||||
else
|
||||
num_frames = address;
|
||||
|
||||
/* read data into temporary array for unpacking
|
||||
* one frame from OpenOCD+trace corresponds to 16 trace cycles
|
||||
*/
|
||||
trace_data = malloc(sizeof(u8) * num_frames * 16);
|
||||
oocd_trace_read_memory(oocd_trace, trace_data, first_frame, num_frames);
|
||||
|
||||
if (etm_ctx->trace_depth > 0)
|
||||
{
|
||||
free(etm_ctx->trace_data);
|
||||
}
|
||||
|
||||
etm_ctx->trace_depth = num_frames * 16;
|
||||
etm_ctx->trace_data = malloc(sizeof(etmv1_trace_data_t) * etm_ctx->trace_depth);
|
||||
|
||||
for (i = 0; i < num_frames * 16; i++)
|
||||
{
|
||||
etm_ctx->trace_data[i].pipestat = (trace_data[i] & 0x7);
|
||||
etm_ctx->trace_data[i].packet = (trace_data[i] & 0x78) >> 3;
|
||||
etm_ctx->trace_data[i].flags = 0;
|
||||
|
||||
if ((trace_data[i] & 0x80) >> 7)
|
||||
{
|
||||
etm_ctx->trace_data[i].flags |= ETMV1_TRACESYNC_CYCLE;
|
||||
}
|
||||
|
||||
if (etm_ctx->trace_data[i].pipestat == STAT_TR)
|
||||
{
|
||||
etm_ctx->trace_data[i].pipestat = etm_ctx->trace_data[i].packet & 0x7;
|
||||
etm_ctx->trace_data[i].flags |= ETMV1_TRIGGER_CYCLE;
|
||||
}
|
||||
}
|
||||
|
||||
free(trace_data);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int oocd_trace_start_capture(etm_context_t *etm_ctx)
|
||||
{
|
||||
oocd_trace_t *oocd_trace = etm_ctx->capture_driver_priv;
|
||||
u32 control = 0x1; /* 0x1: enabled */
|
||||
u32 trigger_count;
|
||||
|
||||
if (((etm_ctx->portmode & ETM_PORT_MODE_MASK) != ETM_PORT_NORMAL)
|
||||
|| ((etm_ctx->portmode & ETM_PORT_WIDTH_MASK) != ETM_PORT_4BIT))
|
||||
{
|
||||
DEBUG("OpenOCD+trace only supports normal 4-bit ETM mode");
|
||||
return ERROR_ETM_PORTMODE_NOT_SUPPORTED;
|
||||
}
|
||||
|
||||
if ((etm_ctx->portmode & ETM_PORT_CLOCK_MASK) == ETM_PORT_HALF_CLOCK)
|
||||
{
|
||||
control |= 0x2; /* half rate clock, capture at twice the clock rate */
|
||||
}
|
||||
|
||||
/* OpenOCD+trace holds up to 16 million samples,
|
||||
* but trigger counts is set in multiples of 16 */
|
||||
trigger_count = (1048576 * etm_ctx->trigger_percent) / 100;
|
||||
|
||||
/* capturing always starts at address zero */
|
||||
oocd_trace_write_reg(oocd_trace, OOCD_TRACE_ADDRESS, 0x0);
|
||||
oocd_trace_write_reg(oocd_trace, OOCD_TRACE_TRIGGER_COUNTER, trigger_count);
|
||||
oocd_trace_write_reg(oocd_trace, OOCD_TRACE_CONTROL, control);
|
||||
|
||||
/* we're starting a new trace, initialize capture status */
|
||||
etm_ctx->capture_status = TRACE_RUNNING;
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int oocd_trace_stop_capture(etm_context_t *etm_ctx)
|
||||
{
|
||||
oocd_trace_t *oocd_trace = etm_ctx->capture_driver_priv;
|
||||
|
||||
/* trace stopped, just clear running flag, but preserve others */
|
||||
etm_ctx->capture_status &= ~TRACE_RUNNING;
|
||||
|
||||
oocd_trace_write_reg(oocd_trace, OOCD_TRACE_CONTROL, 0x0);
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
etm_capture_driver_t oocd_trace_capture_driver =
|
||||
{
|
||||
.name = "oocd_trace",
|
||||
.register_commands = oocd_trace_register_commands,
|
||||
.init = oocd_trace_init,
|
||||
.status = oocd_trace_status,
|
||||
.start_capture = oocd_trace_start_capture,
|
||||
.stop_capture = oocd_trace_stop_capture,
|
||||
.read_trace = oocd_trace_read_trace,
|
||||
};
|
||||
|
||||
int handle_oocd_trace_config_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
target_t *target;
|
||||
armv4_5_common_t *armv4_5;
|
||||
arm7_9_common_t *arm7_9;
|
||||
|
||||
if (argc != 2)
|
||||
{
|
||||
ERROR("incomplete 'oocd_trace config <target> <tty>' command");
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
|
||||
if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (arm7_9->etm_ctx)
|
||||
{
|
||||
oocd_trace_t *oocd_trace = malloc(sizeof(oocd_trace_t));
|
||||
|
||||
arm7_9->etm_ctx->capture_driver_priv = oocd_trace;
|
||||
oocd_trace->etm_ctx = arm7_9->etm_ctx;
|
||||
|
||||
/* copy name of TTY device used to communicate with OpenOCD+trace */
|
||||
oocd_trace->tty = strndup(args[1], 256);
|
||||
}
|
||||
else
|
||||
{
|
||||
ERROR("target has no ETM defined, OpenOCD+trace left unconfigured");
|
||||
}
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int handle_oocd_trace_status_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
target_t *target;
|
||||
armv4_5_common_t *armv4_5;
|
||||
arm7_9_common_t *arm7_9;
|
||||
oocd_trace_t *oocd_trace;
|
||||
u32 status;
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
|
||||
if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (!arm7_9->etm_ctx)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (strcmp(arm7_9->etm_ctx->capture_driver->name, "oocd_trace") != 0)
|
||||
{
|
||||
command_print(cmd_ctx, "current target's ETM capture driver isn't 'oocd_trace'");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
oocd_trace = (oocd_trace_t*)arm7_9->etm_ctx->capture_driver_priv;
|
||||
|
||||
oocd_trace_read_reg(oocd_trace, OOCD_TRACE_STATUS, &status);
|
||||
|
||||
if (status & 0x8)
|
||||
command_print(cmd_ctx, "trace clock locked");
|
||||
else
|
||||
command_print(cmd_ctx, "no trace clock");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int handle_oocd_trace_resync_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
|
||||
{
|
||||
target_t *target;
|
||||
armv4_5_common_t *armv4_5;
|
||||
arm7_9_common_t *arm7_9;
|
||||
oocd_trace_t *oocd_trace;
|
||||
u32 status;
|
||||
size_t bytes_written;
|
||||
u8 cmd_array[1];
|
||||
|
||||
target = get_current_target(cmd_ctx);
|
||||
|
||||
if (arm7_9_get_arch_pointers(target, &armv4_5, &arm7_9) != ERROR_OK)
|
||||
{
|
||||
command_print(cmd_ctx, "current target isn't an ARM7/ARM9 target");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (!arm7_9->etm_ctx)
|
||||
{
|
||||
command_print(cmd_ctx, "current target doesn't have an ETM configured");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
if (strcmp(arm7_9->etm_ctx->capture_driver->name, "oocd_trace") != 0)
|
||||
{
|
||||
command_print(cmd_ctx, "current target's ETM capture driver isn't 'oocd_trace'");
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
oocd_trace = (oocd_trace_t*)arm7_9->etm_ctx->capture_driver_priv;
|
||||
|
||||
cmd_array[0] = 0xf0;
|
||||
|
||||
bytes_written = write(oocd_trace->tty_fd, cmd_array, 1);
|
||||
|
||||
command_print(cmd_ctx, "requesting traceclock resync");
|
||||
DEBUG("resyncing traceclk pll");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
||||
int oocd_trace_register_commands(struct command_context_s *cmd_ctx)
|
||||
{
|
||||
command_t *oocd_trace_cmd;
|
||||
|
||||
oocd_trace_cmd = register_command(cmd_ctx, NULL, "oocd_trace", NULL, COMMAND_ANY, "OpenOCD+trace");
|
||||
|
||||
register_command(cmd_ctx, oocd_trace_cmd, "config", handle_oocd_trace_config_command, COMMAND_CONFIG, NULL);
|
||||
|
||||
register_command(cmd_ctx, oocd_trace_cmd, "status", handle_oocd_trace_status_command, COMMAND_EXEC, "display OpenOCD+trace status");
|
||||
register_command(cmd_ctx, oocd_trace_cmd, "resync", handle_oocd_trace_resync_command, COMMAND_EXEC, "resync OpenOCD+trace capture clock");
|
||||
|
||||
return ERROR_OK;
|
||||
}
|
||||
|
|
@ -0,0 +1,64 @@
|
|||
/***************************************************************************
|
||||
* Copyright (C) 2007 by Dominic Rath *
|
||||
* Dominic.Rath@gmx.de *
|
||||
* *
|
||||
* This program is free software; you can redistribute it and/or modify *
|
||||
* it under the terms of the GNU General Public License as published by *
|
||||
* the Free Software Foundation; either version 2 of the License, or *
|
||||
* (at your option) any later version. *
|
||||
* *
|
||||
* This program is distributed in the hope that it will be useful, *
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
|
||||
* GNU General Public License for more details. *
|
||||
* *
|
||||
* You should have received a copy of the GNU General Public License *
|
||||
* along with this program; if not, write to the *
|
||||
* Free Software Foundation, Inc., *
|
||||
* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
|
||||
***************************************************************************/
|
||||
#ifndef OOCD_TRACE_H
|
||||
#define OOCD_TRACE_H
|
||||
|
||||
#include "command.h"
|
||||
|
||||
#include "etm.h"
|
||||
|
||||
#include <termios.h>
|
||||
#include <unistd.h>
|
||||
|
||||
/* registers */
|
||||
enum
|
||||
{
|
||||
OOCD_TRACE_ID = 0x7,
|
||||
OOCD_TRACE_ADDRESS = 0x0,
|
||||
OOCD_TRACE_TRIGGER_COUNTER = 0x01,
|
||||
OOCD_TRACE_CONTROL = 0x2,
|
||||
OOCD_TRACE_STATUS = 0x3,
|
||||
OOCD_TRACE_SDRAM_COUNTER = 0x4,
|
||||
};
|
||||
|
||||
/* commands */
|
||||
enum
|
||||
{
|
||||
OOCD_TRACE_NOP = 0x0,
|
||||
OOCD_TRACE_READ_REG = 0x10,
|
||||
OOCD_TRACE_WRITE_REG = 0x18,
|
||||
OOCD_TRACE_READ_RAM = 0x20,
|
||||
/* OOCD_TRACE_WRITE_RAM = 0x28, */
|
||||
OOCD_TRACE_RESYNC = 0xf0,
|
||||
};
|
||||
|
||||
typedef struct oocd_trace_s
|
||||
{
|
||||
etm_context_t *etm_ctx;
|
||||
char *tty;
|
||||
int tty_fd;
|
||||
struct termios oldtio, newtio;
|
||||
} oocd_trace_t;
|
||||
|
||||
extern etm_capture_driver_t oocd_trace_capture_driver;
|
||||
|
||||
extern int oocd_trace_register_commands(struct command_context_s *cmd_ctx);
|
||||
|
||||
#endif /* OOCD_TRACE_TRACE_H */
|
||||
Loading…
Reference in New Issue