Commit Graph

224 Commits

Author SHA1 Message Date
Øyvind Harboe 8f779cf66b tcl: remove silly ocd_ prefix to array2mem and mem2array
ocd_ prefix is used internally in OpenOCD as a kludge more
or less to deal with the two kinds of commands that OpenOCD
has.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 17:24:55 +02:00
Øyvind Harboe f1bd1274ee board: added at91cap7a stk w/sdram config scripts
The strange thing here with this board is that 16MHz kinda
works, but only 2MHz is really stable.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 17:09:44 +02:00
Øyvind Harboe ba951aede3 config scripts: remove useless reference to OpenOCD docs
clutters config scripts.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-11 10:53:54 +02:00
Ben Gardiner 91305bfa7f cfg: add omapl138 support and da850evm preliminary support
This patch adds support for the omapl138 target and preliminary support for the da850evm. The
target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file.

I have performed limited testing with this setup. I am posting this patch in the interest of
sharing cfg files and in the hopes that the experts on this list can correct errors I have made or
point out enhancements.

The testing I have performed is debugging uboot with gdb where I also use the following local.cfg
and gdbinit files. Debugging appears to work in so much as 'ni' works.

local.cfg:
gdb_memory_map disable

gdbinit:
target remote localhost:3333
set remote hardware-breakpoint-limit 2
set remote hardware-watchpoint-limit 2
monitor poll on

Comments welcome.

Best Regards,
Ben Gardiner
2010-08-10 09:43:30 +02:00
David Brownell 28ddefd065 Luminary-icdi comment update
Clarify that ICDI is the generic logic, but this config is
for the JTAG-only (no-SWD) mode.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-08-03 21:29:05 -04:00
Øyvind Harboe d1638abd6a lpc1768: even if rclk "works", it isn't necessarily the correct clk
rclk = 4MHz oon lpc1768, the correct JTAG clk is 666MHz(4MHz/6).

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-08-02 13:21:21 +02:00
Peter Stuge 8e9b12dc8a Support NGX Technologies product NGX ARM USB JTAG
This is a standard FT2232 device. More info at their web page:
http://shop.ngxtechnologies.com/product_info.php?cPath=26&products_id=30
2010-08-01 09:10:47 +02:00
Peter Stuge 8772355bbd Remove srst_pulls_trst from LPC2148 target
srst_pulls_trst is only true on some (broken) LPC2148 boards, a fact
which is already documented in doc/openocd.texi, so it shouldn't be
set unconditionally in the target tcl.

This patch was needed to reflash when an Abort exception occured very
early after reset, before OpenOCD tried to halt the CPU.
2010-08-01 09:10:47 +02:00
Øyvind Harboe f4c1f08f16 lpc7168: make flash available upon reset init
set user mode to avoid ROM being mapped at address
0 rather than flash.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-07-30 22:36:00 +02:00
Spencer Oliver 8dbe367c53 cfg: add Amontec JTAGkey2p interface config (Issue #26)
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 17:31:38 +01:00
Spencer Oliver 4611f87f0a flash: add nuc910 nand driver
This adds a nand driver support for the nuc910 target.
Note that ECC is not currently supported by this driver, although
it is supported by the peripheral.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 12:22:18 +01:00
Spencer Oliver 8f5e84bf8d cfg: update rsc-w910 script
- Only enable the FMI (NAND) and DMA clocks.
 - Select NAND interface on the MFSEL.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-19 09:10:54 +01:00
David Brownell 2fdc1db304 lm3s811-ek uses generic stellaris target config
There's no point in an lm3s811-specific target file,
so remove it in favor of the generic "stellaris.cfg".

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-07-17 02:59:23 -04:00
Spencer Oliver 1619facb5e cfg: add Avalue RSC-W910 config
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-07-13 14:17:00 +01:00
Olaf Lüke 2986320cde at91sam3s* support
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-25 21:37:53 +02:00
Øyvind Harboe 4fa3cc7746 am3517 evm: use physical write to memory while target is running
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 12:49:56 +02:00
Øyvind Harboe fe1f7f63b6 board: add alpha am3517evm ti board config file
Signs of life: reset(kinda), halt, resume and memory
display/modify.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-22 08:22:01 +02:00
Thomas Koeller c9e2d13cf9 DM36x: pll & clock setup
Added a function 'pll_v03_setup' to set up PLLs and clock
dividers on DM365 and DM368.

Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 10:40:05 +02:00
michal smulski bf3410fcc7 arm1136 scripts
Here is a patch to fix a startup in C100 (arm1136). Basically make sure
that UART is configured before using it.

Michal

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-06-15 07:39:59 +02:00
Spencer Oliver 94dc7c0a93 cfg: add pic32 virtual banks
make use of the new virtual bank flash driver.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-26 11:10:15 +01:00
Freddie Chopin f1c1bed39a There are no variants of arm7tdmi target
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:40 +01:00
Freddie Chopin e2c9518eda All LPC2xxx chips are little endian and that cannot be changed - update config scripts
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:30 +01:00
Freddie Chopin 9c3b4cfc5d add correct CPUTAPID value for LPC2129
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:18 +01:00
Freddie Chopin 0e4f4bacdc Update "flash bank" helper comments for LPC2xxx chips
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:21:08 +01:00
Freddie Chopin 06df4664a9 LPC23xx and LPC24xx after reset run on internal 4MHz RC oscillator, so "flash bank" parameter should be 4000 (not 12000)
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-24 09:20:43 +01:00
Øyvind Harboe 2e1eaaae35 at91sam9260: use RCLK
It might be possible to get this target going without
RCLK, but it would require more careful analysis and
usage of the reset events.

Enable fast memory accesses.

Tested on an at91sam9260 custom board w/external DRAM
and flash.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-21 14:00:11 +02:00
Spencer Oliver 82ef8472bf cfg: update stm32 performance stick config
- As this is a complete unit, including jtag we might as welli nclude
the jtag cfg.
 - Add missing id for the str750 that is also in the jtag chain.
 - Reduce jtag startup speed to 500kHz.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-21 11:45:40 +01:00
Jon Povey 72ba8ec90e board: dm355evm.cfg SDTIMR0/1 minor naming fix
Register name fix; ref. TI document sprueh7d

Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-21 07:31:40 +02:00
Gary Carlson 8465e99442 reset: fix reset halt bug
I was finally able to figure out the cause of this problem.  There are two
parts to the patch.  The first patch modifies the configuration file I
originally generated for the Atmel AT91SAM9G20 board and achieves the
following:

+++ Splits the reset-init handler into a reset-start handler for some of the
initial configuration activities and keeps the remainder in the reset-init
handler as was the case before.  This was the real issue that was causing
the timing problems I identified before.  This solution was confirmed with
an o-scope on actual target hardware.

+++ Adds a new instruction in the reset-start handler to disable fast memory
accesses in the reset-start handler.  When the target jtag clock is started
out at 2 kHz during system clock initialization, memory writes (i.e.
register write to enable external reset pin -- basically to RSTC_MR) are
naturally slow and cause GDB keep-alive issues (refer to PATCH 2/2 for
additional fixes).

+++ Modifies the configuration file to use srst_only reset action. The
reset-start/reset-init handler split also now allows the correct behavior to
be used in the configuration file (previously had to use both SRST and TRST
even though only SRST is actually used and connected on the evaluation
board).

+++ Adds external NandFlash configuration support to take advantage of flash
driver added earlier.  Doesn't fix any bugs but adds functionality that was
marked as TBD before and thrown in when I did other work on the
configuration file.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-19 07:37:07 +02:00
Marc Pignat e92b203a76 at91rm9200 : reset_config should go to the board config file
Let other boards do other things with srst and trst.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-18 11:48:47 +02:00
Spencer Oliver 215a5f7442 scripts: update flash bank names
As the flash bank name is now unique update the scripts to suit.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-13 20:44:08 +01:00
Øyvind Harboe 7b76da57f4 zy1000.cfg: gdb connect will fail first time without gdb-attach
gdb-attach does a reset init to make sure that the CFI probe
will succeed upon first gdb connect.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-05-12 13:45:04 +02:00
Spencer Oliver cf811d8e6b cfg: add stm32eval board configs
Increase working area for stm3210e_eval.cfg.
Add new configs for the following boards:
STM321000B-EVAL, STM32100C-EVAL, STM32100B-EVAL

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-05-07 14:24:13 +01:00
Øyvind Harboe da9f72ca0a zy1000: it has a CFI chip, no need for the ecosflash driver
The ecosflash driver is no longer used by any of the config
scripts. It is more useful to get more testing of CFI.

Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-30 02:51:05 +02:00
Marek Vasut 56a21c9cb1 Add Voipac PXA270 module support
This patch adds support for the Voipac PXA270 module. Including NOR flash.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-04-26 07:08:55 +02:00
Marek Vasut e0285dbe73 Add VPACLink interface definition
This patch adds definition file for the Voipac VPACLink JTAG adaptor. The
adaptor is combined JTAG/UART device.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
2010-04-26 07:08:52 +02:00
michal smulski c6cd253ae1 telo: update configuration scripts to matched master branch
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
2010-04-24 16:51:34 +02:00
Antonio Borneo d31bbc33fa TCL SCRIPTS: fix command name
Some tcl script has underline between the words "flash bank"
resulting in 'invalid command name "flash_bank"'.

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-04-15 19:10:36 +02:00
Antonio Borneo 27b98c2fa5 TCL scripts: update to current "flash bank" syntax
While "flash bank" syntax has been changed long ago,
several tcl script are still not fully update.

Fix following cases related with "cfi" driver:
- syntax error: the mandatory <name> parameter is missing
- warning: the <target> parameter is a number, instead of
  the target name
- the comment line above the command does not report
  actual syntax

Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2010-03-26 08:42:58 +01:00
Spencer Oliver 679f6602fd PARPORT: add PARPORTADDR tcl variable
Add PARPORTADDR tcl variable making it easier to
change parallel port address in scripts.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-16 10:10:21 +00:00
Spencer Oliver 82f44a4708 PIC32: add Microchip Explorer16 cfg
- add Microchip Explorer16 cfg using PIC32MX360F512L PIM.
 - remove reset config from PIC32 target cfg.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-16 10:10:20 +00:00
David Brownell 1bd3ae3986 rename jtag_nsrst_assert_width as adapter_nsrst_assert_width
Globally rename "jtag_nsrst_assert_width" as "adapter_nsrst_assert_width",
and move it out of the "jtag" command group ...  it needs to be used with
non-JTAG transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:42:26 -07:00
David Brownell b559b273b5 rename jtag_nsrst_delay as adapter_nsrst_delay
Globally rename "jtag_nsrst_delay" as "adapter_nsrst_delay", and move it
out of the "jtag" command group ...  it needs to be used with non-JTAG
transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:41:30 -07:00
David Brownell 96f9790279 rename jtag_khz as adapter_khz
Globally rename "jtag_khz" as "adapter_khz", and move it out of the "jtag"
command group ...  it needs to be used with non-JTAG transports

Includes a migration aid (in jtag/startup.tcl) so that old user scripts
won't break.  That aid should Sunset in about a year.  (We may want to
update it to include a nag message too.)

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-15 08:37:43 -07:00
Spencer Oliver de761e350b PIC32MX: update cfg script
The default config script will now dynamically setup the BMX registers
in the reset init script.
This will also work if the user overrides the default working area.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-15 09:38:46 +00:00
Michal Demin 24e1e3dd26 Add support for Bus Pirate as a JTAG adapter.
This includes a driver and matching config file.  This support needs to be
enabled through the initial "configure" (use "--enable-buspirate").

Signed-off-by: Michal Demin <michaldemin@gmail.com>
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-11 11:35:50 -08:00
Spencer Oliver 257a764582 PIC32: add flash algorithm support
Add flash algorithm support for the PIC32MX.
Still a few things todo but this dramatically decreases
the programing time, eg. approx programming for 2.5k test file.
 - without fastload: 60secs
 - with fastload: 45secs
 - with fastload and algorithm: 2secs.

Add new devices to supported list.

Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
2010-03-10 21:03:22 +00:00
David Brownell c6e323b983 doc: not all debug adapters are "dongles"
Talk more about "debug adapters" instead of only "dongles".  Not all
adapters are discrete widgets; some are integrated onto boards.  If
we only talk about "dongles" we rule out many valid setups, and help
confuse some users (who may be using Dongle-free environments).

Also start bringing out the point that JTAG isn't the only transport
protocol, even though OpenOCD historically presumes "all is JTAG".
(Not all debug adapters are JTAG adapters, or JTAG-only adapters.)

Plus a few minor fixes (spelling etc) in the vicinity of those changes,
and updates about FT2232H clocking issues (they can go faster than the
older chips, and can support adaptive clocking).

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-05 21:09:03 -08:00
David Brownell 53b3d4dd53 LPC1768 updates, IAR board support
Fix some issues with the generic LPC1768 config file:

 - Handle the post-reset clock config:  4 MHz internal RC, no PLL.
   This affects flash and JTAG clocking.

 - Remove JTAG adapter config; they don't all support trst_and_srst

 - Remove the rest of the bogus "reset-init" event handler.

 - Allow explicit CCLK configuration, instead of assuming 12 MHz;
   some boards will use 100 Mhz (or the post-reset 4 MHz).

 - Simplify: rely on defaults for endianness and IR-Capture value

 - Update some comments too

Build on those fixes to make a trivial config for the IAR LPC1768
kickstart board (by Olimex) start working.

Also, add doxygen to the lpc2000 flash driver, primarily to note a
configuration problem with driver: it wrongly assumes the core clock
rate never changes.  Configs that are safe for updating flash after
"reset halt" will thus often be unsafe later ... e.g. for LPC1768,
after switching to use PLL0 at 100 MHz.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-03-02 15:02:01 -08:00
Mariano Alvira 0324eb2496 Add board/redbee-usb.cfg
The Redbee USB is a small form-factor usb stick from Redwire, LLC
(www.redwirellc.com/store), built around a Freescale MC13224V
ARM7TDMI + 802.15.4 radio (plus antenna).

It includes an FT2232H for debugging, with Channel B connected to the
mc13224v's JTAG interface (unusual) and Channel A connected to UART1.

Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
2010-02-28 10:33:46 -08:00