According to the MSP432P4xx Family TRM (SLAU356A) Figure 4-7,
0x9AF is the part number for MSP432P401xx devices.
Verified on TI MSP-EXP432P401R LaunchPad.
Change-Id: I22b57c42f2a0dc8263fab6b480cf8c169c7dc295
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3486
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This was found on multiple XMC4500:
Valid ROM table present
Component base address 0xe00ff000
Peripheral ID 0x00001c11db
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1db, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
On multiple XMC4700 and an XMC4800 this was found instead:
Valid ROM table present
Component base address 0xe00ff000
Peripheral ID 0x00001c11df
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1df, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
Name them "XMC4500 ROM" and "XMC4700/4800 ROM" respectively.
Change-Id: If369a6d16524004ba439b878f090a313a9f3a760
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3482
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Not documented in the Reference Manuals but found on multiple XMC1100/1202:
Valid ROM table present
Component base address 0xf0000000
Peripheral ID 0x00001c11ed
Designer is 0x0c1, Infineon (Siemens)
Part is 0x1ed, Unrecognized
Component class is 0x1, ROM table
MEMTYPE system memory present on bus
Name it "XMC1000 ROM", since it didn't differ between XMC1100 and XMC1200.
Change-Id: I98a5a524c0d0836f395400fbac24fd496b2ec141
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3481
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
ulink_calculate_frequency() is used exclusively when
_DEBUG_JTAG_IO_ is set, no need to compile this
function if it is not used.
Declaring it static in the same commit.
Change-Id: I243ffdf69a1dc3bee6d16e4bb8d78396b6ea5144
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3241
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Consistently increase the space-indentation of the .full values to
nicely align with the new "Qualcomm QDSS Component v1" .type value.
Change-Id: Icd28d8f3fc7c3afcccb9dcfe138ac57d64927d1a
Suggested-by: Freddie Chopin <freddie.chopin@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3480
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Note:
WCR (Wire Control Register) is replaced by DLCR (Data Link Control
Register). And only TURNROUND field is modifiable.
[andreas.fritiofson@gmail.com]:
Rename DP_IDCODE to DP_DPIDR as well.
Sort list by address and align it using spaces instead of tabs. Add
comments about supporting DP versions.
Remove non-functional wcr command completely.
Change-Id: Ic6b781b07c8eead8b0237d497846d0da060cb1ba
Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3244
Tested-by: jenkins
Instead of placing Atmel last, after ANY_ID, place it after ARM (it's
arm_adi_v5 despite 0x4BB) and sort it with the other vendors, i.e.
before ADI and Qualcomm. Adapt column alignment.
Drop the redundant "Atmel" comment to clarify that Analog is not Atmel.
Change-Id: Ic06785db079cf58d49815a639236636c180e5e17
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3479
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
On APQ8016 was found a CoreSight component designed by
Qualcomm, according to db410c HRM [1] it has a partnumber
following this schema:
[11:8] is 0x4 meaning Qualcomm designed Coresight component in QDSS. Reads as 0x4.
[7:6] is Subsystem/core family ID (e.g. denote QDSS family or generation).
[5:4] is Subsystem/core configuration options (e.g. denote cache options, etc.).
[3:2] is Subsystem/core fuse options.
[1:0] is Subsystem/core future use field
Reads as 0x440.
[1] - https://developer.qualcomm.com/download/sd410/hardware-register-description-qualcomm-snapdragon-410.pdf
Change-Id: I9b4b41fd17c59d2f5ae35b53278d06d6087665f8
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3408
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
On hi6220 'dap info' returned some unknown components from ARM.
Collected from ARM docs, mostly ROM table entries.
Typo fix for Cortex-M3 FPB.
Change-Id: I96bbf7349061937b3afc8bb8d6d1650f2609f82d
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3407
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Initial release of Ambiq Micro Apollo flash driver
supporting our sub-threshold (low power) Cortex M4F part,
and Evaluation Kit.
We have been shipping openocd to our customers for about one year.
The EVK boards are SWD only using ftdi. We also use two of the
other COM instances to display debug information.
It takes about 15 seconds to flash 512K, and mass erase is
about 5 seconds.
Tested by internal verification group, FAE's, and customer sites.
Merged commit 'refs/changes/17/3417/1' as suggested. Makefile.am
and drivers.c follow the new format to avoid conflicts.
Removed unused fault_capture command.
Added documentation for flash driver.
Change-Id: Iae92d869369c6827244f0071f9cb522d8d91fed8
Signed-off-by: Rick Foos <rfoos@solengtech.com>
Reviewed-on: http://openocd.zylin.com/3230
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Clean up working area in case writing fails. Probably inherited from
armv7m_blank_check_memory(). Fix adapted from armv7m_checksum_memory().
Change-Id: I784bef481d1eba833ab6a9c34249fe9d43a16081
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3470
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Clean up the working area in case writing fails.
Adapted from armv7m_checksum_memory().
Change-Id: I4e5950f568ed70a72a1dcfd77e3321110b17e1de
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3469
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Spotted by gcc:
arm7_9_common.c: In function ‘arm7_9_unset_breakpoint’:
arm7_9_common.c:353:4: error: this ‘if’ clause does not guard... [-Werror=misleading-indentation]
if (current_instr == arm7_9->thumb_bkpt)
^~
arm7_9_common.c:356:5: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the ‘if’
if (retval != ERROR_OK)
^~
The logic won't change once the braces have been added, as the new 'retval'
check only makes sense within the if().
Change-Id: I6a303e118f2150e5eb25c9268ad06de5d8a533b2
Signed-off-by: Aleksander Morgado <aleksander@aleksander.es>
Reviewed-on: http://openocd.zylin.com/3477
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Among other things, this fixes building on Cygwin and MSYS.
Change-Id: I8bdceb49dc72b5f666388cfd97876eba8e1d2b13
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3478
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The ioutil helper functions copyfile and copydir were last and only used
in ecosboard.c which has been removed with commit 39650e22.
Removing the dead code.
Change-Id: I36c7c4c5009d755b4513a14a9f9e214d1ee500e8
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3240
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The cortex_a specific assert_reset function must only apply nSRST if
the reset configuration states that JTAG can be used while nSRST is
asserted.
Change-Id: If604a65fdea5bcb46ec723ada547a4e8d6fa8c59
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3356
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
For STLINK_SWD_AP_FAULT git://git.ac6.fr/openocd commit 657e3e885b9ee10
returns ERROR_OK with the comment:
Change in error status when reading outside RAM.
This fix allows CDT plugin to visualize memory.
Change-Id: Id8e220961b748ef9467fd84de62b1dc84ace63f8
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3373
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The capability to lock the debug interface on EFM32
controllers was lacking in OpenOCD.
After receiving some pointers by zapb_ and PaulFertser
on IRC (thanks guys!) I have added this capability.
This works by writing the required bits in the debug
lock word to '0'.
Note: there is currently no way to re-enable the debug
interface from OpenOCD as doing this requires specific
pin wiggling that is currently not implemented yet.
However: having the capability to lock the debug interface
is useful when building a volume programming jig.
You can flash the program code, verify and then
lock the debug interface so that the device cannot
be read when it is deployed in the field.
Change-Id: If2d562dfdb4b95519785a4395f755d9ae3d0cf12
Signed-off-by: Lieven Hollevoet <hollie@lika.be>
Reviewed-on: http://openocd.zylin.com/3389
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
If an error occurs during xmc4xxx_blank_check_memory() aka .erase_check,
it would break out of the loop over flash sectors and return ERROR_OK.
Instead return the error code so that tcl.c can notify the user.
Change-Id: Ie2c1b7933eef2b240b28f8a292634fbbf5b31706
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3425
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The function libusb_get_port_numbers(), required for the command
ftdi_location, is only available in recent version of libusb1.
Compilation will break if the function is not available. This patch
enables the command only if libusb1 contains the necessary function.
Change-Id: I091e72dafa4ed22eea51692751d43246a8152987
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3396
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The parts are listed in Rev I of the Datasheet
Change-Id: Icdd9108a0f1f19f666fce79de7f25df9f46de866
Signed-off-by: Peter D. Gray <peter@conalgo.com>
Reviewed-on: http://openocd.zylin.com/3424
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
I suppose 0xff300008 is the correct value for EJTAG_V20_DBS.
20 miliseconds is too much for scan delay, 2ms is enough in mips_m4k scan_delay handler.
mips32 scan_delay has the correct value.
Change-Id: Ie9dc650065a58e845687058a4c930f85909beec9
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/2271
Tested-by: jenkins
Reviewed-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
BMIPS always needs 2 additional instructions to reach the core.
Seems there is a 2 instructions fifo between the tap and the core, or it behaves in this way.
No idea of the purpose of this fifo, I can only guess.
Of course function mips32_pracc_clean_text_jump() must add this additional instructions (NOPs).
Only tested on bcm3348..
Change-Id: I3183d3ce865d469d7262ba4b15446e5743a5f1df
Signed-off-by: Salvador Arroyo <salvador@telecable.es>
Reviewed-on: http://openocd.zylin.com/2270
Tested-by: jenkins
Reviewed-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The XMC1000 family uses a very different flash interface from XMC4000.
Tested on XMC 2Go and XMC1100 Boot Kit.
Change-Id: I3edaed420ef1c0fb89fdf221022c8b04163d41b3
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3418
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
Part IDs taken from
Atmel-42402C-SAM L22_Datasheet_Complete-01/2016
(revision C)
Change-Id: I1eb76a92097a8327da10faa0551e7fc962a549f8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3426
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Before this change jim_target_reset() checked examined state of a target
and failed without calling .assert_reset in particular target layer
(and without comprehensible warning to user).
Cortex-M target (which refuses access to DP under active SRST):
If connection is lost then reset process fails before asserting SRST
and connection with MCU is not restored.
This resulted in:
1) A lot of Cortex-M MCUs required use of reset button or cycling power
after firmware blocked SWD access somehow (sleep, misconfigured clock etc).
If firmware blocks SWD access early during initialization, a MCU could
become completely inaccessible by SWD.
2) If OpenOCD is (re)started and a MCU is in a broken state unresponsive
to SWD, reset command does not work even if it could help to restore communication.
Hopefully this scenario is not possible under full JTAG.
jim_target_reset() in target.c now does not check examined state
and delegates this task to a particular target. All targets have been checked
and xx_assert_reset() (or xx_deassert_reset()) procedures were changed
to check examined state if needed. Targets except arm11, cortex_a and cortex_m
just fail if target is not examined although it may be possible to use
at least hw reset. Left as TODO for developers familiar with these targets.
cortex_m_assert_reset(): memory access errors are stored
instead of immediate returning them to a higher level.
Errors from less important reads/writes are ignored.
Requested reset always leads to a configured action.
arm11_assert_reset() just asserts hw reset in case of not examined target.
cortex_a_assert_reset() works as usual in case of not examined target.
Change-Id: I84fa869f4f58e2fa83b6ea75de84440d9dc3d929
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2606
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Cortex-M0+ and M4 motor control MCUs KV10, KV11, KV30, KV31,
KV42, KV44 and KV46 added to SDID identification.
Watchdog disable code changed to work on Cortex-M0+ (KV1x)
Protection size set to 1K for 16K flash devices (KV10Z16)
- cherry picked from Andrey Smirnov's change #2051
Change-Id: Ia6f4868eaf7e2cb6ad6a736210c703a67e0027be
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3235
Tested-by: jenkins
Reviewed-by: Kyle Manna <kyle.manna@fuel7.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Change-Id: I55ab830aed34a02c53f3419facc81c7354368e30
Signed-off-by: Peter D. Gray <peter@conalgo.com>
Reviewed-on: http://openocd.zylin.com/3422
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Andreas Färber <afaerber@suse.de>
To avoid conflicts between flash drivers being added, consistently use
an alphabetical sort order for the three places new drivers get added:
* Makefile.am NOR_DRIVERS (note: automake disallows a trailing backslash)
* drivers.c struct flash_driver forward declarations
* drivers.c flash_drivers array
Change-Id: Idcd6a8e12821ef10958a6b3ad7bac0dc63cadd08
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3417
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Taken from git://git.ac6.fr/openocd commit e8ed67c42227b7072
STM32F446 (0x434) now is's own case.
Change-Id: I5061db7102b4c923c9f39d3d2f0cc69d29fca0a4
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3375
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Old code waited only for 7 bytes and didn't handle buffer wrap-around, but
was functional despite.
Change-Id: Iceaf7be1e51368b2ec0a8722cc9ac16d12f9aa63
Signed-off-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-on: http://openocd.zylin.com/3140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add new structure for for working with FPU thread in thread view.
This modification support both stacking.
When FPU is activated, LR must be validated to check if the FPU
register are push on the stack. This is mandatory to find the correct
stack pointer position.
the modified code was inspired and adapted from
88d2003bb8
Change-Id: I6641926aa14e7216cacb399cbc8bb0db324cc9fc
Signed-off-by: Jonathan Dumaresq <jdumaresq@cimeq.qc.ca>
Reviewed-on: http://openocd.zylin.com/3397
Tested-by: jenkins
Reviewed-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-by: Harry Zhurov <harry.zhurov@gmail.com>
Reviewed-by: Anton Gusev
Reviewed-by: Михаил Цивинский <mtsivinsky@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested with MKE04Z8VTG4, MKE02Z64VLC4 and MKE02Z64VLD2.
Change-Id: I606e32a2746a3b96d3e50f3656ba78d40c41c1ea
Signed-off-by: Ivan Meleca <ivan@artekit.eu>
Reviewed-on: http://openocd.zylin.com/3380
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
There is no reason why not probe running target.
Initial gdb connect to running target is now possible without
halt in gdb-attach event.
Change-Id: Iacc4a231587d378168b18db871582f1086504831
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3382
Tested-by: jenkins
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This feature is required for boards that use a programmatical way
to reset the cpu, like the TI Pandaboard with OMAP4. The board only
has a 14 pin JTAG header that doesn't feature SRST and is reset by
direct write to the PRM_RSTCTL register.
iMX6 can be reset through triggering the on-chip watchdog, but for these
methods to work reliably, access through the AHB-AP without interaction
with the CPU core is necessary.
Change-Id: I9a07a536adda83cc2f93e504384c8c7f0306220b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3359
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
This patch adds a 'ftdi_location' command to select an adapter by usb
bus number and port path.
This is helpful if you have a rack full of adapters in a testing or
manufacturing setup where the only constant is the physical usb bus
location of the adapter you want to address. Vid:Pid are not unique,
serial number _may_ be unique (and maybe not with embedded adapters) but
will change when a new target is plugged.
Specifying a location allows to understand instantly which board failed
bringup or testing.
Change-Id: I403c7c6c8e34fe42041b3f967db80f3160a4f1a3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3351
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Add support for S6E2DH MainFlash. VFlash is not implemented.
Briefly tested with SK-FM4-176L-S6E2DH V110 board.
Change-Id: If7c523d8c75307bc1494bbf4cca3eed0272e8e01
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3158
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
These appear to be just additional flash size configurations.
Entirely based on manual, untested.
Change-Id: I4460dc1a588335df8fc0a385d24513a4e35b6951
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3157
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
On the ARM PB1176JZF-S the system comes up in secure monitor
mode after reset. However the modebits in CPSR form the value
28 (0x1c) and CPSR is 0x800001dc deeming it UNRECOGNIZED.
Define this mode to be synonymous to mode 22 (MON) and things
start to work like a charm.
Change-Id: I001f7773ee1076202c0c633e466d2d833f7a1413
Cc: Will Deacon <will.deacon@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-on: http://openocd.zylin.com/3196
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This adds necessary code to obtain data from the Info region which is
not memory-mapped so can't be read the usual way.
With this "flash read_bank" and "flash verify_bank" commands should
start to work as expected for the Info memory block.
Change-Id: I57e4b80fff577500cfa85954b625fe9c9ff92aa5
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3227
Tested-by: jenkins
Reviewed-by: Eldar Khayrullin <eldar.khayrullin@mail.ru>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Instead of documenting the file path as a comment and inline-commenting
the THUMB bytecode, include the hex array via preprocessor.
This assures the path is actually up-to-date and facilitates updating
the code.
Change-Id: Ieb0a7cd0bc14882ac96750f524616d9768a0c6f5
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3134
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Instead of pointing to the assembler sources in a comment and
inline-commenting the THUMB bytecode, place the hex array alongside the
assembler sources and include it via preprocessor.
Originally inspired by a typo in the file path during driver development,
but it also facilitates making changes to the assembler sources.
A Makefile is provided to help automate updating the bytecode. It is not
integrated with the automake system to avoid forcing an ARM cross-compiler
onto every user, i.e. after modifying the sources they need to be rebuilt
in that directory before building the usual way. ARM_CROSS_COMPILE= can
be passed on the make command line to deal with native ARM toolchains
or with varying prefixes of cross-toolchains.
Change-Id: I00ceb980a68c8554a180dd13719ac77b677a8bcd
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3133
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The Spansion FM4 family of microcontrollers does not offer a way to
identify the chip model nor the flash size, except for Dual Flash vs.
regular layout. Therefore the family is passed as argument and
wildcard-matched - MB9BFx6x and S6E2CC families are supported.
Iterations showed that ...
1) Just doing the flash command sequence from SRAM loader code for each
half-word took 20 minutes for an 8 KB block.
2) Doing the busy-wait in the loader merely reduced the time to 19 minutes.
3) Significant performance gains were achieved by looping in loader code
rather than in OpenOCD and by maximizing the batch size across sectors,
getting us down to ~2 seconds for 8 KB and ~2.5 minutes for 1.1 MB.
(Tested with SK-FM4-176L-S6E2CC-ETH v11, CMSIS-DAP v23.)
gcc, objcopy -Obinary and bin2char.sh are used for automating the
integration of hand-written assembler snippets.
Change-Id: I092c81074662534f50b71b91d54eb8e0098fec76
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/2190
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The Flash driver for at91sam4 cpu's has been enhanced to recognise and support the SAM4N family.
Change-Id: I50c471a6053b52edffd8efdd8abfe516cc5c55ee
Signed-off-by: Colin Helliwell <colin.helliwell@ln-systems.com>
Reviewed-on: http://openocd.zylin.com/3242
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Error found by static code analysis using the semantic pattern
null_ref2/mini_null_ref2.cocci, see coccinellery.org
Change-Id: Ic817c29f0ccf2b41fc8f7d9a480ad30d6e5b7ab8
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3364
Tested-by: jenkins
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
A copy-and-paste error in the arm_disassembler opcode evaluation
disabled the recognition of MRRC instructions.
According to the arm architecture ref. manual issue E or later, MRRC and MCRR
instructions are identified by opcode bits 20-27: MCRR = 0xc4, MRRC = 0xc5.
Error found by static code analysis using a semantic pattern to
detect duplicated tests xand.cocci, see coccinellery.org
Change-Id: Ic41426edb51c6816e11dc3d35ef9382ab34af486
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3363
Reviewed-by: Uwe Bonnes <bon@elektron.ikp.physik.tu-darmstadt.de>
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The flash info command on stellaris platformes
"TI/LMI Stellaris information ... rcc is ..., rcc2 is ..."
presented the actual RCC2 register as rcc and an uninitialized variable
as rcc2 due to a copy and paste error.
Found using the semantic pattern da/da.cocci, see coccinellery.org
Change-Id: I6f920fc3e07fdc085ea8e2248fbc9453eb8393dc
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3368
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
A struct member has been initialized twice. Found using the semantic
pattern da/da.cocci, see coccinellery.org
Change-Id: I0320afd60f1ba505758cc5bc0adcf27f572492fb
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3369
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Obsolete C source code semicolons were removed using the semantic patch
semicolon/semicolon.cocci, see coccinellery.org
Change-Id: I153b4995a9e028ebaf5f58c947821dc78345a777
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3367
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Writing to Intel CFI flash with unaligned tail bytes raised a false
error message although all data was programmed successfully. e.g.:
> flash write_image image 0x602e0000 bin
> Programming at 0x602e0000, count 0x00000002 bytes remaining
> couldn't write word at base 0x60000000, address 0x602e0000
> error writing to flash at address 0x60000000 at offset 0x002e0000
Root cause for this false error was a mixup of two result variables
introduced with ecc8041c.
Change-Id: Ib6b85293dbed946a36a307e5b198c47b901145bf
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3233
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is a nRF51822 variant, not a nRF51422 variant.
Change-Id: Ia199e0afa39408d7391a9655bad47eba2fd85f14
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Reviewed-on: http://openocd.zylin.com/3105
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Simplify by printing one component per call, instead of one complete ROM
Table per call. Print common information the same way for all components,
including ROM tables, because ROM tables (at least the top level) contain
useful information in their identification registers, such as the
manufacturer of the SoC.
Print component designer name using the JEP106 helper when available.
Change-Id: Ic51bccd98acfae6886243500153fbdd567be2fae
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3182
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: James Mastros <james@mastros.biz>
Tested with EES-AA revision chips on Relax Kit for 5V Shields and
Relax Lite Kit.
Change-Id: I17d4479657bad0516d4c10c2ad7e745d59e678b7
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3136
Tested-by: jenkins
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
The cache is forced to zero to match the value expected by the DPIDR read
so the connect sequence is not destroyed by a SELECT update.
However, DPIDR and in fact all registers except address 4 are independent
of the current DPBANKSEL value. Change swd_queue_dp_bankselect() to use
this fact and avoid touching SELECT for those registers.
Change-Id: I0cd11925fb6adef481bbf45cc24ea2c6dab4b6fb
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3231
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Investigation:
- mem_ap_read_buf_u32() no longer exists.
- JTAG_DP_DPACC & JTAG_DP_APACC are defined in adi_v5_jtag.c now.
Change-Id: I136fc3f389a5a4eb9b68bc759ce653b6da7fa75e
Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Reviewed-on: http://openocd.zylin.com/3243
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
FTFx flash controller requires MCU in normal RUN mode.
Flash cannot be erased, programmed or blank checked in VLPR or HSRUN
modes.
VLPR mode is switched to RUN mode as it does not require any changes
in clock generator setting. VLPR can be active from reset on some
KLx devices (with some FOPT setting) so 'reset init' might not be
sufficient to get device to normal RUN.
Any other mode than RUN or VLPR is reported as an error.
Change-Id: I60f494ce0d534b04870c6219d9b05f66f7244433
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3012
Tested-by: jenkins
Command for partitioning FlexNVM to data flash and EEPROM blocks
Change-Id: Ia0ea65d72b0e5f23da330520284b0bd26435e444
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2991
Tested-by: jenkins
FlexRAM should be requested before any section programming.
Test FCNFG RAMRDY bit before issuing FTFx_CMD_SETFLEXRAM
to speed up operation and to cover pflash only devices.
Change-Id: Ib0f2d8e8ab8b1507cbf2b7f8565178ab79941f5d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2990
Tested-by: jenkins
kinetis_ftfx_command() did not use other struct flash_bank* members
than base->target. Switching first parameter to struct target*
enables use of kinetis_ftfx_command() without unnecessary bank
getting and probing.
Removed kinetis_securing_test: kind of dead code, same function
as command flash erase_address pad 0x400 0x10
Removed "NAND" word from help as flash is obviously NOR
Change-Id: I3f5fc295ef2bf42f3e913549949f2a36377f6367
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2988
Tested-by: jenkins
FlexNVM (data flash) is memory mapped at 0x10000000.
Driver used to send the same address to FTFx controller for erase/write ops.
This was wrong as FTFx accepts only low 24 bits of address.
To fix addressing for flash controller kinfo->prog_base was introduced.
Added FlexNVM protection check, blank check and data flash size calculation.
Blank check cannot use block operation on FlexNVM when EEPROM backup is enabled.
Removed non functional reassign logic and bank_ordinal stuff.
Now one can re-probe FlexNVM banks after nvm_partition change.
Change-Id: Ia60b938266963e5d056701278cdf7bf2f62a429a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2987
Tested-by: jenkins
This patch also addresses a problem with devices where no serial
number is available. For further details, see:
http://repo.or.cz/libjaylink.git/commit/7e0508d8487f65f71411117dff2e0b093e00bc80
Such devices are now ignored if device selection via serial number is
used.
Nevertheless, these devices are still usable by using the USB address
for device selection or just by omitting device selection. The latter
one is only possible if only one device is connected.
Change-Id: I5763db25e97ba3d924cb642da7e64e951e09ecb7
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3225
Tested-by: jenkins
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Check CMSIS-DAP adapter has serialnumber before pass it to wcscmp.
Keep looking for onother adapter if choosed one doesn't have correct
serialnumber.
Change-Id: I7d386a03cb49b9baf22073ae1c6b14269ed3b618
Signed-off-by: Andrii Anpilogov <anpilog@gmail.com>
Reviewed-on: http://openocd.zylin.com/3226
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This is for targets where flash controller has reverse endianness
compared to target. For these, the 'bus_swap' parameter can be given to the
CFI driver, which will cause command CFI commands to be written with
bytes swapped. This is only for x16 CFI flash.
Change-Id: I698b768e92e65d160232e90b0e81a824e3c81a46
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3041
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Due to signal propagation delays, sampling TDO on rising TCK can become
quite peculiar at fast TCK rates. However, FTDI chips offer a possiblity
to sample TDO on falling edge. With this change, stable operation can be
achieved at 30MHz clock even over 10cm ribbon cable.
Change-Id: Icaf240535dae15512e3c60a944e22a5fbc1b0b06
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3180
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Add support for the Intel Quark mcu D2000 using the new quark_d2xx
target.
Changes to the lakemont part are needed for the D2000 core and
backwards compatible with the X1000 one.
Change-Id: I6e1ef5a5d116344942f08e413965abd3945235fa
Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com>
Reviewed-on: http://openocd.zylin.com/3199
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
duration_elapsed and duration_kbps will not modify the struct duration
passed as function argument, hence it should be declared const.
Change-Id: I459c396952c78e907257e2c2f2c630abde92aaa8
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3232
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Commit 830d0c55c0 introduced
a regression in error recovery after reconnect:
If first SWD queue run in dap_dp_init() fails, DP_SELECT
does not get reset.
Change-Id: I947e2afe9933e4645a6141ece7816af8e6082cf2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3194
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Commit fd43be0726 introduced a
regression: since the register names were changed from those
traditional for MIPS to common GDB scheme the code that makes use of
them needs to be changed accordingly.
This commit restores pic32mx flash driver functionality.
Change-Id: Id18c739390fae36737a02dc30c363d0444f53b96
Reported-by: Louis Rannou <louson@users.sf.net>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3206
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
niietcm4_write() buffer padding:
add correct buffer padding for 16 bytes.
Args check in FLASH_BANK_COMMAND_HANDLER():
first version of the driver had 7 args, current - 6. This patch will fix
error when flash is rejected (current k1921vk01t.cfg has flash bank init
with 6 args).
Timeouts in flash flag checking procedure:
increase timeouts in niietcm4_opstatus_check() and niietcm4_uopstatus_check()
cause there were problems in some hardware configurations.
JTAG ID:
wrong id in k1921vk01t.cfg replaced with right one.
Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru>
Change-Id: I84296ba3eb4eeda4d4a68b18c94666f1269a500f
Reviewed-on: http://openocd.zylin.com/3171
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Use it to print the manufacturer of detected TAPs
Change-Id: Ic4384c61c7f6f7ae2a9b860a805a5997542f72cc
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3177
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
dap_sync() executes all commands in the JTAG queue and then checks
if a WAIT condition happened inside the last batch. If yes, a recovery
is invoked. If not, processing continues without checking for
errors. This function should be called in long AP read or writes, e.g.
while uploading a new application binary, at intermediate points within
the transfer where the cost of flushing the JTAG queue and checking the
journal doesn't affect performance too much.
Change-Id: I99eeaf47cdf951e15e589a04e74b90b5ce911386
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3181
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
ADIv5 specifies that DP and AP accesses may generate a WAIT
response when the hardware is not able to complete a request for various
reasons in time before the next request is sent. Currently, the software
treats a WAIT response as a fatal error and aborts operation on the DAP.
This patch implements WAIT handling by keeping a journal of all
outstanding and completed accesses, including their response status.
At certain times (when dap_run() is called), the journal is inspected
for WAIT responses and all discarded accesses are replayed to complete
them. Special care is taken to not re-execute already successfully
completed operations.
Change-Id: I2790070388cf1ab2e8c9a042d74eb3ef776aa583
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3166
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Make the J-Link driver handle everything needed for FPGA programming,
this includes arbitrary long scans and STABLECLOCKS command.
Also, bump to the latest upstream libjaylink to properly support this.
This code is heavily inspired by Andreas Fritiofson's ftdi.c.
Change-Id: Ic5fd87aa88b58ff1138dc2e0a197bb52321b1541
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2946
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
BeagleBone debian 7 builds produce:
jlink.c: In function 'jlink_speed':
jlink.c:218:11: error: declaration of 'div' shadows a global declaration [-Werror=shadow]
jlink.c: In function 'check_trace_freq':
jlink.c:1065:54: error: declaration of 'div' shadows a global declaration [-Werror=shadow]
jlink.c: In function 'config_trace':
jlink.c:1101:11: error: declaration of 'div' shadows a global declaration [-Werror=shadow]
Fix this by changing the local variable to 'divider'.
Change-Id: I96a0cc0f7d4d4af5a56aa1e918e5416d3c61cbfe
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Reviewed-on: http://openocd.zylin.com/3185
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
BeagleBone debian 7 builds produce:
adi_v5_jtag.c: In function 'jtag_ap_q_bankselect':
adi_v5_jtag.c:336:11: error: declaration of 'select' shadows a global declaration [-Werror=shadow]
Fix this by changing the local variable to 'sel'.
Change-Id: I8e29662ac12bc77d38d5064046d59b7364853cd9
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Reviewed-on: http://openocd.zylin.com/3184
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Andreas Färber
Alexander Kurz
Andreas Fritiofson
Jiri Kastner
Rick Foos
James Mastros
Aleksander Morgado
Marc Schink
Robert Jordens
Matthias Welwarsky
Uwe Bonnes
Lieven Hollevoet
Peter D. Gray
Salvador Arroyo
Salvador Arroyo
Tomas Vanek
Jonathan Dumaresq
Ivan Meleca
Evan Hunter
Linus Walleij
Paul Fertser
Colin Helliwell
Peter A. Bigot
Alamy Liu
anpilog
Jacob Rosenthal
Esben Haabendal
Kent Brinkley
Matthias Welwarsky
Ivan De Cesaris
Bogdan Kolbov