While at it, remove the syntax error messages as the correct
syntax is already suggested due to the return value used.
Change-Id: I9310ba96ed3f8a85c37cee9193e481ad3df02e77
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7969
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The mips opcode macro for the SRL opcode was using the wrong constant
value:
SRA -- Shift right arithmetic
Encoding: 0000 00-- ---t tttt dddd dhhh hh00 0011
SRL -- Shift right logical
Encoding: 0000 00-- ---t tttt dddd dhhh hh00 0010
This corrects the opcode constant for SRL and adds the SRA opcode for
completeness.
There is only one user of MIPS32_OP_SRL in src/flash/nor/cfi.c:
Since the mask constant (0x00000080 for the DQ7 mask) shifted in this
case would never have the sign bit set, it worked fine even though it
was accidentally using the SRA opcode instead of SRL.
Change-Id: I0a80746e2075c7df1ce35b9db00d9d0b997a3feb
Signed-off-by: Tobias Diedrich <ranma+openocd@tdiedrich.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/3613
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Use a command group 'kitprog' with subcommands instead of individual
commands with 'kitprog_' prefix.
The old command is still available to ensure backwards compatibility,
but is marked as deprecated.
Change-Id: I7f0d447939819ffc488a3d7a8de672b58887127f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7967
Reviewed-by: Bohdan Tymkiv <bohdan200@gmail.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The variable 'mode' was introduced in
commit 4dc8cd201c ("cmsis-dap: add initial cmsis-dap support")
but never has been used (just cleared)
Change-Id: Ia741d181ee8006bd0d872f3358a57e045235741a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7965
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Use a command group 'cmsis-dap' with subcommands instead of individual
commands with 'cmsis_dap_' prefix.
The old commands are still available to ensure backwards compatibility,
but are marked as deprecated.
Change-Id: I75facb7572a86354c2ce6144aa7fadf3b5a6db4e
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7963
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Bohdan Tymkiv <bohdan200@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
We were previously inadvertently clearing the top 32 bits of SCTLR_EL1
during read_memory/write_memory as a result of using 32-bit operations
to access the register and because the fields used to temporarily
store the register were 32-bit. Fix it.
Change-Id: I657d7f949e1f7ab6bf90609e3f91cae09cade31a
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7939
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Associativity=0 means that only one CMO is needed for all ways.
It could also mean that the cache is 1-way, but this is less likely.
Currently Associativity=0 causes us to hang in the while loop in
decode_cache_reg. Fix it by skipping the loop in this case. We can let
way_shift be set to the arbitrary value of 0 because in the case where
Associativity=0 we only ever shift 0 by it before ORing it into the
CMO operand.
Change-Id: I7c1de68d33f6b3ed627cbb1e2401d43185e4c1e3
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7916
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This patch adds target logging to breakpoint
handling code. This makes it easier to
debug multicore/multithread systems.
Change-Id: I6bea8079a457070a8f63d0ce381a4ece6f5a190a
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7922
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
If we can't remove bp/wp, we will stuck in endless loop
Change-Id: I44c0a164db1d15c0a0637d33c75087a49cf5c0f4
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7940
Tested-by: jenkins
Reviewed-by: Anatoly P <kupokupokupopo@gmail.com>
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Break- and watchpoints are not removed when a target is destroyed
which introduces a memory leak.
Change-Id: I6143d48f7efd765b7752a12fdc337da3496d896f
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7956
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
In the unusual (and even incorrect) case of running the command
target create ...
before defining an adapter and the associated transport, the
command causes a segmentation fault. E.g.:
openocd -c 'target create cpu cortex-m -endian little'
Check that get_current_transport() returns a valid pointer before
referencing it.
Change-Id: I9796a7e92196ef3df5c7152b27c34102045dc9e7
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7962
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
I use a script to compare the commands in the code with the ones
in the documentation.
Fix the style of the data to simplify the parsing.
Change-Id: I0f1d7e9ff5e2928312ca1a2f3424f82d2910580a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7960
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Now it returns `resource not available`
Change-Id: Ifbbd468bdf62023850690eb96fe8a16f4114e915
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
The existing code didn't seem to work right at all. I have spike
modifications that exercise these new cases. I'll merge those once this
has merged.
Change-Id: I89bd336f34f1b208a76f25b6b41fe3877800765b
Signed-off-by: Tim Newsome <tim@sifive.com>
Compilers are good at optimizing, and with functions it's abundantly
clear what all the types involved are. This change means we don't have
to be super careful about the type of values because of what the macro
might do to them that might cause overflow.
The only place where the return type matters is in printf-style
functions, and I made get_value32() for those cases where a change was
needed.
This should set the stage for simply copying the latest debug_defines.h
from the debug spec build again.
Change-Id: I5fb19d0cfc1e20137832a7b344b05db215ce00e1
Signed-off-by: Tim Newsome <tim@sifive.com>
The reasoning for the change:
* `__func__` is part of C99, `__PRETTY_FUNCTION__` is GNU extension.
* `__PRETTY_FUNCTION__` is defined to be the same as `__func__` for C
sources by GCC documentation but differ for C++ sources (full
signature instead of just a name).
* Currently Clang does support `__PRETTY_FUNCTION__`, though it uses
GCC's C++ variant across C and C++.
Therefore using `__PRETTY_FUNCTION__` creates confusion and does not
provide any valueble information in the logs.
Change-Id: Ie0db6d73f602784b6752a30911dcef3dd7ee4594
Sometimes, the value from of some DMI scans has no meaning (e.g. when
`op` is read). Such values should not be decoded. To make the dumps more
consistent, `<no decoding available>` is printed when there is no
decoding for a register.
Change-Id: I415f06a5a80f2fc8fb8ab3f79132bdf0602c8ad6
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Loading a bitstream to cetrus device crashed due to
missing initialization.
Change-Id: Ibd9a04b84e514f9635af01a2b73bae478e534eb7
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7908
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This allows programmatically determining the debug reason.
Change-Id: I0c3e85cebb6dc28fc0fc212beca84a484ac654a5
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7952
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Fixes below Sparse tool warning.
warning: symbol 'breakpoint_watchpoint_remove_all' was not declared.
Should it be static?
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I4af1d5aa54abcb45f746b877513ba0b5fccbeb47
Reviewed-on: https://review.openocd.org/c/openocd/+/7955
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Marek Vrbka <marek.vrbka@codasip.com>
Enhance `mips32_read_config_regs` to better detect MIPS32 ISA,
DSP, and FPU features, allowing user to get more detailed
target information.
Most of these information will be used in MIPS m/iAptiv support.
Change-Id: I23571a626ec64fa019acac91bdbfcb434373bfc1
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7911
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
This patch forces a read of register from the target
in the get_reg command in case the register cache
does not hold a valid value at that moment.
Note that the command "reg" already handles it
correctly, no fix is needed there.
Change-Id: I75fad25188e94ee4e06162ab6d600ea24dbf590a
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7958
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
The original documents from Jedec since JEP106BG, do not report
the entry for "21 NXP (Philips)", replaced by "c".
It's clearly a typo.
Keep the line from JEP106BF.01 for "NXP (Philips)".
Change-Id: I273c8c5ecf48336ce5189b484a7236273ba90184
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7954
Tested-by: jenkins
By definition in `target/target.h`, `coreid` is not a unique identifier
of a target -- it can be the same for targets on different TAPs.
Change-Id: Ifce78da55fffe28dd8b6b06ecae7d8c4e305c0a2
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
This patch replaces ~(typeof(watchpoint->mask))0 with
WATCHPOINT_IGNORE_DATA_VALUE_MASK. This improves
readability and moves the RISCV target in line with
other targets.
Change-Id: I15ac4d4ee76098b304d9b22f720911ba4329c190
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Depending on configuration, the existing implementation of watchpoints is
rather inefficient for certain scenarios. Consider HW that:
1. triggers 0-3 can be used as instruction breakpoints
2. triggers 4-7 can be used as data breakpoints (watchpoints)
3. NAPOT triggers are not supported.
Now, consider that we have a pending watchpoint. And we perform a "step"
operation. According to the current implementation:
* OpenOCD will disable watchpoints
* Perform a single-step
* Will try to restore the original watchpoints. It will need 12 attempts
to find a suitable trigger: (8 attempts to try NAPOT, and another 4 to try
GE+LE).
This patch introduces a dedicated cache for requests to triggers. It
significantly speeds things up, since we cache failed attempts and no
additional interactions with HW is necessary.
Change-Id: Ic272895eaa763a7ae84d14f7633790afd015ca9d
Signed-off-by: Anastasiya Chernikova <anastasiya.chernikova@syntacore.com>
Otherwise it won't compile for me. Not sure why that doesn't affect the
automated builds.
Change-Id: Ic66c743e1698c4c0772e5601723cb5c711b4fa5c
Signed-off-by: Tim Newsome <tim@sifive.com>
Since DPC is WARL (same rules as MEPC according to
the specification), it is possible that
writes to it won't result in the exact value present.
Therefore, writes to it shouldn't be cached, same as
with other WARL registers.
Change-Id: I818c0cef9727b999b7d84b19f9f42cd706c99d69
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Added the ability to enter dimensionless registers
Change-Id: I1b781959ce4690ec65304142bd9a7c6f540b3e86
Signed-off-by: Anastasiya Chernikova <anastasiya.chernikova@syntacore.com>
Now:
1) If mmu is disabled, virt2phys succeeded and returns physical address
2) If mmu is enbaled, but translation fails, read/write_memory fails
Change-Id: I312309c660239014b3278cb77cadc5618de8e4de
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Removing flash driver "gd32vf103_flash".
This driver has been deprecated since June-1-2022, and was scheduled
for removal in June 2023.
Change-Id: Ib6f4dcba11e91a095b3a20eedd864589084b7fa9
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
This incorrect extra call has been removed in upstream code already
in March 2022, see https://review.openocd.org/c/openocd/+/6836 .
Remove it from riscv-openocd as well.
Change-Id: Ie341f5578c8bfdc518adf1e4bc134919ab76f803
Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
In jtag_libusb_open I've added a parameter for delivering the device
description for which this function should search and adjusted all
callers of this function. A new driver for WCH CH347 JTAG chips
will use this new parameter.
See also: https://review.openocd.org/c/openocd/+/7937
Change-Id: I85e1d7b1f7912ba5e223f0f26323ff3b7600e17d
Signed-off-by: EasyDevKits <info@easydevkits.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7938
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add result check for mips32_pracc_read_regs in mips32_save_context.
Change-Id: Ie796d2b05a9feb11e246c2d0771b52cad4fb70db
Signed-off-by: Walter Ji <walter.ji@oss.cipunited.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7932
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reintroduce checkpatch problem, because now we can handle them better.
Change-Id: Ib81b9910433ae1a240630b898edb19da8d2d5d83
Signed-off-by: Tim Newsome <tim@sifive.com>
This makes it easier to look at log files where multiple gdb instances
are connected.
Change-Id: Ic5aca52b32ee03ac35ffbed9a2fc552abb0a1cba
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7895
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Previously, when listing the watchpoints, OpenOCD printed
numbers 0, 1 and 2 representing READ, WRITE and ACCESS type
watchpoints.
This patch changes it to 'r', 'w' and 'a'. This increases the
clarity as what type the watchpoint actually is.
Change-Id: I9eac72dfd0bb2a9596a5b0c080a3f584556ed599
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7909
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
This patch adds the "all" option to the rwp command.
It removes all watchpoints, much like rbp all removes
all breakpoints.
Change-Id: Id58dd103085e558f17afa4a287888cf085566ca9
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7907
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Previously, if you ran a tcl command in capture like so:
"capture { reg 0x1000 hw }"
Such command did overwrite the tcl result if LOG_LVL_INFO or
lower was logged during it.
This patch changes it by prepending the log to the tcl result instead.
As the tcl results should not be lost during capture.
Change-Id: I37381b45e15c931ba2844d65c9d38f6ed2f6e4fd
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7902
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
If wp/bp is missing at address rwp/rbp won't return zero code (on smp).
Now it fixed.
Fixes: 022e438292 ("target: Change policy of removing watchpoints/breakpoints.")
Change-Id: I3a3c245f7088fc23227b286d2191fc7f3edba702
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7910
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Add support for the ARM MCRR/MRRC instructions which require the use of
two registers to transfer a 64-bit co-processor registers. We are going
to use this in a subsequent patch in order to properly dump 64-bit page
table descriptors that exist on ARMv7A with VMSA extensions.
We make use of r0 and r1 to transfer 64-bit quantities to/from DCC.
Change-Id: Ic4975026c1ae4f2853795575ac7701d541248736
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Michael Chalfant <michael.chalfant@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5228
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
When asked to resume an unavailable target, resume any available targets
and report success.
Change-Id: Ieafc63794c1a6eba8948c0f9ce84fa74f9765041
Signed-off-by: Tim Newsome <tim@sifive.com>
When a target in an SMP group is unavailable, the gdb layer might get an
event for a different target in that SMP group, but not one that is the
primary target for that gdb connection. So propagate events if they're
for any of the targets in the SMP group, not just if it's for the first
one in that group.
Change-Id: I8d6738762acc7c0aef96f56ce2cb7f2eeb233b33
Signed-off-by: Tim Newsome <tim@sifive.com>
Exit early if conditions aren't satisfied, instead of putting the core
code inside an if().
Also return ERROR_FAIL if conditions are satisfied but no matching
registers were found.
Change-Id: I77aa63d9f707bc38d1a71899275ba603914b52c9
Signed-off-by: Tim Newsome <tim@sifive.com>
Currently, instruction cache is being invalidated in
arc_{un,}set_breakpoint() regardless of whether the breakpoint's type is
HW or SW. For SW breakpoints, this has no net effect as the caches are
flushed as a by-product of overwriting instructions in main memory and
is thus merely unnecessary; but for HW breakpoints this invalidation is
not preceded by a flush and might lead to loss of data. This patch
removes the invalidate() call altogether to correct this undesired
behavior for HW breakpoints.
With this patch applied, all supported HW breakpoint tests from the gdb
testsuite are now passing with the arc-openocd backend.
Change-Id: I3d252b97f01f1a1e2bf0eb8fb257bdab0c544bc2
Signed-off-by: Artemiy Volkov <artemiy@synopsys.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7767
Tested-by: jenkins
Reviewed-by: Evgeniy Didin <didin@synopsys.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The comment above armv8_dpm_read_current_registers() doesn't match
the implementation, as the function reads all the registers from
ARMV8_PC and above.
The registers currently read are not relevant to answer to the
usual GDB initial request through the 'g' packet. Plus the lack of
differentiation per core state (AArch32 vs AArch64) causes the
read of not existing registers in AArch32 triggering errors, as
tentatively fixed by https://review.openocd.org/5517/
Fix the code to read the registers initially required by GDB.
Modify the comment to report the register list in AArch32 and in
AArch64.
Keep the extra checks inside the read loop, even if they are
mostly irrelevant; this could prevent errors if someone needs to
extend the number of registers to read.
The current implementation of the register's description in
OpenOCD does not allow to discriminate among AArch32 and AArch64
registers. Add a TODO comment to highlight it.
Change-Id: Icd47d93c19a9e1694a7b51bbc5ca7e21a578df41
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7887
Tested-by: jenkins
Move `examine_attempted` flag to target struct to make it target specific.
`Info` messages for retry and `Error` messages for failure added.
Change-Id: Id2fbe7dc68d746c936c8412289d0d149fbd80d71
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>
The secure microcontroller Infineon SLx2 uses a custom Cortex-M33.
The register CPUID reports value 0x490FDB00.
Reference link to the product:
Link: https://www.infineon.com/cms/en/about-infineon/press/market-news/2022/INFCSS202211-034.html
Change-Id: I8911712c55bd50e24ed53cf49958352f470027a5
Signed-off-by: Ahmed Boughanmi <boughanmi.external@infineon.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7879
Reviewed-by: Karl Palsson <karlp@tweak.au>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This patch adds error reporting when unknown image type is specified.
Previously, OpenOCD replied with an empty string.
Change-Id: I16220b1f5deb3b966a21731f0adf7911a78e8959
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7883
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Add a new riscv specific commands to disable triggers
Change-Id: Ic1842085aa66851c740e0abcbfbe0adbe930920e
Signed-off-by: Kirill Radkin <kirill.radkin@syntacore.com>