Commit Graph

5 Commits

Author SHA1 Message Date
Antonio Borneo 4157732bd8 tcl/board: add SPDX tag
For historical reasons, no license information was added to the
tcl files. This makes trivial adding the SPDX tag through script:
	fgrep -rL SPDX tcl/board | while read a;do \
	sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n
	}' $a;done

With no specific license information from the author, let's extend
the OpenOCD project license GPL-2.0-or-later to the files.

Change-Id: Ibcf7da62e842aafd036a78db9ea2b9f11f79af16
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7028
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2022-06-24 21:53:49 +00:00
Antonio Borneo 38ac08c1c2 tcl: replace the deprecated commands with "adapter ..."
Avoid annoying "deprecated" messages while running the scripts
distributed with OpenOCD code.
Change automatically created with commands
	sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f)
	sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f)
	sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f)

Minor indentation issue fixed manually in
	tcl/board/at91sam9g20-ek.cfg
	tcl/target/at91sam9260_ext_RAM_ext_flash.cfg

Change-Id: I425fd56c0c88cd6b06124621306eeb89166dfe71
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5284
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2020-01-29 06:34:43 +00:00
Robert Jordens 3d3b45af46 xilinx-dna.cfg: generic tools for reading Xilinx Device DNA
Most Xilinx FPGA devices contain an embedded, unique device identifier.
The identifier is nonvolatile, permanently programmed into the FPGA, and is
unchangeable providing a great serial / tracking number.

This commit adds generic support for reading the Xilinx Spartan 6 and 7
Series (Kintex, Artix, Ultrascale) Device DNA. The code is similar to
the function in fpga/xilinx-xc6s.cfg for Spartan 6 but the register
addresses are different and the logic has been simplified.

The code was not placed in xilinx-xc7.cfg. The approach of defining taps
in the same file as library code to use them is fundamentally broken on
boards that have more than one FPGA or other chips. This commit (like
the addition of support for Xilinx XADC) starts to remedy that by
splitting library code from board-specific fixed definitions.

The support code is sourced in the Kasli and KC705 board support files
as it was tested on these boards.

Change-Id: Iba559c7c1b7e93e1270535fd9e6650007f3794da
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4396
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 16:22:42 +01:00
Robert Jordens 27473588a4 tcl/fpga/xilinx-xadc.cfg: add support for XADC
The 7 Series FPGAs contain an on-chip 12 bit ADC that can probe die
temperature, internal power supply rail voltages as well as external
voltages. The XADC is available both from fabric as well as through the
JTAG TAP.

This code implements access throught the JTAG TAP.

https://www.xilinx.com/support/documentation/user_guides/ug480_7Series_XADC.pdf

Change-Id: I6cef4d0244add71749fa28b58a736302151cc4dd
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/4395
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-03-30 12:53:50 +01:00
Robert Jordens 733e8ba062 kc705: digilent-jtag/kintex7/jtagspi board
Xilinx Kintex7 Development board with integrated Digilent JTAG-SMT1
(a.k.a. HS1) interface and a 128 MBit SPI flash.

Change-Id: I9daba0a2fb2c17e04bcb37bd41872ebde25e0d2f
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/2861
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2015-08-06 13:14:21 +01:00