tcl: replace the deprecated commands with "adapter ..."
Avoid annoying "deprecated" messages while running the scripts distributed with OpenOCD code. Change automatically created with commands sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f) Minor indentation issue fixed manually in tcl/board/at91sam9g20-ek.cfg tcl/target/at91sam9260_ext_RAM_ext_flash.cfg Change-Id: I425fd56c0c88cd6b06124621306eeb89166dfe71 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5284 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
This commit is contained in:
Antonio Borneo
Oleksij Rempel
parent
0d598535a3
commit
38ac08c1c2
|
|
@ -4,7 +4,7 @@
|
|||
|
||||
reset_config trst_and_srst separate
|
||||
|
||||
adapter_nsrst_delay 100
|
||||
adapter srst delay 100
|
||||
jtag_ntrst_delay 100
|
||||
|
||||
source [find target/ixp42x.cfg]
|
||||
|
|
|
|||
|
|
@ -25,7 +25,7 @@ source [find interface/jlink.cfg]
|
|||
transport select swd
|
||||
|
||||
# chosen speed is 'safe' choice, but your adapter may be capable of more
|
||||
adapter_khz 400
|
||||
adapter speed 400
|
||||
|
||||
source [find target/adsp-sc58x.cfg]
|
||||
|
||||
|
|
|
|||
|
|
@ -15,5 +15,5 @@ source [find target/altera_fpgasoc.cfg]
|
|||
#usb_blaster_vid_pid 0x6810 0x09fb
|
||||
#usb_blaster_device_desc "USB-Blaster II"
|
||||
|
||||
adapter_khz 100
|
||||
adapter speed 100
|
||||
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@
|
|||
source [find target/swj-dp.tcl]
|
||||
|
||||
# set a safe JTAG clock speed, can be overridden
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
||||
global _CHIPNAME
|
||||
if { [info exists CHIPNAME] } {
|
||||
|
|
|
|||
|
|
@ -10,7 +10,7 @@ source [find interface/ftdi/digilent-hs1.cfg]
|
|||
source [find cpld/xilinx-xc7.cfg]
|
||||
source [find cpld/jtagspi.cfg]
|
||||
|
||||
adapter_khz 25000
|
||||
adapter speed 25000
|
||||
|
||||
# Usage:
|
||||
#
|
||||
|
|
|
|||
|
|
@ -28,7 +28,7 @@ target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position $_TARGETNAM
|
|||
|
||||
$_TARGETNAME configure -event reset-start {
|
||||
# start off real slow when we're running off internal RC oscillator
|
||||
adapter_khz 32
|
||||
adapter speed 32
|
||||
}
|
||||
|
||||
proc peek32 {address} {
|
||||
|
|
@ -78,7 +78,7 @@ $_TARGETNAME configure -event reset-init {
|
|||
echo "Master clock ok."
|
||||
|
||||
# Now that we're up and running, crank up speed!
|
||||
global post_reset_khz ; adapter_khz $post_reset_khz
|
||||
global post_reset_khz ; adapter speed $post_reset_khz
|
||||
|
||||
echo "Configuring the SDRAM controller..."
|
||||
|
||||
|
|
|
|||
|
|
@ -64,4 +64,4 @@ $_TARGETNAME configure -event reset-init {
|
|||
}
|
||||
|
||||
# This target is pretty snappy...
|
||||
adapter_khz 16000
|
||||
adapter speed 16000
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ flash bank $_FLASHNAME cfi 0x10000000 0x00200000 2 2 $_TARGETNAME
|
|||
proc at91rm9200_dk_init { } {
|
||||
# Try to run at 1khz... Yea, that slow!
|
||||
# Chip is really running @ 32khz
|
||||
adapter_khz 8
|
||||
adapter speed 8
|
||||
|
||||
mww 0xfffffc64 0xffffffff
|
||||
## disable all clocks but system clock
|
||||
|
|
@ -45,7 +45,7 @@ proc at91rm9200_dk_init { } {
|
|||
#========================================
|
||||
# CPU now runs at 180mhz
|
||||
# SYS runs at 60mhz.
|
||||
adapter_khz 40000
|
||||
adapter speed 40000
|
||||
#========================================
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -19,12 +19,12 @@ set _FLASHNAME $_CHIPNAME.flash
|
|||
flash bank $_FLASHNAME cfi 0x10000000 0x00800000 2 2 $_TARGETNAME
|
||||
|
||||
# The chip may run @ 32khz, so set a really low JTAG speed
|
||||
adapter_khz 8
|
||||
adapter speed 8
|
||||
|
||||
proc at91rm9200_ek_init { } {
|
||||
# Try to run at 1khz... Yea, that slow!
|
||||
# Chip is really running @ 32khz
|
||||
adapter_khz 8
|
||||
adapter speed 8
|
||||
|
||||
mww 0xfffffc64 0xffffffff
|
||||
## disable all clocks but system clock
|
||||
|
|
@ -61,7 +61,7 @@ proc at91rm9200_ek_init { } {
|
|||
#========================================
|
||||
# CPU now runs at 180mhz
|
||||
# SYS runs at 60mhz.
|
||||
adapter_khz 40000
|
||||
adapter speed 40000
|
||||
#========================================
|
||||
|
||||
## Init SDRAM
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ set _FLASHTYPE nandflash_cs3
|
|||
|
||||
reset_config srst_only
|
||||
|
||||
adapter_nsrst_delay 200
|
||||
adapter srst delay 200
|
||||
jtag_ntrst_delay 200
|
||||
|
||||
# If you don't want to execute built-in boot rom code (and there are good reasons at times not to do that) in the
|
||||
|
|
@ -54,7 +54,7 @@ proc at91sam9g20_reset_start { } {
|
|||
# jtag speed without causing GDB keep alive problem.
|
||||
|
||||
arm7_9 fast_memory_access disable
|
||||
adapter_khz 2 ;# Slow-speed oscillator enabled at reset, so run jtag speed slow.
|
||||
adapter speed 2 ;# Slow-speed oscillator enabled at reset, so run jtag speed slow.
|
||||
halt ;# Make sure processor is halted, or error will result in following steps.
|
||||
wait_halt 10000
|
||||
mww 0xfffffd08 0xa5000501 ;# RSTC_MR : enable user reset.
|
||||
|
|
@ -103,7 +103,7 @@ proc at91sam9g20_reset_init { } {
|
|||
|
||||
# Switch over to adaptive clocking.
|
||||
|
||||
adapter_khz 0
|
||||
adapter speed 0
|
||||
|
||||
# Enable faster DCC downloads and memory accesses.
|
||||
|
||||
|
|
|
|||
|
|
@ -7,6 +7,6 @@ reset_config srst_only
|
|||
|
||||
set CHIPNAME at91sam3n4c
|
||||
|
||||
adapter_khz 32
|
||||
adapter speed 32
|
||||
|
||||
source [find target/at91sam3nXX.cfg]
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ transport select jtag
|
|||
reset_config none
|
||||
|
||||
# slow default clock
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
||||
set CHIPNAME uscale
|
||||
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
# BCM28155_AP
|
||||
|
||||
adapter_khz 20000
|
||||
adapter speed 20000
|
||||
|
||||
set CHIPNAME bcm28155
|
||||
source [find target/bcm281xx.cfg]
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
# Toradex Colibri PXA270
|
||||
source [find target/pxa270.cfg]
|
||||
reset_config trst_and_srst srst_push_pull
|
||||
adapter_nsrst_assert_width 40
|
||||
adapter srst pulse_width 40
|
||||
|
||||
# CS0 -- one bank of CFI flash, 32 MBytes
|
||||
# the bank is 32-bits wide, two 16-bit chips in parallel
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@ set CHIPNAME imote2
|
|||
source [find target/pxa270.cfg]
|
||||
|
||||
# longer-than-normal reset delay
|
||||
adapter_nsrst_delay 800
|
||||
adapter srst delay 800
|
||||
|
||||
reset_config trst_and_srst separate
|
||||
|
||||
|
|
|
|||
|
|
@ -19,7 +19,7 @@ if { [info exists ETM_DRIVER] } {
|
|||
|
||||
proc csb337_clk_init { } {
|
||||
# CPU is in Slow Clock Mode (32KiHz) ... needs slow JTAG clock
|
||||
adapter_khz 8
|
||||
adapter speed 8
|
||||
|
||||
# CKGR_MOR: start main oscillator (3.6864 MHz)
|
||||
mww 0xfffffc20 0xff01
|
||||
|
|
@ -37,7 +37,7 @@ proc csb337_clk_init { } {
|
|||
sleep 20
|
||||
|
||||
# CPU is in Normal Mode ... allows faster JTAG clock speed
|
||||
adapter_khz 40000
|
||||
adapter speed 40000
|
||||
}
|
||||
|
||||
proc csb337_nor_init { } {
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@ source [find target/imx35.cfg]
|
|||
|
||||
# Determined by trial and error
|
||||
reset_config trst_and_srst combined
|
||||
adapter_nsrst_delay 200
|
||||
adapter srst delay 200
|
||||
jtag_ntrst_delay 200
|
||||
|
||||
$_TARGETNAME configure -event gdb-attach { reset init }
|
||||
|
|
|
|||
|
|
@ -36,7 +36,7 @@ if { [info exists CPUTAPID] } {
|
|||
set _TARGETNAME $_CHIPNAME.cpu
|
||||
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
||||
|
||||
adapter_nsrst_delay 200
|
||||
adapter srst delay 200
|
||||
jtag_ntrst_delay 0
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -13,6 +13,6 @@ ftdi_vid_pid 0x0403 0x6014
|
|||
|
||||
ftdi_layout_init 0x8008 0x800b
|
||||
|
||||
adapter_khz 25000
|
||||
adapter speed 25000
|
||||
|
||||
source [find cpld/xilinx-xc6s.cfg]
|
||||
|
|
|
|||
|
|
@ -103,7 +103,7 @@ proc dm365evm_init {} {
|
|||
echo "Initialize DM365 EVM board"
|
||||
|
||||
# CLKIN = 24 MHz ... can't talk quickly to ARM yet
|
||||
adapter_khz 1500
|
||||
adapter speed 1500
|
||||
|
||||
# FIXME -- PLL init
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
# http://dangerousprototypes.com/docs/Bus_Blaster
|
||||
#
|
||||
# To reprogram the on-board CPLD do:
|
||||
# openocd -f board/dp_busblaster_v3.cfg -c "adapter_khz 1000; init; svf <path_to_svf>; shutdown"
|
||||
# openocd -f board/dp_busblaster_v3.cfg -c "adapter speed 1000; init; svf <path_to_svf>; shutdown"
|
||||
#
|
||||
|
||||
source [find interface/ftdi/dp_busblaster.cfg]
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
|
||||
source [find interface/jlink.cfg]
|
||||
transport select swd
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
||||
set CHIPNAME efm32
|
||||
source [find target/efm32.cfg]
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
#
|
||||
|
||||
# NOTE: to use J-Link instead of the on-board interface,
|
||||
# you may also need to reduce adapter_khz to be about 1200.
|
||||
# you may also need to reduce adapter speed to be about 1200.
|
||||
# source [find interface/jlink.cfg]
|
||||
|
||||
# include the FT2232 interface config for on-board JTAG interface
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ proc read_register {register} {
|
|||
|
||||
proc init_board {} {
|
||||
# Delays on reset lines
|
||||
adapter_nsrst_delay 500
|
||||
adapter srst delay 500
|
||||
jtag_ntrst_delay 1
|
||||
|
||||
# Adaptive JTAG clocking through RTCK.
|
||||
|
|
|
|||
|
|
@ -6,13 +6,13 @@
|
|||
transport select jtag
|
||||
|
||||
# set a safe JTAG clock speed, can be overridden
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
||||
# SRST and TRST are wired up
|
||||
reset_config trst_and_srst
|
||||
|
||||
# delay after SRST goes inactive
|
||||
adapter_nsrst_delay 70
|
||||
adapter srst delay 70
|
||||
|
||||
# board has an i.MX8MQ with 4 Cortex-A53 cores
|
||||
set CHIPNAME imx8mq
|
||||
|
|
|
|||
|
|
@ -20,13 +20,13 @@ flash bank $_FLASHNAME cfi 0x10000000 0x400000 2 2 $_TARGETNAME
|
|||
# Micrel MIC2775-29YM5 Supervisor
|
||||
# Reset output will remain active for 280ms (maximum)
|
||||
#
|
||||
adapter_nsrst_delay 300
|
||||
adapter srst delay 300
|
||||
jtag_ntrst_delay 300
|
||||
|
||||
|
||||
arm7_9 fast_memory_access enable
|
||||
arm7_9 dcc_downloads enable
|
||||
adapter_khz 16000
|
||||
adapter speed 16000
|
||||
|
||||
|
||||
# Target events
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ transport select jtag
|
|||
|
||||
# iMX6Q POR gates JTAG and the chip is completely incommunicado
|
||||
# over JTAG for at least 10ms after nSRST is deasserted
|
||||
adapter_nsrst_delay 11
|
||||
adapter srst delay 11
|
||||
|
||||
# Source generic iMX6Q target configuration
|
||||
set CHIPNAME imx6q
|
||||
|
|
@ -144,4 +144,4 @@ $_TARGETNAME.0 configure -event reset-assert { }
|
|||
# hook the init function into the reset-init event
|
||||
$_TARGETNAME.0 configure -event reset-init { imx6q_sabresd_init }
|
||||
# set a slow default JTAG clock, can be overridden later
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
|
|
|||
|
|
@ -19,12 +19,12 @@ source [find target/tmpa900.cfg]
|
|||
# Initial JTAG speed should not exceed 1/6 of the initial CPU clock
|
||||
# frequency (24MHz). Be conservative and use 1/8 of the frequency.
|
||||
# (24MHz / 8 = 3MHz)
|
||||
adapter_khz 3000
|
||||
adapter speed 3000
|
||||
|
||||
$_TARGETNAME configure -event reset-start {
|
||||
# Upon reset, set the JTAG frequency to 3MHz again, see above.
|
||||
echo "Setting JTAG speed to 3MHz until clocks are initialized."
|
||||
adapter_khz 3000
|
||||
adapter speed 3000
|
||||
|
||||
# Halt the CPU.
|
||||
halt
|
||||
|
|
@ -41,7 +41,7 @@ $_TARGETNAME configure -event reset-init {
|
|||
# Tests showed that 15MHz works OK, higher speeds can cause problems,
|
||||
# though. Not sure if this is a CPU issue or JTAG adapter issue.
|
||||
echo "Increasing JTAG speed to 15MHz."
|
||||
adapter_khz 15000
|
||||
adapter speed 15000
|
||||
|
||||
# Enable faster memory access.
|
||||
arm7_9 fast_memory_access enable
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
source [find target/hilscher_netx500.cfg]
|
||||
|
||||
reset_config trst_and_srst
|
||||
adapter_nsrst_delay 500
|
||||
adapter srst delay 500
|
||||
jtag_ntrst_delay 500
|
||||
|
||||
$_TARGETNAME configure -work-area-virt 0x1000 -work-area-phys 0x1000 -work-area-size 0x4000 -work-area-backup 1
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
source [find target/hilscher_netx500.cfg]
|
||||
|
||||
reset_config trst_and_srst
|
||||
adapter_nsrst_delay 500
|
||||
adapter srst delay 500
|
||||
jtag_ntrst_delay 500
|
||||
|
||||
$_TARGETNAME configure -work-area-virt 0x1000 -work-area-phys 0x1000 -work-area-size 0x4000 -work-area-backup 1
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ source [find target/hilscher_netx10.cfg]
|
|||
# problems try to line below
|
||||
# reset_config trst_and_srst srst_pulls_trst
|
||||
reset_config trst_and_srst
|
||||
adapter_nsrst_delay 500
|
||||
adapter srst delay 500
|
||||
jtag_ntrst_delay 500
|
||||
|
||||
$_TARGETNAME configure -work-area-virt 0x08000000 -work-area-phys 0x08000000 -work-area-size 0x4000 -work-area-backup 1
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
source [find target/hilscher_netx50.cfg]
|
||||
|
||||
reset_config trst_and_srst
|
||||
adapter_nsrst_delay 500
|
||||
adapter srst delay 500
|
||||
jtag_ntrst_delay 500
|
||||
|
||||
$_TARGETNAME configure -work-area-virt 0x10000000 -work-area-phys 0x10000000 -work-area-size 0x4000 -work-area-backup 1
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
source [find target/hilscher_netx500.cfg]
|
||||
|
||||
reset_config trst_and_srst
|
||||
adapter_nsrst_delay 500
|
||||
adapter srst delay 500
|
||||
jtag_ntrst_delay 500
|
||||
|
||||
$_TARGETNAME configure -work-area-virt 0x1000 -work-area-phys 0x1000 -work-area-size 0x4000 -work-area-backup 1
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
source [find target/hilscher_netx500.cfg]
|
||||
|
||||
reset_config trst_and_srst
|
||||
adapter_nsrst_delay 500
|
||||
adapter srst delay 500
|
||||
jtag_ntrst_delay 500
|
||||
|
||||
$_TARGETNAME configure -work-area-virt 0x1000 -work-area-phys 0x1000 -work-area-size 0x4000 -work-area-backup 1
|
||||
|
|
|
|||
|
|
@ -11,5 +11,5 @@ source [find target/lpc17xx.cfg]
|
|||
|
||||
|
||||
# startup @ 500kHz
|
||||
adapter_khz 500
|
||||
adapter speed 500
|
||||
|
||||
|
|
|
|||
|
|
@ -2,12 +2,12 @@
|
|||
# http://www.hitex.com/
|
||||
|
||||
# Delays on reset lines
|
||||
adapter_nsrst_delay 50
|
||||
adapter srst delay 50
|
||||
jtag_ntrst_delay 1
|
||||
|
||||
# Maximum of 1/8 of clock frequency (XTAL = 16 MHz).
|
||||
# Adaptive clocking through RTCK is not supported.
|
||||
adapter_khz 2000
|
||||
adapter speed 2000
|
||||
|
||||
# Target device: LPC29xx with ETB
|
||||
# The following variables are used by the LPC2900 script:
|
||||
|
|
@ -24,7 +24,7 @@ $_TARGETNAME configure -work-area-phys 0x58000000 -work-area-size 0x10000 -work-
|
|||
# Event handlers
|
||||
$_TARGETNAME configure -event reset-start {
|
||||
# Back to the slow JTAG clock
|
||||
adapter_khz 2000
|
||||
adapter speed 2000
|
||||
}
|
||||
|
||||
# External 16-bit flash at chip select CS7 (SST39VF3201-70, 4 MiB)
|
||||
|
|
@ -46,7 +46,7 @@ $_TARGETNAME configure -event reset-init {
|
|||
mww 0xFFFF8070 0x02000000 ;# SYS_CLK_CONF: PLL
|
||||
|
||||
# Increase JTAG speed
|
||||
adapter_khz 6000
|
||||
adapter speed 6000
|
||||
|
||||
# Enable external memory bus (16-bit SRAM at CS6, 16-bit flash at CS7)
|
||||
mww 0xE0001138 0x0000001F ;# P1.14 = D0
|
||||
|
|
|
|||
|
|
@ -12,5 +12,5 @@ source [find target/stm32f1x.cfg]
|
|||
jtag newtap str750 cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id 0x4f1f0041
|
||||
|
||||
# for some reason this board like to startup @ 500kHz
|
||||
adapter_khz 500
|
||||
adapter speed 500
|
||||
|
||||
|
|
|
|||
|
|
@ -5,9 +5,9 @@
|
|||
source [find interface/ftdi/hitex_str9-comstick.cfg]
|
||||
|
||||
# set jtag speed
|
||||
adapter_khz 3000
|
||||
adapter speed 3000
|
||||
|
||||
adapter_nsrst_delay 100
|
||||
adapter srst delay 100
|
||||
jtag_ntrst_delay 100
|
||||
#use combined on interfaces or targets that can't set TRST/SRST separately
|
||||
reset_config trst_and_srst
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ echo "i.MX53 SO-Dimm board lodaded."
|
|||
# Set reset type
|
||||
#reset_config srst_only
|
||||
|
||||
adapter_khz 3000
|
||||
adapter speed 3000
|
||||
|
||||
# Slow speed to be sure it will work
|
||||
jtag_rclk 1000
|
||||
|
|
@ -58,7 +58,7 @@ proc sodimm_init { } {
|
|||
arm core_state arm
|
||||
|
||||
jtag_rclk 3000
|
||||
# adapter_khz 3000
|
||||
# adapter speed 3000
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@ source [find target/at91sam9g45.cfg]
|
|||
# Set reset type.
|
||||
# reset_config trst_and_srst
|
||||
|
||||
# adapter_nsrst_delay 200
|
||||
# adapter srst delay 200
|
||||
# jtag_ntrst_delay 200
|
||||
|
||||
|
||||
|
|
@ -58,7 +58,7 @@ proc at91sam9g45_start { } {
|
|||
|
||||
arm7_9 fast_memory_access disable
|
||||
# Slow-speed oscillator enabled at reset, so run jtag speed slow.
|
||||
adapter_khz 4
|
||||
adapter speed 4
|
||||
# Make sure processor is halted, or error will result in following steps.
|
||||
halt
|
||||
wait_halt 10000
|
||||
|
|
@ -117,7 +117,7 @@ proc at91sam9g45_init { } {
|
|||
|
||||
# Switch over to adaptive clocking.
|
||||
|
||||
adapter_khz 6000
|
||||
adapter speed 6000
|
||||
|
||||
# Enable faster DCC downloads.
|
||||
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ proc imx27lnst_init { } {
|
|||
# This setup puts RAM at 0xA0000000
|
||||
|
||||
# reset the board correctly
|
||||
adapter_khz 500
|
||||
adapter speed 500
|
||||
reset run
|
||||
reset halt
|
||||
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ echo "iMX53 M53EVK board lodaded."
|
|||
reset_config trst_and_srst separate trst_open_drain srst_open_drain
|
||||
|
||||
# Run at 6 MHz
|
||||
adapter_khz 6000
|
||||
adapter speed 6000
|
||||
|
||||
$_TARGETNAME configure -event "reset-assert" {
|
||||
echo "Reseting ...."
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ echo "iMX53 Loco board lodaded."
|
|||
# Set reset type
|
||||
#reset_config srst_only
|
||||
|
||||
adapter_khz 3000
|
||||
adapter speed 3000
|
||||
|
||||
# Slow speed to be sure it will work
|
||||
jtag_rclk 1000
|
||||
|
|
@ -59,7 +59,7 @@ proc loco_init { } {
|
|||
arm core_state arm
|
||||
|
||||
jtag_rclk 3000
|
||||
# adapter_khz 3000
|
||||
# adapter speed 3000
|
||||
}
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -5,4 +5,4 @@
|
|||
source [find target/exynos5250.cfg]
|
||||
|
||||
# Experimentally determined highest working speed
|
||||
adapter_khz 200
|
||||
adapter speed 200
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ ftdi_layout_init 0x0008 0x000b
|
|||
|
||||
reset_config none
|
||||
transport select jtag
|
||||
adapter_khz 25000
|
||||
adapter speed 25000
|
||||
|
||||
source [find cpld/xilinx-xc7.cfg]
|
||||
source [find cpld/jtagspi.cfg]
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@ source [find cpld/xilinx-xc7.cfg]
|
|||
source [find cpld/jtagspi.cfg]
|
||||
source [find fpga/xilinx-xadc.cfg]
|
||||
source [find fpga/xilinx-dna.cfg]
|
||||
adapter_khz 25000
|
||||
adapter speed 25000
|
||||
|
||||
# example command to write bitstream, soft-cpu bios and runtime:
|
||||
# openocd -f board/kc705.cfg -c "init;\
|
||||
|
|
|
|||
|
|
@ -8,4 +8,4 @@ source [find cpld/xilinx-xcu.cfg]
|
|||
|
||||
source [find cpld/jtagspi.cfg]
|
||||
|
||||
adapter_khz 25000
|
||||
adapter speed 25000
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ source [find target/imx31.cfg]
|
|||
source [find target/imx.cfg]
|
||||
|
||||
$_TARGETNAME configure -event reset-init { kindle2_init }
|
||||
$_TARGETNAME configure -event reset-start { adapter_khz 1000 }
|
||||
$_TARGETNAME configure -event reset-start { adapter speed 1000 }
|
||||
|
||||
# 8MiB NOR Flash
|
||||
set _FLASHNAME $_CHIPNAME.flash
|
||||
|
|
@ -36,7 +36,7 @@ jtag_ntrst_delay 30
|
|||
# this is broken but enabled by default
|
||||
arm11 memwrite burst disable
|
||||
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
ftdi_tdo_sample_edge falling
|
||||
|
||||
proc kindle2_init {} {
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
|
||||
source [find target/pxa255.cfg]
|
||||
|
||||
adapter_nsrst_delay 250
|
||||
adapter srst delay 250
|
||||
jtag_ntrst_delay 250
|
||||
|
||||
# NOTE: until after pinmux and such are set up, only CS0 is
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
|
||||
# Recommended MBFTDI programmer
|
||||
source [find interface/ftdi/mbftdi.cfg]
|
||||
adapter_khz 2000
|
||||
adapter speed 2000
|
||||
transport select jtag
|
||||
|
||||
# Altera MAXII EPM240T100C CPLD
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
|
||||
# Built-in MBFTDI programmer
|
||||
source [find interface/ftdi/mbftdi.cfg]
|
||||
adapter_khz 2000
|
||||
adapter speed 2000
|
||||
transport select jtag
|
||||
|
||||
# Cyclone III EP3C10E144 FPGA
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@
|
|||
|
||||
# Built-in MBFTDI programmer
|
||||
source [find interface/ftdi/mbftdi.cfg]
|
||||
adapter_khz 2000
|
||||
adapter speed 2000
|
||||
transport select jtag
|
||||
|
||||
# MAX10 10M50SAE144C8GES FPGA
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ set MCB1700_CCLK $CCLK
|
|||
$_TARGETNAME configure -event reset-start {
|
||||
# Start *real slow* as we do not know the
|
||||
# state the boot rom left the clock in
|
||||
adapter_khz 10
|
||||
adapter speed 10
|
||||
}
|
||||
|
||||
# Set up 100MHz clock to CPU
|
||||
|
|
@ -55,7 +55,7 @@ $_TARGETNAME configure -event reset-init {
|
|||
#
|
||||
#
|
||||
global MCB1700_CCLK
|
||||
adapter_khz [expr $MCB1700_CCLK / 8]
|
||||
adapter speed [expr $MCB1700_CCLK / 8]
|
||||
|
||||
# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
|
||||
# "User Flash Mode" where interrupt vectors are _not_ remapped,
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
#
|
||||
|
||||
source [find interface/cmsis-dap.cfg]
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
||||
set CHIPNAME saml11
|
||||
source [find target/atsaml1x.cfg]
|
||||
|
|
|
|||
|
|
@ -111,7 +111,7 @@ target create $_TARGETNAME arm920t -endian $_ENDIAN -chain-position $_TARGETNAME
|
|||
$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 1
|
||||
|
||||
#reset configuration
|
||||
adapter_nsrst_delay 100
|
||||
adapter srst delay 100
|
||||
jtag_ntrst_delay 100
|
||||
reset_config trst_and_srst
|
||||
|
||||
|
|
@ -120,7 +120,7 @@ reset_config trst_and_srst
|
|||
# IMPORTANT! See README at top of this file.
|
||||
#-------------------------------------------------------------------------
|
||||
|
||||
adapter_khz 12000
|
||||
adapter speed 12000
|
||||
jtag interface
|
||||
|
||||
#-------------------------------------------------------------------------
|
||||
|
|
@ -140,7 +140,7 @@ reset_config trst_and_srst
|
|||
|
||||
nand device s3c2440 0
|
||||
|
||||
adapter_nsrst_delay 100
|
||||
adapter srst delay 100
|
||||
jtag_ntrst_delay 100
|
||||
reset_config trst_and_srst
|
||||
init
|
||||
|
|
|
|||
|
|
@ -88,8 +88,8 @@ proc init_6410_flash {} {
|
|||
}
|
||||
|
||||
|
||||
adapter_khz 1000
|
||||
adapter_nsrst_delay 100
|
||||
adapter speed 1000
|
||||
adapter srst delay 100
|
||||
jtag_ntrst_delay 100
|
||||
reset_config trst_and_srst
|
||||
|
||||
|
|
|
|||
|
|
@ -30,7 +30,7 @@ ftdi_tdo_sample_edge falling
|
|||
#
|
||||
ftdi_layout_init 0x0008 0x004b
|
||||
reset_config none
|
||||
adapter_khz 30000
|
||||
adapter speed 30000
|
||||
|
||||
source [find cpld/xilinx-xc7.cfg]
|
||||
source [find cpld/jtagspi.cfg]
|
||||
|
|
|
|||
|
|
@ -3,12 +3,12 @@
|
|||
transport select jtag
|
||||
|
||||
# set a safe speed, can be overridden
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
||||
# reset configuration has TRST and SRST support
|
||||
reset_config trst_and_srst srst_push_pull
|
||||
# need at least 100ms delay after SRST release for JTAG
|
||||
adapter_nsrst_delay 100
|
||||
adapter srst delay 100
|
||||
|
||||
# source the target file
|
||||
source [find target/imx7.cfg]
|
||||
|
|
|
|||
|
|
@ -6,13 +6,13 @@
|
|||
transport select jtag
|
||||
|
||||
# set a safe JTAG clock speed, can be overridden
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
||||
# default JTAG configuration has only SRST and no TRST
|
||||
reset_config srst_only srst_push_pull
|
||||
|
||||
# delay after SRST goes inactive
|
||||
adapter_nsrst_delay 70
|
||||
adapter srst delay 70
|
||||
|
||||
# board has an i.MX8MQ with 4 Cortex-A53 cores
|
||||
set CHIPNAME imx8mq
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@ source [find target/at91sam7a2.cfg]
|
|||
|
||||
# delays needed to get stable reads of cpu state
|
||||
jtag_ntrst_delay 10
|
||||
adapter_nsrst_delay 200
|
||||
adapter srst delay 200
|
||||
|
||||
# board uses pullup and connects only srst
|
||||
reset_config srst_open_drain
|
||||
|
|
@ -10,9 +10,9 @@ reset_config srst_open_drain
|
|||
# srst is connected to NRESET of CPU and fully resets everything...
|
||||
reset_config srst_only srst_pulls_trst
|
||||
|
||||
adapter_khz 1
|
||||
adapter speed 1
|
||||
$_TARGETNAME configure -event reset-start {
|
||||
adapter_khz 1
|
||||
adapter speed 1
|
||||
}
|
||||
|
||||
$_TARGETNAME configure -event reset-init {
|
||||
|
|
@ -61,7 +61,7 @@ $_TARGETNAME configure -event reset-init {
|
|||
echo "set up pll"
|
||||
|
||||
sleep 100
|
||||
adapter_khz 5000
|
||||
adapter speed 5000
|
||||
}
|
||||
|
||||
$_TARGETNAME arm7_9 dcc_downloads enable
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
source [find interface/ftdi/openrd.cfg]
|
||||
source [find target/feroceon.cfg]
|
||||
|
||||
adapter_khz 2000
|
||||
adapter speed 2000
|
||||
|
||||
$_TARGETNAME configure \
|
||||
-work-area-phys 0x10000000 \
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ source [find target/or1k.cfg]
|
|||
poll_period 1
|
||||
|
||||
# Set the adapter speed
|
||||
adapter_khz 3000
|
||||
adapter speed 3000
|
||||
|
||||
# Enable the target description feature
|
||||
gdb_target_description enable
|
||||
|
|
|
|||
|
|
@ -1,8 +1,8 @@
|
|||
source [find target/lpc3250.cfg]
|
||||
|
||||
adapter_nsrst_delay 200
|
||||
adapter srst delay 200
|
||||
jtag_ntrst_delay 1
|
||||
adapter_khz 200
|
||||
adapter speed 200
|
||||
reset_config trst_and_srst separate
|
||||
|
||||
arm7_9 dcc_downloads enable
|
||||
|
|
@ -11,11 +11,11 @@ $_TARGETNAME configure -event gdb-attach { reset init }
|
|||
|
||||
$_TARGETNAME configure -event reset-start {
|
||||
arm7_9 fast_memory_access disable
|
||||
adapter_khz 200
|
||||
adapter speed 200
|
||||
}
|
||||
|
||||
$_TARGETNAME configure -event reset-end {
|
||||
adapter_khz 6000
|
||||
adapter speed 6000
|
||||
arm7_9 fast_memory_access enable
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -93,7 +93,7 @@ $_TARGETNAME configure -event reset-init {pxa255_sst_init}
|
|||
|
||||
reset_config trst_and_srst
|
||||
|
||||
adapter_nsrst_delay 200
|
||||
adapter srst delay 200
|
||||
jtag_ntrst_delay 200
|
||||
|
||||
#xscale debug_handler 0 0xFFFF0800 ;# debug handler base address
|
||||
|
|
|
|||
|
|
@ -10,6 +10,6 @@ ftdi_layout_signal nTRST -data 0x0100 -noe 0x0100
|
|||
|
||||
source [find target/quark_d20xx.cfg]
|
||||
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
||||
reset_config trst_only
|
||||
|
|
|
|||
|
|
@ -4,6 +4,6 @@
|
|||
source [find target/quark_x10xx.cfg]
|
||||
|
||||
#default frequency but this can be adjusted at runtime
|
||||
adapter_khz 4000
|
||||
adapter speed 4000
|
||||
|
||||
reset_config trst_only
|
||||
|
|
|
|||
|
|
@ -12,8 +12,8 @@ source [find target/nuc910.cfg]
|
|||
#
|
||||
reset_config trst_and_srst srst_pulls_trst
|
||||
|
||||
adapter_khz 1000
|
||||
adapter_nsrst_delay 100
|
||||
adapter speed 1000
|
||||
adapter srst delay 100
|
||||
jtag_ntrst_delay 100
|
||||
|
||||
$_TARGETNAME configure -work-area-phys 0x00000000 -work-area-size 0x04000000 -work-area-backup 0
|
||||
|
|
@ -28,7 +28,7 @@ nand device $_NANDNAME nuc910 $_TARGETNAME
|
|||
# Target events
|
||||
#
|
||||
|
||||
$_TARGETNAME configure -event reset-start {adapter_khz 1000}
|
||||
$_TARGETNAME configure -event reset-start {adapter speed 1000}
|
||||
|
||||
$_TARGETNAME configure -event reset-init {
|
||||
# switch on PLL for 200MHz operation
|
||||
|
|
@ -47,7 +47,7 @@ $_TARGETNAME configure -event reset-init {
|
|||
|
||||
arm7_9 dcc_downloads enable
|
||||
arm7_9 fast_memory_access enable
|
||||
adapter_khz 15000
|
||||
adapter speed 15000
|
||||
|
||||
# map nor flash to 0x20000000
|
||||
# map sdram to 0x00000000
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@ ftdi_layout_init 0x0098 0x008b
|
|||
#ftdi_layout_signal nTRST -data 0x0010
|
||||
reset_config none
|
||||
|
||||
adapter_khz 5000
|
||||
adapter speed 5000
|
||||
|
||||
transport select jtag
|
||||
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
source [find interface/ftdi/sheevaplug.cfg]
|
||||
source [find target/feroceon.cfg]
|
||||
|
||||
adapter_khz 2000
|
||||
adapter speed 2000
|
||||
|
||||
$_TARGETNAME configure \
|
||||
-work-area-phys 0x10000000 \
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Be sure you include the speed and interface before this file
|
||||
# Example:
|
||||
# -c "adapter_khz 5000" -f "interface/ftdi/olimex-arm-usb-tiny-h.cfg" -f "board/sifive-e31arty.cfg"
|
||||
# -c "adapter speed 5000" -f "interface/ftdi/olimex-arm-usb-tiny-h.cfg" -f "board/sifive-e31arty.cfg"
|
||||
|
||||
set _CHIPNAME riscv
|
||||
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Be sure you include the speed and interface before this file
|
||||
# Example:
|
||||
# -c "adapter_khz 5000" -f "interface/ftdi/olimex-arm-usb-tiny-h.cfg" -f "board/sifive-e51arty.cfg"
|
||||
# -c "adapter speed 5000" -f "interface/ftdi/olimex-arm-usb-tiny-h.cfg" -f "board/sifive-e51arty.cfg"
|
||||
|
||||
set _CHIPNAME riscv
|
||||
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x20000001
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
adapter_khz 10000
|
||||
adapter speed 10000
|
||||
|
||||
adapter driver ftdi
|
||||
ftdi_device_desc "Dual RS232-HS"
|
||||
|
|
@ -10,7 +10,7 @@ ftdi_layout_signal nSRST -oe 0x0020 -data 0x0020
|
|||
#Reset Stretcher logic on FE310 is ~1 second long
|
||||
#This doesn't apply if you use
|
||||
# ftdi_set_signal, but still good to document
|
||||
#adapter_nsrst_delay 1500
|
||||
#adapter srst delay 1500
|
||||
|
||||
set _CHIPNAME riscv
|
||||
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x10e31913
|
||||
|
|
|
|||
|
|
@ -10,10 +10,10 @@ source [find target/c100helper.tcl]
|
|||
# Telo board & C100 support trst and srst
|
||||
# make the reset asserted to
|
||||
# allow RC circuit to discharge for: [ms]
|
||||
adapter_nsrst_assert_width 100
|
||||
adapter srst pulse_width 100
|
||||
jtag_ntrst_assert_width 100
|
||||
# don't talk to JTAG after reset for: [ms]
|
||||
adapter_nsrst_delay 100
|
||||
adapter srst delay 100
|
||||
jtag_ntrst_delay 100
|
||||
reset_config trst_and_srst separate
|
||||
|
||||
|
|
@ -23,11 +23,11 @@ reset_config trst_and_srst separate
|
|||
# issue telnet: reset init
|
||||
# issue gdb: monitor reset init
|
||||
$_TARGETNAME configure -event reset-init {
|
||||
adapter_khz 100
|
||||
adapter speed 100
|
||||
# this will setup Telo board
|
||||
setupTelo
|
||||
#turn up the JTAG speed
|
||||
adapter_khz 3000
|
||||
adapter speed 3000
|
||||
echo "JTAG speek now 3MHz"
|
||||
echo "type helpC100 to get help on C100"
|
||||
}
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
source [find interface/ftdi/xds100v2.cfg]
|
||||
|
||||
transport select jtag
|
||||
adapter_khz 30000
|
||||
adapter speed 30000
|
||||
|
||||
source [find target/am437x.cfg]
|
||||
$_TARGETNAME configure -event reset-init { init_platform 0x61a11b32 }
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
# Works on both AM437x GP EVM and AM438x ePOS EVM
|
||||
transport select jtag
|
||||
adapter_khz 16000
|
||||
adapter speed 16000
|
||||
|
||||
source [find target/am437x.cfg]
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,7 @@
|
|||
# The JTAG interface is built directly on the board.
|
||||
source [find interface/ftdi/xds100v2.cfg]
|
||||
|
||||
adapter_khz 16000
|
||||
adapter speed 16000
|
||||
|
||||
reset_config trst_and_srst
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
# AM335x Beaglebone Black
|
||||
# http://beagleboard.org/bone
|
||||
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
||||
reset_config trst_and_srst
|
||||
|
||||
|
|
|
|||
|
|
@ -3,5 +3,5 @@
|
|||
#
|
||||
source [find interface/xds110.cfg]
|
||||
transport select jtag
|
||||
adapter_khz 2500
|
||||
adapter speed 2500
|
||||
source [find target/ti_cc13x0.cfg]
|
||||
|
|
|
|||
|
|
@ -2,6 +2,6 @@
|
|||
# TI CC13x2 LaunchPad Evaluation Kit
|
||||
#
|
||||
source [find interface/xds110.cfg]
|
||||
adapter_khz 2500
|
||||
adapter speed 2500
|
||||
transport select jtag
|
||||
source [find target/ti_cc13x2.cfg]
|
||||
|
|
|
|||
|
|
@ -2,6 +2,6 @@
|
|||
# TI CC26x0 LaunchPad Evaluation Kit
|
||||
#
|
||||
source [find interface/xds110.cfg]
|
||||
adapter_khz 2500
|
||||
adapter speed 2500
|
||||
transport select jtag
|
||||
source [find target/ti_cc26x0.cfg]
|
||||
|
|
|
|||
|
|
@ -2,6 +2,6 @@
|
|||
# TI CC26x2 LaunchPad Evaluation Kit
|
||||
#
|
||||
source [find interface/xds110.cfg]
|
||||
adapter_khz 2500
|
||||
adapter speed 2500
|
||||
transport select jtag
|
||||
source [find target/ti_cc26x2.cfg]
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ if { [info exists TRANSPORT] } {
|
|||
transport select jtag
|
||||
}
|
||||
|
||||
adapter_khz 2500
|
||||
adapter speed 2500
|
||||
|
||||
set WORKAREASIZE 0x40000
|
||||
source [find target/ti_cc32xx.cfg]
|
||||
|
|
|
|||
|
|
@ -2,6 +2,6 @@
|
|||
# TI CC3220SF-LaunchXL LaunchPad Evaluation Kit
|
||||
#
|
||||
source [find interface/xds110.cfg]
|
||||
adapter_khz 2500
|
||||
adapter speed 2500
|
||||
transport select swd
|
||||
source [find target/ti_cc3220sf.cfg]
|
||||
|
|
|
|||
|
|
@ -2,6 +2,6 @@
|
|||
# TI CC32xx-LaunchXL LaunchPad Evaluation Kit
|
||||
#
|
||||
source [find interface/xds110.cfg]
|
||||
adapter_khz 2500
|
||||
adapter speed 2500
|
||||
transport select swd
|
||||
source [find target/ti_cc32xx.cfg]
|
||||
|
|
|
|||
|
|
@ -2,6 +2,6 @@
|
|||
# TI MSP432 LaunchPad Evaluation Kit
|
||||
#
|
||||
source [find interface/xds110.cfg]
|
||||
adapter_khz 2500
|
||||
adapter speed 2500
|
||||
transport select swd
|
||||
source [find target/ti_msp432.cfg]
|
||||
|
|
|
|||
|
|
@ -1,4 +1,4 @@
|
|||
adapter_khz 1500
|
||||
adapter speed 1500
|
||||
|
||||
source [find interface/ftdi/xds100v2.cfg]
|
||||
source [find target/ti_tms570.cfg]
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@
|
|||
# board does not feature anything but JTAG
|
||||
transport select jtag
|
||||
|
||||
adapter_khz 10000
|
||||
adapter speed 10000
|
||||
|
||||
# SRST-only reset configuration
|
||||
reset_config srst_only srst_push_pull
|
||||
|
|
|
|||
|
|
@ -99,7 +99,7 @@ proc topas910_init { } {
|
|||
mww 0xf4300004 0x00000000
|
||||
|
||||
sleep 10
|
||||
# adapter_khz NNNN
|
||||
# adapter speed NNNN
|
||||
|
||||
# remap off in case of IROM boot
|
||||
mww 0xf0000004 0x00000001
|
||||
|
|
|
|||
|
|
@ -105,7 +105,7 @@ proc topasa900_init { } {
|
|||
mww 0xf4300004 0x00000000
|
||||
|
||||
sleep 10
|
||||
# adapter_khz NNNN
|
||||
# adapter speed NNNN
|
||||
|
||||
# remap off in case of IROM boot
|
||||
mww 0xf0000004 0x00000001
|
||||
|
|
|
|||
|
|
@ -198,4 +198,4 @@ proc board_init { } {
|
|||
# hook the init function into the reset-init event
|
||||
${_TARGETNAME}0 configure -event reset-init { board_init }
|
||||
# set a slow default JTAG clock, can be overridden later
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ source [find target/pxa270.cfg]
|
|||
reset_config trst_and_srst separate
|
||||
|
||||
# XM4 = 400MHz, XL6P = 600MHz...let's run at 0.1*400MHz=40MHz
|
||||
adapter_khz 40000
|
||||
adapter speed 40000
|
||||
|
||||
# flash bank <driver> <base> <size> <chip_width> <bus_width>
|
||||
# XL6P has 32 MB flash
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@
|
|||
|
||||
source [find target/samsung_s3c2440.cfg]
|
||||
|
||||
adapter_khz 16000
|
||||
adapter speed 16000
|
||||
|
||||
# Samsung K9F1208U0C NAND flash chip (64MiB, 3.3V, 8-bit)
|
||||
nand device $_CHIPNAME.nand s3c2440 $_TARGETNAME
|
||||
|
|
|
|||
|
|
@ -72,7 +72,7 @@ $_TARGETNAME configure -event gdb-attach {
|
|||
# other things than flash programming.
|
||||
$_TARGETNAME configure -work-area-phys 0x00020000 -work-area-size 0x20000 -work-area-backup 0
|
||||
|
||||
adapter_khz 16000
|
||||
adapter speed 16000
|
||||
|
||||
|
||||
proc production_info {} {
|
||||
|
|
|
|||
|
|
@ -6,6 +6,6 @@
|
|||
# See calao-usb-a9260-c01.cfg and calao-usb-a9260-c02.cfg.
|
||||
#
|
||||
|
||||
adapter_nsrst_delay 200
|
||||
adapter srst delay 200
|
||||
jtag_ntrst_delay 200
|
||||
|
||||
|
|
|
|||
|
|
@ -1,2 +1,2 @@
|
|||
adapter driver ft232r
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
|
|
|||
|
|
@ -12,4 +12,4 @@ ftdi_layout_init 0x0008 0x000b
|
|||
reset_config none
|
||||
# this generally works fast: the fpga can handle 30MHz, the spi flash can handle
|
||||
# 54MHz with simple read, no dummy cycles, and wait-for-write-completion
|
||||
adapter_khz 30000
|
||||
adapter speed 30000
|
||||
|
|
|
|||
|
|
@ -10,4 +10,4 @@ ftdi_layout_init 0x0008 0x000b
|
|||
reset_config none
|
||||
# this generally works fast: the fpga can handle 30MHz, the spi flash can handle
|
||||
# 54MHz with simple read, no dummy cycles, and wait-for-write-completion
|
||||
adapter_khz 10000
|
||||
adapter speed 10000
|
||||
|
|
|
|||
|
|
@ -10,6 +10,6 @@ aice serial "C001-42163"
|
|||
aice vid_pid 0x1CFC 0x0000
|
||||
aice port aice_usb
|
||||
reset_config trst_and_srst
|
||||
adapter_khz 24000
|
||||
adapter speed 24000
|
||||
aice retry_times 50
|
||||
aice count_to_check_dbger 30
|
||||
|
|
|
|||
|
|
@ -50,9 +50,9 @@ if { [info exists IMEMORY] && [string equal $IMEMORY true] } {
|
|||
}
|
||||
|
||||
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
|
||||
adapter_khz 1000
|
||||
adapter speed 1000
|
||||
|
||||
adapter_nsrst_delay 100
|
||||
adapter srst delay 100
|
||||
if {[using_jtag]} {
|
||||
jtag_ntrst_delay 100
|
||||
}
|
||||
|
|
|
|||
|
|
@ -17,7 +17,7 @@ if { [info exists CPUTAPID] } {
|
|||
set _CPUTAPID 0x3f0f0f0f
|
||||
}
|
||||
|
||||
adapter_nsrst_delay 200
|
||||
adapter srst delay 200
|
||||
jtag_ntrst_delay 200
|
||||
|
||||
## JTAG scan chain
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue