Commit Graph

329 Commits

Author SHA1 Message Date
Andrey Smirnov d92a2ac330 generalplus: Add configuration file for General Plus GP326XXXA series
Add configuration file for General Plus GP326XXXA series. Tested on
GP326833A on GPC-1737B board.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: I1ad0e22598b01317bbc823870a7a262e9192c595
Reviewed-on: http://openocd.zylin.com/2058
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-05-05 20:23:45 +00:00
Seth LaForge 3427cf2b7e cortex_a: fix endiannes issues on TI TMS570
The TI TMS470 and TMS570 series of processors are BE-32 processors,
despite BE-32 not being supported by ARM in the Cortex-R4 core. TI
hacked in BE-32 support, which requires odd swizzling in OpenOCD to
make memory reads and writes function correctly. In particular,
without this change, OpenOCD word reads and writes had the bytes
reversed, and halfword and byte packed reads were reading garbage.
In my testing, this change fixes these problems.

Change-Id: I21dd30f4b9003f20fcc85f674ab833407bb61f74
Signed-off-by: Seth LaForge <sethml@google.com>
Reviewed-on: http://openocd.zylin.com/2064
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-04-14 18:20:36 +00:00
Lee Bowyer 47830f0ebf tcl: bcm6348 target config, BT HomeHub v1 board config
Also add the board to the firmware recovery script.

Change-Id: I4f9c895dae171df7249e3b1c0563b288518b9fe0
Signed-off-by: Lee Bowyer <lee@sodnpoo.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2097
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-04-14 18:15:24 +00:00
Paul Fertser de9ebc5ce6 tcl/target: make milandr configs swd-compatible
Change-Id: Ibb34f0d7829b205341bcce511ffc2624bdfe2c75
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1962
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-29 08:07:16 +00:00
Andrey Smirnov ba66b4c594 nrf51: Add UICR writing support
SoftDevice stack ihex binary, provided by Nordic expects being able to
write data necessary for its correct operation at the adresses inside UICR.
This patch exposes UICR region of flash as a second bank on the MCU to
facilitate that.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: Idbc140b8de027f60655f78043877b7c054eb06f9
Reviewed-on: http://openocd.zylin.com/2013
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2014-03-29 07:25:21 +00:00
Tim Sander 91a36fcf0a tcl: add Zynq-7000 target and Zedboard board configs
Change-Id: Ia7f2a57d1b32dda9936ad87e22635f7749ff3ce1
Signed-off-by: Tim Sander <tim@krieglstein.org>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2061
Tested-by: jenkins
2014-03-29 07:16:00 +00:00
Felipe Balbi 058163e32e cfg: add TI am43xx devices
This adds support for the am43xx SoC and the AM437x GP EVM and AM438x
ePOS EVM.

Change-Id: I09cbb09072f38e0e08fdd520dedb6e67d45056be
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2047
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2014-03-29 07:00:22 +00:00
Felipe Balbi 3201a104fe tcl: target: icepick: add icepick_d_tapenable procedure
instead of replicating icepick_d_tapenable in many of TI's newer
platforms, we can move to icepick.cfg and just call it from board TCL
configuration file.  This is similar to the C but has a few changes we
need to make.

Change-Id: I0ab48005ccd66cd5b67b919fb5e3b462288f211d
Signed-off-by: Felipe Balbi <balbi@ti.com>
Signed-off-by: Tom Rini <trini@ti.com>
Reviewed-on: http://openocd.zylin.com/2030
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2014-03-17 12:53:02 +00:00
Spencer Oliver 0694bc652d cfg: change default SAM4L cortex_m reset_config
From testing this target does not seem to support using SYSRESETREQ, change
the default to the safe VECTRESET.

This target also has other reset issues (srst not working) that will be
addressed in another patch.

Change-Id: Icfc78347dc71aa3a062ddea63190a818d7fbc760
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1995
Tested-by: jenkins
Reviewed-by: Angus Gratton <gus@projectgus.com>
2014-03-17 12:50:17 +00:00
Jörg Wunsch 122ec5fbe2 Make the Atmel SAM3 family SWD-aware
Atmel's SAM3 and SAM4 processor families are very close to each other
in many respects.  However, so far, only the SAM4 target script
contained the magic to allow using SWD, while SAM3 was tied to JTAG
only.  This e.g. prevented the CMSIS-DAP driver from accessing SAM3
devices as it only uses SWD transport (by now).

The patch pulls all the things from the SAM4 target script that are
also applicable to SAM3 devices.  With the patch, an Atmel CMSIS-DAP
debugger (Atmel-ICE) was proven to be able to successfully attach to a
SAM3S-EK evaluation kit.  I also cross-checked that accessing through
a SAM-ICE (Segger J-Link) still works with the patch.

Change-Id: I20dafbff8e1e9f967da950e48a56205586eeef8d
Signed-off-by: Jörg Wunsch <openocd@uriah.heep.sax.de>
Reviewed-on: http://openocd.zylin.com/2046
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-17 12:49:32 +00:00
Tim Kryger f91390f538 bcm281xx: Add bcm281xx SoC and bcm28155_ap board
Add support for Broadcom's dual A9 mobile SoC and its reference board.

Change-Id: Ia145b120043bddc89c44726066023154ae390788
Signed-off-by: Tim Kryger <tim.kryger@linaro.org>
Reviewed-on: http://openocd.zylin.com/1926
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-03-09 22:33:32 +00:00
Andrey Yurovsky 8e44a9663d Add support for the Atmel SAMG53
flash: at91sam4: add support for the SAMG53 family (this also covers the
SAMG51).  The SAMG5x parts have an EEFC (enhanced embedded flash controller)
which seems to be identical to the EFC that the sam4 driver supports.

Add a script for the Xplained Pro G53 board, this has the onboard CMSIS-DAP
debugger and a SAMG53N19.  Tested on this board and chip combination.

Change-Id: I12af50402cd2069b3c7380d92e6fe54816d6c045
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1974
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-03-04 20:18:37 +00:00
Andrey Smirnov 7e4fb97559 nrf51: Implement the support for Nordic's nRF51 devices
Add support for Nordic's nRF51 chip series. Tested with nRF51822.

Change-Id: Id70f6fd76888cc595a353aefb84d25c4cd325d7d
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/1945
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-02-24 12:09:04 +00:00
Fatih Aşıcı 12b34414db cfg: Make stm32f4x usable with SWD transport
Change-Id: Ib8f3b414ec3c31cf8a112e75efe003e2237c59bb
Signed-off-by: Fatih Aşıcı <fatih.asici@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1951
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
2014-02-24 11:56:29 +00:00
Adrian Burns 1338cf60b9 quark_x10xx: add new target quark_x10xx
Intel Quark X10xx SoC debug support added
Lakemont version 1 (LMT1) is the x86 core in Quark X10xx SoC
Generic x86 32-bit code is in x86_32_common.c/h

Change-Id: If2bf77275cd0277a82558cd9895b4c66155cf368
Signed-off-by: adrian.burns@intel.com
Reviewed-on: http://openocd.zylin.com/1829
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-02-11 13:07:29 +00:00
Spencer Oliver ebb71eb291 cfg: LPC17xx default to using SYSRESETREQ to reset target
Originally the LPC17xx user guide (UM10360 Rev 2) stated that SYSRESETREQ
was not supported, so this was the default cortex_m reset mode.

Rev 3 of the same user guide states that it is now supported.
This has been verified on a LPC1768 mbed platform, previously I have not
tested this functionality.

Change-Id: I4858248903981a1c93ce75016e67c9e02702fcc5
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1892
Tested-by: jenkins
Reviewed-by: Jörg Fischer <turboj@gmx.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-01-29 13:20:02 +00:00
Spencer Oliver e18c958e82 cfg: add Freescale FRDM-KL46Z Board
Change-Id: Ib585728f13a380eeeb2ada095f3e1a1c2aaf44cb
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1866
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-01-20 13:26:50 +00:00
Andrey Yurovsky 215c41c017 add support for Atmel SAMD NOR Flash
This adds a new NOR Flash driver, "at91samd", which supports the
built-in Flash on Atmel's D-series Cortex M MCUs, starting with the D20.
Parts and their geometry are detected automatically using the DSU and
lookup schemes described in the D20 document, 42129F–SAM–10/2013.
Future D-series variants and families should presumably use this
controller as well (possibly with minor changes and improvements).

Tested on the SAMD20 Xplained Pro board, for which we also add the
corresponding Flash configuration.

Change-Id: Id8d3dd601e9f53121682d1a1190d0be4ea3b83eb
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1684
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-09 15:23:27 +00:00
Andrey Yurovsky 9cabe333e1 add support for Atmel SAM4L NOR Flash
This adds a new NOR Flash driver, "at91sam4l", which supports the
built-in Flash on Atmel's low-power SAM4L family of Cortex M4 MCUs.
Parts and their geometry are detected automatically using the Chip ID
and lookup schemes described in document 42023E–SAM–07/2013.

Tested on AT91SAM4LC4CA via the SAM4L XPlained Pro development kit.

Change-Id: If73499dee92cc8ce231845244ea25c6984f6cecd
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1639
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-09 15:23:15 +00:00
Spencer Oliver 67f664a068 cfg: add initial Atmel xplained kit support
These kits feature a CMSIS-DAP compliant debugger and so have been added
as part of the pending support.

Currently the flash drivers for the L8 and D20 are wip.

One issue this implementation of CMSIS-DAP raised is that it supports
512byte HID reports, however using the current HIDAPI we have no cross platform
way of querying this info. Long term we plan to add this support to HIDAPI.

Change-Id: Ie8b7c871f58a099d963cd71a9f8a0105a38784e9
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1625
Tested-by: jenkins
2014-01-09 15:22:56 +00:00
Spencer Oliver acc4bb83fd cfg: add stm32 cmsis-dap compliant config
Change-Id: I3cfb21fdcef830e22b03bf4b5d58993728cc7475
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1543
Tested-by: jenkins
2014-01-09 15:22:42 +00:00
Spencer Oliver 4dc8cd201c cmsis-dap: add initial cmsis-dap support
This is based on work from:
https://github.com/TheShed/OpenOCD-CMSIS-DAP/tree/cmsis-dap

Main changes include moving over to using HIDAPI rather than libusb-1.0
and cleaning up to merge into master. Support for reset using srst has
also been added.

It has been tested on all the mbed boards as well as the Freedom board
from Freescale. These boards only implement SWD mode, however JTAG mode
has been tested with a Keil ULINK2 and a stm32 target - but requires a lot
more work.

Change-Id: I96d5ee1993bc9c0526219ab754c5aad3b55d812d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1542
Tested-by: jenkins
2014-01-09 15:20:51 +00:00
Paul Fertser 302a3a8fed tcl/board: add Linksys WRT54GL v1.1 board config
Tested flashing a real v1.1 device.

Change-Id: Ie0d202b9fded8b92e731d93e0ef17be415a75fc8
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1852
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-08 22:18:25 +00:00
Paul Fertser faedb14772 tcl: add bcm47xx config and Asus RT-N16 board using it
This adds the bcm47xx config with the special undocumented trick to
put it into standard EJTAG mode from the mystic "LV mode".

The RAM setup is not done as it would require considerable efforts
without much practical gain.

The only issue I noticed so far is that "reset" doesn't actually reset
the chip.

Unfortunately, it's unclear how to make it work properly with SRST as
OpenOCD asserts it in MIPS-specific code so the device will enter LV
mode again but the LV tap is already disabled by that time, so it's
not possible to send the magic command again.

Anyway, this config is more than enough to "recover" any RT-N16
provided the hardware is not damaged.

Change-Id: I0894e339763e6d20d1c93341c597382b479d039b
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1849
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-08 22:18:18 +00:00
Robert P. J. Day 58aecca7b3 Update URLs and names in amdm37x.cfg, no functional changes.
* openocd.berlios.de -> openocd.sourceforge.net
* Update link to AM/DM37x Technical Reference Manual (ver R)
* "ICEpick" is properly spelled "ICEPick" according to TI

Change-Id: Ie04458e82c97ef766ec03bd9b9f27edadf5d1cb2
Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
Reviewed-on: http://openocd.zylin.com/1856
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-08 22:17:44 +00:00
Alex Murray 6018406c78 target/imx6: Fix typo in setting _SJC_TAPID from SJC_TAPID variable
The set command was missing the $ prefix on the SJC_TAPID variable
and so would fail if SJC_TAPID was set

Change-Id: Ib9af58f5188bd8a2bc3f888309f203d624476c27
Signed-off-by: Alex Murray <alex.murray@cohdawireless.com>
Reviewed-on: http://openocd.zylin.com/1811
Tested-by: jenkins
Reviewed-by: Jens Bauer <jens@gpio.dk>
Reviewed-by: Vladimir Zapolskiy <vz@mleia.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-22 20:23:34 +00:00
Paul Fertser da7f048104 target: add kl25z HLA (stlink) config
Based on Nemuisan Tokusei's. Untested, but original config was reported
to work ok.

Change-Id: Ic991dce55bfca266880081fe2bbd9e6e263b0fc0
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1803
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-19 19:54:55 +00:00
Sergey A. Borshch 03e9729043 at91sam7sx.cfg: fix use $_TARGETNAME as target identifier, not '0' warning
all other at91 cfg files already has this fix.
It also fix "No flash at address 0x...." error when JTAG chain consist of
more than one at91sam7sx cores during attempt to flash other than first mcu
in chain.

Change-Id: I7785d9103d0fc494b6a823e2c73f850373ffe112
Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/1812
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-17 23:13:34 +00:00
Nemui Trinomius cd710ebac2 cfg: Add new BSTAPID for STM32F42xxx and STM32F43xxx series
STM32F42xxx & STM32F43xxx series boudary scan TAP-ID are differ from
STM32F405xx/07xx & STM32F415xx/17xx.
And Section number was also fixed for RM0090 rev5.
Tested on a STM32F427IIT6 and STM32F429ZIT6.

Change-Id: Ie9c54c55b97b9c396ace752d94ea2ad916cc8479
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/1808
Tested-by: jenkins
Reviewed-by: Jens Bauer <jens@gpio.dk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-17 23:07:20 +00:00
Paul Fertser 871b34cf2c tcl/target: add config for Milandr's 1986ве1т controller
This is a Cortex-M1 controller targetting aviation appliances.

Contributed (and live-tested) by 8daemon.

Change-Id: I133d6122cf6492b51ddbdbd800c16ba121d51bf3
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1818
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-14 22:05:12 +00:00
Sergio Chico 93a3a82e49 topic: Support for the Xilinx BSCAN_* Virtual JTAG in Openrisc
This add support to the Xilinx BSCAN_* virtual JTAG interface.
This is the Xilinx equivalent of the Altera sld_virtual_jtag interface,
it allows a user to connect to the debug unit through the main
FPGA JTAG connection.

Change-Id: Ia438e910650cff9cbc8f810b719fc1d5de5a8188
Signed-off-by: Sergio Chico <sergio.chico@gmail.com>
Reviewed-on: http://openocd.zylin.com/1806
Tested-by: jenkins
Reviewed-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-14 21:53:16 +00:00
Andrey Yurovsky 2d64cf92ae stm32lx_dual_bank.cfg: fix typo in file path
s/stm32l1x/stm32lx

...this makes tm32lx_dual_bank.cfg work again.

Change-Id: I04dc617523caa6b46c675fe9b700d1bbe88170e6
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1832
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-12-14 21:48:22 +00:00
Andrey Yurovsky 6accbb8baa add TI TMS570 support scripts
Add support for the TMS570 Cortex-R4 MCU from TI and their USB stick
development kit, TMDX570LS31USB.  Tested attaching, reset/halt/run, and
reading and writing memory and registers.

Change-Id: I12d779cef0c2b834f9bcf722307f35677cc4bd8f
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Reviewed-on: http://openocd.zylin.com/1788
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-11-06 13:06:41 +00:00
Paul Fertser d4e195ad1b Remove jtag_rclk from target configs
Some boards might have RCLK omitted from the JTAG connector and if the
interface claims support for it, OpenOCD will end up trying to use
RCLK while it's actually impossible.

This is a "cd tcl/target; sed -i s/jtag_rclk/adapter_khz/g *" patch.

Change-Id: Iee7337107bc1457966b104389ba9db75a9c860b4
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1695
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
2013-10-29 22:49:35 +00:00
Greg Ungerer b3a3d8312e armada370: initial support for Marvell Armada 370 family
Initial support for using the jtag interface to the Marvell Armada 370
family of SoCs.

Change-Id: Id823a567e8805ac622c3c330bc111297c1dae37e
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Reviewed-on: http://openocd.zylin.com/1690
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-21 22:16:58 +00:00
Franck Jullien 4e79b48e2c Add new target type: OpenRISC
Add support for OpenRISC target. This implementation
supports the adv_debug_sys debug unit core. The mohor
dbg_if is not supported. Support for mohor TAP core
and Altera Virtual JTAG core are also provided.

Change-Id: I3b1cfab1bbb28e497c4fca6ed1bd3a4362609b72
Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
Reviewed-on: http://openocd.zylin.com/1547
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-09-26 09:52:56 +00:00
Spencer Oliver d177ae04ff cfg: EFM32 supports SYSRESETREQ so use it
Change-Id: If52fdea025a2f9620ad4ddacfb83cbb83a94944d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1541
Tested-by: jenkins
2013-08-29 13:00:47 +00:00
Spencer Oliver ef1f2c0a3d efm32: set safe minimum working area
The smallest available RAM size for this family is 2K, set this as the
default. Issue reported by quitte on IRC.

Change-Id: I3318f7f268f7681ffe2cddab61820f4b94c4e5fd
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1559
Tested-by: jenkins
2013-08-29 12:58:49 +00:00
Brad Riensche 02826721d0 Add tcl configurations for Altera Soc devices
This commit adds two tcl configuration files, one for the Altera
Cyclone V SoC series, and one for the SoCkit development board.
The board configuration is able to halt and resume the cpu cores,
and dump register contents etc.  It has not been fully tested, however.

Change-Id: Id3f18c3408975cf986a5f5aec410b5b13240c35e
Signed-off-by: Brad Riensche <brad.riensche@gmail.com>
Reviewed-on: http://openocd.zylin.com/1494
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-15 14:50:22 +00:00
Paul Fertser fccc55225a mdr32fx: support for Milandr's MDR32Fx internal flash memory
This adds example config and flash driver for russian Cortex-M3
microcontroller model.

Run-time tested on MDR32F9Q2I evaluation board; the flash driver
should be compatible with MDR32F2x (Cortex-M0) too but I lack hardware
to test.

There're no status bits at all, the datasheets specifies some delays
for flash operations instead. All being in <100us range, they're hard
to violate with JTAG, I hope. There're also no flash identification
registers so the flash size and type has to be hardcoded into the
config.

The flashing is considerably complicated because the flash is split
into pages, and each page consists of 4 interleaved non-consecutive
"sectors" (on MDR32F9 only, MDR32F2 is single-sectored), so the
fastest way is to latch the page and sector address and then write
only the part that should go into the current page and current sector.

Performance testing results with adapter_khz 1000 and the chip running
on its default HSI 8MHz oscillator:

When working area is specified, a target helper algorithm is used:
wrote 131072 bytes from file testfile.bin in 3.698427s (34.609 KiB/s)

This can theoretically be sped up by ~1.4 times if the helper
algorithm is fed some kind of "loader instructions stream" to allow
sector-by-sector writing.

Pure JTAG implementation (when target memory area is not available)
flashes all the 128k memory in 49.5s.

Flashing "info" memory region is also implemented, but due to the
overlapping memory addresses (resulting in incorrect memory map
calculations for GDB) it can't be used at the same time, so OpenOCD
needs to be started this way: -c "set IMEMORY true" -f
target/mdr32f9q2i.cfg

It also can't be read/verified because it's not memory-mapped anywhere
ever, and OpenOCD NOR framework doesn't really allow to provide a
custom handler that would be used when verifying.

Change-Id: I80c0632da686d49856fdbf9e05d908846dd44316
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1532
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-07 21:02:51 +00:00
Paul Fertser 1f143e4391 imx6: add new id for SJC as found on i.MX6D
Austriancoder on IRC reports getting this ID on his board.

Change-Id: Ie859f0ee422e18fdb94bf817cdd2b41d15b968da
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1533
Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-08-01 10:32:34 +00:00
Marek Vasut 7ccc511088 target: Pull out the jtag_rtck from iMX5x files
Pull the jtag_rtck setting from imx51.cfg and imx53.cfg . Since
not all boards using these CPUs do support RTCK signal, move the
configuration of RTCK into board files.

Change-Id: I632c5d38e00ada8779a451cd26428fd122452001
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/1460
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-07-15 10:02:32 +00:00
Giuseppe Barba d70f86e7da stm32w: add STM32w108xx generic configuration
Add generic TCL configuration for STM STM108Wxx chips.

Change-Id: I981cdccb78833f442c3be4188c8c023064067e4e
Signed-off-by: Giuseppe Barba <giuseppe.barba@gmail.com>
Reviewed-on: http://openocd.zylin.com/1439
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-12 14:43:23 +00:00
Spencer Oliver bbc193ef8d str9: ignore boundary scan version
Ignore version of Boundary Scan TAP in newer revisions of the str9.

Change-Id: I6e205f8c731f07078c469e686025857c180f3a6d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1436
Tested-by: jenkins
2013-06-12 14:41:28 +00:00
Hsiangkai Wang cf8a3c3d70 nds32: add new target type nds32_v2, nds32_v3, nds32_v3m
Add target code for Andes targets.

Change-Id: Ibf0e1b61b06127ca7d9ed502d98d7e2aeebbbe82
Signed-off-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-on: http://openocd.zylin.com/1259
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-06-05 19:27:35 +00:00
Paul Fertser 2aada5b8d9 targets: fix target_type name for Cortex-A targets
Commit d9ba56c295 did a bunch of
renaming of cortex_a8 to cortex_a, including the names in config
files. However that introduced a regression as the name in target_type
struct remained unchanged.

This adds the last missing bit: actual renaming of the target name as
understood by OpenOCD.

Also change the (hopefully) last instance of using it in the supplied
config files, namely from imx6.cfg.

Change-Id: Ib9289fc6d946630133ec6e36c20015ccb50acf61
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1420
Tested-by: jenkins
Reviewed-by: Chris Johns <chrisj@rtems.org>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-28 08:48:45 +00:00
Paul Fertser 49af0788e9 stm32 configs: use 4kB working area size by default
This is needed for configs that might be used with the cheapest
STM32F100 parts that have only 4kB SRAM.

Restrictions for the other STM32 families are verified to be set
appropriately.

Change-Id: I1ad2370435015604db9f27c1a76c153480311a28
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1378
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-05-10 14:17:56 +00:00
Spencer Oliver 3822a07ed7 cfg: remove whitespace
Change-Id: I20edbb50efc03711195102f4c6dc8bcfaf043d44
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1374
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2013-05-02 16:39:18 +00:00
Spencer Oliver 39cff815d2 cfg: ignore ICEPick jrc tap version
Due to reports of newer targets using a updated version of the ICEPick tap
rather than add another tapid we ignore the tap version.

Also see Trac 49 for details.

Change-Id: Ic78414c54af2545c817e1bb2c860970c1b587259
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1373
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
2013-05-02 16:38:48 +00:00
Spencer Oliver d9ba56c295 target: rename cortex_a8 to cortex_a
Rename cortex_a8 target to use a more correct cortex_a name.
This also adds a deprecated_name var so that older scripts issue a warning
to update the target name.

cfg files have also been updated to the new target name.

Change-Id: I0eb1429c9281321efeb444b27a662a941a2ab67f
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1130
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28 08:56:04 +00:00