the new Marvell PXA270M processor has a new TAPID: 0x89265013.
Attached you will find a patch for target/pxa270.cfg that will handle this.
I have also attached a board/colibri.cfg file to support the Colibri
PXA270 module by Toradex.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This new cmd adds the ability to choose the Cortex-M3
reset method used.
It defaults to using SRST for reset if available otherwise
it falls back to using NVIC VECTRESET. This is known to work
on all cores.
Move any luminary specific reset handling to the stellaris cfg file.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
- Update all Luminary config's to use a common target/stellaris.cfg.
- Add Luminary ek-lm3s6965 config.
- Increase working area for boards with more ram.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Using the bundled JTAG/SWD debug support in JTAG mode
is optional on *all* of the EK boards.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
These don't need to use the on-board debuggers in JTAG mode.
Off-board is OK, as would be SWD mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Clear the enable bits for all clocks that are not set explicitly.
This is done to increase robustness by removing pre-existing
state.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
The PLL pre- and postdividers seem to have enable bits, although
these are not mentioned in the chip documentation.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
ocd_ prefix is used internally in OpenOCD as a kludge more
or less to deal with the two kinds of commands that OpenOCD
has.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
The strange thing here with this board is that 16MHz kinda
works, but only 2MHz is really stable.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
This patch adds support for the omapl138 target and preliminary support for the da850evm. The
target cfg file is based on the icepick routing done by the target/ti_dm6446.cfg file.
I have performed limited testing with this setup. I am posting this patch in the interest of
sharing cfg files and in the hopes that the experts on this list can correct errors I have made or
point out enhancements.
The testing I have performed is debugging uboot with gdb where I also use the following local.cfg
and gdbinit files. Debugging appears to work in so much as 'ni' works.
local.cfg:
gdb_memory_map disable
gdbinit:
target remote localhost:3333
set remote hardware-breakpoint-limit 2
set remote hardware-watchpoint-limit 2
monitor poll on
Comments welcome.
Best Regards,
Ben Gardiner
Clarify that ICDI is the generic logic, but this config is
for the JTAG-only (no-SWD) mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
srst_pulls_trst is only true on some (broken) LPC2148 boards, a fact
which is already documented in doc/openocd.texi, so it shouldn't be
set unconditionally in the target tcl.
This patch was needed to reflash when an Abort exception occured very
early after reset, before OpenOCD tried to halt the CPU.
This adds a nand driver support for the nuc910 target.
Note that ECC is not currently supported by this driver, although
it is supported by the peripheral.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
There's no point in an lm3s811-specific target file,
so remove it in favor of the generic "stellaris.cfg".
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Added a function 'pll_v03_setup' to set up PLLs and clock
dividers on DM365 and DM368.
Signed-off-by: Thomas Koeller <thomas.koeller@baslerweb.com>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Here is a patch to fix a startup in C100 (arm1136). Basically make sure
that UART is configured before using it.
Michal
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
It might be possible to get this target going without
RCLK, but it would require more careful analysis and
usage of the reset events.
Enable fast memory accesses.
Tested on an at91sam9260 custom board w/external DRAM
and flash.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
- As this is a complete unit, including jtag we might as welli nclude
the jtag cfg.
- Add missing id for the str750 that is also in the jtag chain.
- Reduce jtag startup speed to 500kHz.
Signed-off-by: Spencer Oliver <ntfreak@users.sourceforge.net>
Register name fix; ref. TI document sprueh7d
Signed-off-by: Jon Povey <jon.povey@racelogic.co.uk>
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
I was finally able to figure out the cause of this problem. There are two
parts to the patch. The first patch modifies the configuration file I
originally generated for the Atmel AT91SAM9G20 board and achieves the
following:
+++ Splits the reset-init handler into a reset-start handler for some of the
initial configuration activities and keeps the remainder in the reset-init
handler as was the case before. This was the real issue that was causing
the timing problems I identified before. This solution was confirmed with
an o-scope on actual target hardware.
+++ Adds a new instruction in the reset-start handler to disable fast memory
accesses in the reset-start handler. When the target jtag clock is started
out at 2 kHz during system clock initialization, memory writes (i.e.
register write to enable external reset pin -- basically to RSTC_MR) are
naturally slow and cause GDB keep-alive issues (refer to PATCH 2/2 for
additional fixes).
+++ Modifies the configuration file to use srst_only reset action. The
reset-start/reset-init handler split also now allows the correct behavior to
be used in the configuration file (previously had to use both SRST and TRST
even though only SRST is actually used and connected on the evaluation
board).
+++ Adds external NandFlash configuration support to take advantage of flash
driver added earlier. Doesn't fix any bugs but adds functionality that was
marked as TBD before and thrown in when I did other work on the
configuration file.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
gdb-attach does a reset init to make sure that the CFI probe
will succeed upon first gdb connect.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Øyvind Harboe
Karl Kurbjun
Takács Áron
Spencer Oliver
David Brownell
Oleksandr Tymoshenko
David Brownell
Piotr Esden-Tempski
Thomas Koeller
Ben Gardiner
Peter Stuge
Olaf Lüke
michal smulski
Freddie Chopin
Jon Povey
Gary Carlson
Marc Pignat