ARMv7-A doesn't need to duplicate all the standard ARM code
for register handling.
- Switch Cortex-A8 to use the standard register code
- Remove duplicated infrastructure from ARMv7-A
- Have ARMv7-A arch_state() show CPSR, like other ARMs
Add comments to show where the Cortex-A8 isn't actually doing
the right thing for register reads/writes, unless core happens
to be in the right mode to start with. (Looks like maybe there
may be generic confusion between saved/current PSR values in all
the ARM code ...)
Make related ARMv7-A and Cortex-A8 symbols properly static.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Teach the "armv4_5" register code to understand about the
secure monitor mode:
- Add the other three shadowed registers to the arrays
- Support another internal mode number (sigh) in mappings
- Catch malloc/calloc failures building that register cache
This should kick in for Cortex-A8 and ARM1176.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
It's used to flag cores with the "TrustZone" extension,
and is used in subsequent patches to set up support for
the registers shadowed by its new secure monitor mode.
The ARM1176 and Cortex-A8 both support this new mode.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The previous changes to move the startup TCL code resulted in segfaults
during startup. This seemingly innocuous patch fixes the problem.
I would explain why changing from 'foo[]' to '*foo' caused this issue,
but the difference seems superficial. For now, this hot fix will do,
but this issue might bear further scrutiny.
Moves definitions for each layer into their own file, eliminating
layering violations in the built-in TCL code. Updates src/Makefile.am
rules to include all files in the final startup.tcl input file, and
others Makefile.am rules to distribute the new files in our packages.
The recent migration broke them, the fixes broken them in a new way,
but this should restore them to working order. Eliminates the
temporary variable, as the CMD_NAME macro can once again be use
in routines that increment CMD_ARGV without nasty side-effects.
Also, this is on the path to increasing the word size for
bit vectors from 8 to something wider(32? natural host machine
width?)
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Add a new is_arm_mode() predicate, and use it to replace almost
all calls to current armv4_5_mode_to_number().
Eventually those internal mode numbers should vanish... along
with their siblings in the armv7a.c file.
Remove a handful of superfluous checks ... e.g. the mode number
was just initialized, or (debug entry methods) already validated.
Move one of the macros using internal mode numbers into the only
file which uses that macro. Make the tables manipulated with
those numbers be read-only and, where possible, static so they're
not confused with part of the generic ARM interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add and use arm_mode_name() to map from PSR bits to user
meaningful names. It uses a new table which, later, can
be used to hold other mode-coupled data.
Add definitions for the "Secure Monitor" mode, as seen on
some ARM11 cores (like ARM1176) and on Cortex-A8. The
previous mode name scheme didn't understand that mode.
Remove the old mechanism ... there were two copies, caused
by Cortex-A8 needing to add "Secure Monitor" mode support.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
All ARM cores need to provide obsolete FPA registers in their
GDB register dumps. (Even though cores with floating point
support now generally use some version of VFP...)
Clean up that support a bit by sharing the same dummy registers,
and removing the duplicate copies. Eventually we shouldn't need
to export those dummies.
(This makes the ARMv7-M support include the armv4_5 header, and
cleans up related #includes, but doesn't yet use anything from
there except those dummies.)
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Add --disable-doxygen-html and --enable-doxygen-pdf options to the
configure script, allowing user to change the defaults. These
update the proess of munging the Doxygen configuration file to
use the settings thusly provided. Add options in README.
A single PDF file for the developer manual allows accessing a single
index, browsing, and searching. It takes significantly more time to
build this way, but this patch allows others to look at the results.
Migration Tip: If you have previously built the HTML Doxygen
documentatation, rename your 'doxygen' directory to 'doxygen/html'
to prevent needlessly rebuilding those files.
Adds the command_invocation structure to encapsulate parameters for
all COMMAND_HANDLER routines. Rather than passing several arguments
to each successive subroutine, a single pointer may be passed around.
Changes the CMD_* macros to reference the new fields.
Updates run_command to create an instance and pass it to the handler.
Add additional macros to allow command handling to be migrated easily:
CMD_CTX, CMD_ARGC, and CMD_ARGV. Updates CMD_NAME to use CMD_ARGV.
In addition to making the remaining patches of this series cleaner,
this introduces easily sed-able symbols that could allow us to retire
these once the command handler infrastructure matures (i.e. pre-1.0).
No need to indirect from registered integers to pointers.
Just stash the pointers directly in the register struct,
and don't even bother registering.
This is a small code shrink, speeds register access just
a smidgeon, and gets rid of another rude exit() path.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
The code is now much more explicit. It flushes every
N writes. For now flush every time, but tinkering with
the bridge FIFO size and how often we flush clearly
points in the direction of the Avalon write FIFO full
being the culprit.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
Shifting by more than 32 is undefined for 32 bit integers according
to the C standard. Robust solution is conditional code.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>
And move the rest of the vector_catch stuff into the C file;
it's not part of the module interface.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Also, switch integrity check over to the correct magic number,
and remove duplicate v4/v5 #define.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Have ARM11 register the "standard" ARM commands. For now, only
disassembly really works.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Rename the "armv4_5" command prefix to straight "arm" so it makes
more sense for newer cores. Add a simple compatibility script.
Make sure all the commands give the same "not an ARM" diagnostic
message (and fail properly) when called against non-ARM targets.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Fix bug noted by Øyvind: terminate the IR length autoscan when
the IR is too long, or otherwise broken.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
Use size_t instead of uint32_t when specifying file sizes. Update all
consumers up through the layers to use size_t when required. These
changes should be safe, but the higher-levels will need to be updated
further to receive the intended benefits (i.e. large file support).
Add error checking for fileio_read and file_write. Previously, all
errors were being silently ignored, so this change might cause some
problems for some people in some cases. However, it gives us the chance
to handle any errors that do occur at higher-levels, rather than burying
our heads in the sand.
Uses unsigned type to pass line numbers.
Use uint64_t to pass sleep routines their milliseconds. Updates sleep
routines to use this type and improve whitespace.
Tweak "standard" ARM disassembler diagnostics to fail if the target
is not "an ARM" (vs. not "an ARMV4/5"), so it makes more sense for
cores inheriting this as the "generic" disassembler.
Also, to use the Thumb2 entry instead of the original Thumb entry.
This makes it work better for both newer cores (which support those
added instructions) and for BL and BLX instructions on older cores.
(Those instructions are 32-bits, which requires curious state-aware
code to go through a 16-bit decode interface...)
Plus minor cleanups, notably to have fewer exit paths and to make
sure they all return failure codes.
Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
David Brownell
Zachary T Welch
Øyvind Harboe