Commit Graph

8323 Commits

Author SHA1 Message Date
Palmer Dabbelt 2ec501a8b3 Revert "double result"
This reverts commit 1b227f1f49.
2018-05-30 06:00:14 -07:00
Palmer Dabbelt 1b227f1f49 double result 2018-05-30 05:56:42 -07:00
Palmer Dabbelt f1e8dee522 Try saving the halted state when examining a target 2018-05-30 05:54:56 -07:00
Palmer Dabbelt 9b19e10f8d Don't set RTOS hartid 0 2018-05-30 05:02:05 -07:00
Palmer Dabbelt 3d8393c844 trnprintf 2018-05-30 04:55:24 -07:00
Palmer Dabbelt 6d2f17a823 Handle the qC packet 2018-05-30 04:53:54 -07:00
Palmer Dabbelt 900af90662 sntrnmp 2018-05-30 04:45:39 -07:00
Palmer Dabbelt f6d6ed85ab whoops 2018-05-30 04:44:14 -07:00
Palmer Dabbelt 9889ccb1bb Pick an arbitrary hart ID for the target 2018-05-30 04:30:57 -07:00
Palmer Dabbelt 045d5b0142 Handle qTStatus 2018-05-30 04:30:48 -07:00
Palmer Dabbelt 330b11309d debug GDB IO 2018-05-30 04:24:10 -07:00
Palmer Dabbelt 65e5116229 Revert "Print allt he GDB messages back"
This reverts commit 4fc0e7ac0d.
2018-05-30 04:23:49 -07:00
Palmer Dabbelt 7d693c6983 Revert "iwhoops"
This reverts commit d3c9ed508d.
2018-05-30 04:23:47 -07:00
Palmer Dabbelt d3c9ed508d iwhoops 2018-05-30 02:56:22 -07:00
Palmer Dabbelt 4fc0e7ac0d Print allt he GDB messages back 2018-05-30 02:53:52 -07:00
Palmer Dabbelt ec42c4300e Whoops 2018-05-30 02:25:30 -07:00
Palmer Dabbelt 47731c68d2 If we don't know which thread should be halted then just don't set one 2018-05-30 02:22:59 -07:00
Palmer Dabbelt ab5dbc6168 Print signal replies 2018-05-30 02:17:05 -07:00
Palmer Dabbelt a7e00a8e72 More debugging 2018-05-30 01:42:20 -07:00
Palmer Dabbelt fccc20ad7a More debug info 2018-05-30 01:29:15 -07:00
Palmer Dabbelt 3c00bd8ff2 Enable debug during the poll 2018-05-30 01:11:17 -07:00
Palmer Dabbelt 0be30cc58c Print a bit more when a hart is halted
I think I'm getting some "wrong hart halted" issues here.
2018-05-30 01:03:02 -07:00
Palmer Dabbelt 755bf8d558 Revert "Don't raise HALT when we're examining a target"
This reverts commit dd382bb6fb.
2018-05-30 00:59:41 -07:00
Palmer Dabbelt a2d118f8e4 Revert "Don't make callbacks from riscv_openocd_{halt,resume}"
This reverts commit fb54cc4fa5.
2018-05-30 00:33:19 -07:00
Palmer Dabbelt dd382bb6fb Don't raise HALT when we're examining a target 2018-05-30 00:29:36 -07:00
Palmer Dabbelt fb54cc4fa5 Don't make callbacks from riscv_openocd_{halt,resume}
I'm not sure why this would be an issue, but it looks like for some
reason this is causing extraneous halt messages in Eclipse.
2018-05-30 00:20:45 -07:00
Palmer Dabbelt e373719ac1 Don't halt whenever GDB attaches 2018-05-30 00:05:27 -07:00
Palmer Dabbelt 3ce353cafa Revert "Don't make callbacks from riscv_openocd_{halt,resume}"
This reverts commit 43092445df.
2018-05-30 00:05:16 -07:00
Palmer Dabbelt 43092445df Don't make callbacks from riscv_openocd_{halt,resume}
I'm not sure why this would be an issue, but it looks like for some
reason this is causing extraneous halt messages in Eclipse.
2018-05-29 23:34:56 -07:00
Palmer Dabbelt 6b85d0945c Revert "Don't raise HALT when we're examining a target"
This reverts commit b39d196489.
2018-05-29 23:27:41 -07:00
Palmer Dabbelt b39d196489 Don't raise HALT when we're examining a target 2018-05-29 23:18:23 -07:00
Palmer Dabbelt d7bb150086 Move JTAG batch printing to DEBUG_LVL_IO 2018-05-29 19:59:14 -07:00
Palmer Dabbelt 052b4e3142 Don't print verbose messages when polling
I'm not 100% sure what the right thing to do here is, but I've found
that when I'm not debugging a polling issue there's way too much
verbosity in the debug level as it currently stands.
2018-05-29 19:51:00 -07:00
Tim Newsome ab7ab8a867
Merge pull request #261 from riscv/trigger_enum
Delay trigger enumeration until it's required.
2018-05-25 11:52:10 -07:00
Tim Newsome c3ffbc66e6
Merge pull request #257 from riscv/comment
Comment riscv_set_register, register_write_direct
2018-05-22 14:39:28 -07:00
Tim Newsome b629bbeade Delay trigger enumeration until it's required.
This improves startup time, which is important when connecting to
simulators. One problem is that triggers that are set when the debugger
connects are not cleared until enumeration happens. Execution may halt
due to a trigger set by a previous debug session, which could confuse
the user. If this happens, triggers will be instantly enumerated, so it
will only happen once per session.

Change-Id: I3396f713f16980a8b74745a1672fe8b8a2d4abae
2018-05-22 13:07:25 -07:00
Tim Newsome 6875379089
Merge pull request #260 from dlrobertson/fix_segfault
Fix posible null deref in get_target_type
2018-05-22 12:00:40 -07:00
Dan Robertson 0493ff81a1
Fix posible null deref in get_target_type
A null deref occurs if riscv_deinit_target is called and the
target has not been initialized.

Change-Id: Ic34057508ed6686eb48e9fe8220110c42ba2fc5e
2018-05-22 02:57:16 +00:00
Tim Newsome 0ad060d97a Review feedback.
Change-Id: If58c011fc8d89d329d65a6c624ffb631f111cef2
2018-05-17 18:08:08 -07:00
Tim Newsome 41c42bf2df Comment riscv_set_register, register_write_direct
Fixes #241

Change-Id: Ia199f15106a0bda465d3918d052ddd4d03655031
2018-05-17 18:01:00 -07:00
Tim Newsome bb86173f37
Merge pull request #251 from riscv/from_upstream
From upstream
2018-05-17 16:47:48 -07:00
Megan Wachs 3344db3d0a
Merge pull request #255 from riscv/reset-unexpected-check
riscv: remove unexpected check during reset
2018-05-17 16:35:25 -07:00
Megan Wachs 802c3b4003
riscv: remove unexpected check during reset
I'm not sure what this check is adding, and it causes problems for implementations that take some time to report that they are halted out of reset (e.g. by executing Debug ROM).
2018-05-16 22:25:38 -07:00
Tim Newsome 712d6a5c3a Remove FSF address to satisfy checkpatch
It was giving this error:
ERROR: Do not include the paragraph about writing to the Free Software
Foundation's mailing address from the sample GPL notice. The FSF has
changed addresses in the past, and may do so again. OpenOCD already
includes a copy of the GPL.

Change-Id: Iae50c2b38f1845d826d7d631072c8c3ded8859da
2018-05-14 12:26:04 -07:00
Tim Newsome dabaf170ba blank_check_memory prototype has changed.
Just remove our nop implementation. The default behavior when this is
left NULL does the same thing.

Change-Id: I865976c694d24661941584cb0efc92fc26612316
2018-05-08 15:21:49 -07:00
Philipp Tomsich da7113e02d arm_dpm: flush both scratch registers (R0 and R1)
Neither the initial loop to clear dirty registers (which visits all
registers starting at R2 and counting upwards) nor the final explicit
flushes ensure a write-back in arm_dpm_write_dirty_registers.

This change makes sure that both our scratch registers (i.e. R0 and
R1) are written back to the target.

Change-Id: If65be4f371cd40af9a0cfa97f3730b070b92e981
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-on: http://openocd.zylin.com/4506
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08 15:21:49 -07:00
Antonio Borneo 6020301640 doc: fix several typos in openocd.texi
Mostly trivial fixes spotted by spell checker
One fix s/are/is/
No changes in the content of the document

Change-Id: Ic2d8696860c540e901e8c5190f8f1e7dce80545f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/4402
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08 15:21:49 -07:00
Faisal Shah 227f729925 ChibiOS thread states: Update thread state to label mapping
Fixed style issue.
Removed #define with list of strings, and just put the
strings in the array initialization directly.
Removed empty space at the start of line.

Change-Id: I76580be203d7d69b8c5b5440f820156543e0d5cc
Signed-off-by: Faisal Shah <faisal.shah@gmail.com>
Reviewed-on: http://openocd.zylin.com/4488
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08 15:21:49 -07:00
Bohdan Tymkiv c100832971 psoc6: Run flash algorithm asynchronously to improve performance
Existing psoc6 driver starts flash algorithm for each Flash row. This is
suboptimal from performance point of view, starting/stopping flash
algorithm for each row adds significant overhead. This change starts
flash algorithm and leaves it running asynchronously while driver
performs flash operations.

Performance gain is 170...250% depending on probe:

flash write_image img_256k.bin    | w/o this change | with this change |
----------------------------------|-----------------|------------------|
KitProg2/CMSIS-DAP, SWD @ 1 MHz   |     4 KiB/s     |     10 KiB/s     |
J-Link Ultra, SWD @ 1 MHz         |    17 KiB/s     |     31 KiB/s     |
J-Link Ultra, SWD @ 4 MHz         |    33 KiB/s     |     57 KiB/s     |

Change-Id: I5bd582584b35af67600c4d197829eb7aeeec7e3f
Signed-off-by: Bohdan Tymkiv <bhdt@cypress.com>
Reviewed-on: http://openocd.zylin.com/4472
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2018-05-08 15:21:49 -07:00
Tomas Vanek 0861923cdc flash/nor, contrib/loaders: add stm32 loaders Makefile and generated .inc
Flash loaders refactored to the new style - use generated .inc
instead of hexadecimal machine code in the flash driver source.

Change-Id: If65a2099589e210f9450819b467d67819fd841fc
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/4439
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
2018-05-08 15:21:49 -07:00