Requested in https://review.openocd.org/c/openocd/+/6964.
I'm making the change here so I have a chance to test it properly before
pushing it upstream.
A nice effect of this change is that we avoid some unnecessary polling
early on when gdb is connecting and we would poll once every time we
send gdb a qXfer packet.
Change-Id: I4bdb9f05839e8c1e01ff6dde49d6589595418095
Signed-off-by: Tim Newsome <tim@sifive.com>
Otherwise OpenOCD simply doesn't work without giving any indication why.
Change-Id: I21703fc1a0d9bed2f59da95f8a8395fe139484a4
Signed-off-by: Tim Newsome <tim@sifive.com>
* Don't read dmcontrol to set hartsel
We already know what dmcontrol should be. This addresses a long-standing
TODO. In a toy test, this reduced the number of scans by 10+%. (Most of
those are probably in poll(), so don't actually affect perceived
performance.)
Change-Id: I18e5ca391f0f5fb35f30d44dfef834e5a66aee20
Signed-off-by: Tim Newsome <tim@sifive.com>
* Make code easier to read
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Co-authored-by: Jan Matyas <50193733+JanMatCodasip@users.noreply.github.com>
It was a left-over from `-rtos riscv` and isn't used.
Change-Id: Ie7e380600cd1331c6d382f654474270efad9f127
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Hopefully this will be the final version.
Change-Id: Ib2f8cd6f613c5e0f8e8bf7a16c3edbf2d9b439b2
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
See https://github.com/riscv/riscv-opcodes/pull/139
Change-Id: I77ae5ab369e6cde26ad44d177dcae38c0fbe08ef
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
Now we get the license comment on the first line, which is required.
Change-Id: I54414db3c89ee6027e159ce9348459bc923b8595
Signed-off-by: Tim Newsome <tim@sifive.com>
Signed-off-by: Tim Newsome <tim@sifive.com>
If range's upper bound was equal to 2^64 or the range was wrapping around 0
(which is perfectly legal), writes were not performed due to riscv_addr_t
overflow.
This one doesn't have the license in there, which means now it's
acceptable to GPLv2 again.
Change-Id: I8ba27801172ffa955470d2627fa656cad282ee99
Signed-off-by: Tim Newsome <tim@sifive.com>
This gets us the new license header, which was requested upstream.
Change-Id: I992b4f3bb230edb9f281e2278dd41c712098ed4c
Signed-off-by: Tim Newsome <tim@sifive.com>
The segfault could be triggered if:
- At least one target failed to get examined (therefore does not have the
register cache set up yet),
- and "reset" TCL command was issued, which internally tries to
invalidate the register cache.
Minor cleanup: "registers_initialized" member removed from riscv_info_t
because it is not used anywhere.
Change-Id: I6288c0d4343ef6a330fb2a6b49d388e7eafa32a2
Signed-off-by: Jan Matyas <matyas@codasip.com>
In function adiv5_jim_configure() check that calloc() returns a
valid allocated memory pointer.
Change-Id: I97287e168834693900341add9d9eb9a5f38c55b4
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/7014
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
The array is partially initialized with buf_set_u32(,5,32,), then
the rest of the array is read from SWD.
But scan-build report the array to have garbage content after the
initialization, due to the offset of 5 bit that only inits part of
the first byte.
Silence the false positive from scan-build by initializing the
array.
Change-Id: Ic38d50280f67939e3ec5fa05741f66d5f993f8c2
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7013
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
While scan-build complains that dap_p or ap_num_p could be NULL,
the current code never passes NULL pointers.
Add an assert() to silent scan-build and prevent any further use
of the function with incorrect parameters.
Change-Id: I656810dddcea61e85d85b13efb114f7607ef837c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7012
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Commit d01b3d69ec ("arm_adi_v5: separate ROM table parsing from
command output [3/3]") introduces a new scan-build warning because
removing one return in case of error causes using uninitialized
values.
Add back the return on error.
Change-Id: I10ddc548b756d34aaccc0511f091b4caa5ec271a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: d01b3d69ec ("arm_adi_v5: separate ROM table parsing from command output [3/3]")
Reviewed-on: https://review.openocd.org/c/openocd/+/7011
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Commit 21f7885d1c ("arm_adi_v5: separate ROM table parsing from
command output [1/3]") introduces a new scan-build warning because
continues the execution even when dap_get_debugbase() returns
error. The value of 'apid' can be uninitialized:
5th function call argument is an uninitialized value
Check the return value and quit on error.
While there, remove the useless initialization of 'dbgbase' that
was apparently required for the same problem.
Change-Id: Iade26a152925ee0f1bf114ed829b94f7ed5b254f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 21f7885d1c ("arm_adi_v5: separate ROM table parsing from command output [1/3]")
Reviewed-on: https://review.openocd.org/c/openocd/+/7010
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
target_to_armv7m() just returns a type-cast of target->arch_info,
so the test has no value.
Following target_run_algorithm() checks magic number so
we need not worry about execution on mismatched architecture.
Change-Id: Ic9892a488a42af1d8e8731eddb39240deeb26020
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6755
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Error: Uninitialised value was created by a heap allocation
at telnet_new_connection (telnet_server.c:227)
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I698a3648be698c93a2395a718ee1ade028226995
Reviewed-on: https://review.openocd.org/c/openocd/+/7006
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
fix "Declared variable-length array (VLA) has zero size" warnings
while at there instrument the probe function to ensure the flash bank
contains at least 1 sector
Change-Id: I3ba0e6345881557ad1aab2d1b41eee438b49fe04
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6470
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
ESP32-S2 is a single core Xtensa chip.
Not full featured yet. Some of the missing functionality:
-Semihosting
-Flash breakpoints
-Flash loader
-Apptrace
-FreeRTOS
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I2fb32978e801af5aa21616c581691406ad7cd6bb
Reviewed-on: https://review.openocd.org/c/openocd/+/6940
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
when using semi-hosting with cortex_a this LOG_INFO pollutes openocd
console, so just reduce the log level of this message.
Change-Id: I91aa70492f4e361b25a0e5517d0cf73f2f8ed599
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://gerrit.st.com/c/stm32ide/official/openocd/+/248225
Tested-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@st.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6993
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The command 'flash erase_check' showed the message
'Running slow fallback erase check - add working memory'
even in the case the target didn't implement blank_check_memory.
Change return code of target_blank_check_memory() in this case
and sense it in default_flash_blank_check() and show a message
without a request for working memory.
Change-Id: I7cf9bf77742964b4f377c9ce48ca689e57d0882f
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: https://review.openocd.org/c/openocd/+/6765
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
This helps e.g. if there are 8 cores, and cores 0--3 are in one SMP
group while 4--7 are in another group. (And there are 2 gdb instances
connected, one debugging the first group, and one the second.)
Signed-off-by: Tim Newsome <tim@sifive.com>
Change-Id: I7b6c9382eadf964529105eaf0411a42d48768668
Reviewed-on: https://review.openocd.org/c/openocd/+/6979
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This commit is adapted from [1].
[1] https://review.openocd.org/c/openocd/+/4999
Signed-off-by: Michael Walle <michael.walle@kontron.com>
Signed-off-by: Heiko Thiery <heiko.thiery@kontron.com>
[ adapted to use common configuration ]
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I9a428371694e7864e03055b8de18a55a7843b8c2
Reviewed-on: https://review.openocd.org/c/openocd/+/6977
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
The LS1028A is similar to the LS1088A, except that it has 2 CPUs (and
different ethernet capabilities). From a JTAG perspective, all that's
different is the number of CPUs and the TAPID.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: Iba3a0ecfbf82cfcfeb7eea42d52121c3b9dc93a2
Reviewed-on: https://review.openocd.org/c/openocd/+/6976
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Several Layerscape processors (LS1088A, LS2088A, LS2160A, and LS1028A)
share a common architecture. Break out the common setup from the LS1088
config in preparation for adding the LS1028A. There's no official name
for this series of processors, but NXP refers to them as "chassis
generation 3" in U-Boot, so we'll go with that too.
Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: Ic6f89f95c678101f54579bcaa5d79c5b67ddf50a
Reviewed-on: https://review.openocd.org/c/openocd/+/6975
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
* Update debug_defines from the spec.
Now it includes constants for field values, so use them instead of
duplicating that here.
Change-Id: I2fca6e89f25123c39d4bf483b8244e47aefb0f88
* Remove unused #defines
Change-Id: Id20351851c9ed2c3aa82ccf8c04b604bef11692a
* Use debug spec constants in a few more places
Change-Id: Ic4578729c89e3c6a26a72772e1635c5345bd6a52
Signed-off-by: Tim Newsome <tim@sifive.com>
* Use macros for trigger action types.
Which were added with the very latest debug_defines.h.
Change-Id: I47f73e11d2ec529c720f2e1df05f7b0d3026e43a
Signed-off-by: Tim Newsome <tim@sifive.com>
This command allows users to set base working directory for the
semihosting I/O operations.Default is the current OpenOCD directory.
Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I80c5979e4c96d66cccdd12cc6fcd5f353e5c6b4d
Reviewed-on: https://review.openocd.org/c/openocd/+/6888
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Added support for the new Renesas RISC-V
device: RZ/Five
Signed-off-by: micbis <michele.bisogno.ct@renesas.com>
Change-Id: Id8ba29b83528c0bfe4f9b4ed21b0151a6e853bd7
Reviewed-on: https://review.openocd.org/c/openocd/+/6974
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins