output for flash page writes
The offset wasn't being considered in the "full page" write codepath, so any
writes at an offset were actually written out starting from page 0.
Change-Id: I5e70a1f35f144b3edd1ce6d9df9af9b5da6cf194
Signed-off-by: Angus Gratton <gus@projectgus.com>
Reviewed-on: http://openocd.zylin.com/1965
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Nucleo F401 board uses STM32F401RE chip with new device id and
got more flash than existing devices (512K). This patch adds
new the identifier to probe functions so flashing will now work.
Change-Id: Ibe9c047c79244db0cfbb06610da9d84987b9f85a
Signed-off-by: Jens Hoffmann <jehoffma@gmail.com>
Reviewed-on: http://openocd.zylin.com/2037
Tested-by: jenkins
Reviewed-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Additional information string appended to the 'flash info' output used
incorrect offsets and was missing a couple of fields.
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Change-Id: If131be021295cab6adfca7da03c2f0fb8dca7d42
Reviewed-on: http://openocd.zylin.com/2011
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
flash: at91sam4: add support for the SAMG53 family (this also covers the
SAMG51). The SAMG5x parts have an EEFC (enhanced embedded flash controller)
which seems to be identical to the EFC that the sam4 driver supports.
Add a script for the Xplained Pro G53 board, this has the onboard CMSIS-DAP
debugger and a SAMG53N19. Tested on this board and chip combination.
Change-Id: I12af50402cd2069b3c7380d92e6fe54816d6c045
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1974
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This fix can "erase flash" on using High Level Adapters by running algorithm.
Because fm3 flash commands must need true 16-bit memory access,
but High Level Adapters(ST-Link/TI-ICDI) can 8/32bit access only.
Tested on MB9BF618T and MB9AF112K with STLink/V2.
Change-Id: I849a8a8e8ae2b3e77717de04f7522cf718c915d7
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/1944
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add support for EFM32 Wonder Gecko family to flash driver.
This family has Cortex M4F core.
Change-Id: If71511015403069e3e30cb9f19df12cd97ac49e8
Signed-off-by: Joerg Fischer <turboj@gmx.de>
Reviewed-on: http://openocd.zylin.com/1968
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Added configuration to work with stm32f07x.
Tested on stm32f072discovery with libopencm3 stm32f0 blink example.
Change-Id: I63cdc9bf1f28f5951d6b4faac871cfde331c9c78
Signed-off-by: Kuldeep Singh Dhaka <kuldeepdhaka9@gmail.com>
Reviewed-on: http://openocd.zylin.com/1921
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Caught by clang on OS X. Reported by Steffanx on IRC.
Change-Id: Id77c7297c58e58c4e2aa8e5dafcb3a29a1f33f3d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1879
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Kinetis K-series have different guranuarity for each frequency model.
This patch adding more minute guranuarity detection.
And adopted mass erase command not only L-series but also K-series.
Tested on MK20DX32VLF5,MK10DX32VLF5,and MKL25Z128VLK4.
Change-Id: Iffef850d4b388463756a13faf02c3890bfc19acf
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/1894
Tested-by: jenkins
Reviewed-by: Per Ekman <pekenator@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Mateusz Kaduk <mateusz.kaduk@gmail.com>
Make the chip information lookup tables const (thanks to Spencer Oliver for
pointing this out). Also fix spacing on one macro. No functional changes.
Change-Id: I053c4951c2626b8aa4541a79673b500394ef08e8
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1874
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested with SAMD21J18A on the SAMD21 Xplained Pro board.
Change-Id: Ice9ebcd229ed038b3193baf92d910f9256d7ce91
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1873
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
IAP commands fail on programming LPC810 because it has only 1kByte of SRAM.
This patch is fixing cmd51_max_buffer suitable size for LPC810,LPC811 and
other LPC1000 series.
Tested on a LPC810,LPC812,LPC11u14,and LPC1114(DIP28).
Change-Id: Iecec9fd963cb63bdff4a7bd3bbf4f8b1a7c60fbd
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/1843
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds a new NOR Flash driver, "at91samd", which supports the
built-in Flash on Atmel's D-series Cortex M MCUs, starting with the D20.
Parts and their geometry are detected automatically using the DSU and
lookup schemes described in the D20 document, 42129F–SAM–10/2013.
Future D-series variants and families should presumably use this
controller as well (possibly with minor changes and improvements).
Tested on the SAMD20 Xplained Pro board, for which we also add the
corresponding Flash configuration.
Change-Id: Id8d3dd601e9f53121682d1a1190d0be4ea3b83eb
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1684
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds a new NOR Flash driver, "at91sam4l", which supports the
built-in Flash on Atmel's low-power SAM4L family of Cortex M4 MCUs.
Parts and their geometry are detected automatically using the Chip ID
and lookup schemes described in document 42023E–SAM–07/2013.
Tested on AT91SAM4LC4CA via the SAM4L XPlained Pro development kit.
Change-Id: If73499dee92cc8ce231845244ea25c6984f6cecd
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1639
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
S25FL256S device tested on mbest LPC4357 EVM, S25S128S untested but
from the same data sheet.
Change-Id: Idf58416aab08671fe29d22c3c34c2118b25a9d45
Signed-off-by: Steve Moorby <steve.moorby60@gmail.com>
Reviewed-on: http://openocd.zylin.com/1844
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Try to detect the flash parameters based on the MCU SDID register. The hope
is that this works for K and KL series MCUs but it has only been tested on
a K21. YMMV.
Change-Id: Idfe71383a449065267f393b09ee3c3b24ac6a803
Signed-off-by: Per Ekman <pekenator@gmail.com>
Reviewed-on: http://openocd.zylin.com/1823
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
get_flash_bank_by_addr() iterates through all flash banks
trying to auto_probe() every bank, even if bank can belongs to
target other than requested, and this other target can be
in non-halted state, which leads to error message and
operation abort.
Same situation in gdb_new_connection() and gdb_memory_map():
get_flash_bank_by_num() tries to auto_probe() requested bank,
so first get bank by get_flash_bank_by_num_noprobe(), check
if it belongs to current connection's target and skip
get_flash_bank_by_num() (actually autoprobing) if not.
Change-Id: I48b3f93dddcd9283394f14ad2de3248397c75ab3
Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Reviewed-on: http://openocd.zylin.com/1813
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Commit 2493671e2d added a default flash
padded value to the wrong file, should have been stm32lx.c not stm32f1x.c.
Change-Id: Idab634a03ccb28609cc977a92ac2b138d1e8d859
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1833
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
The current way of detecting the sector size of the internal
flash does not work for all Kinetis MCUs. Add support for the
K21 flash by detecting the specific model from the SDID register
and picking the correct sector size based on that.
Change-Id: I41f678353e45a44561af8a3398bdd4479dfeea4f
Signed-off-by: Per Ekman <pekenator@gmail.com>
Reviewed-on: http://openocd.zylin.com/1764
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The default_flash_read() function seems to work ok.
Change-Id: Ia34c4642405f669ff63310fa8c641098b771a401
Signed-off-by: Per Ekman <pekenator@gmail.com>
Reviewed-on: http://openocd.zylin.com/1763
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Attempt to use target_buffer_set_u32_array to convert to target endian
arrays rather reimplementing code.
This also removed cfi_fix_code_endian as its functionality is also
repeated.
Change-Id: I7c359dbe46ea791cd5f6fb18d8b0fb6895c599d3
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1783
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Add device ID 0x437, a dual-bank part with 512KB total. This one used
the Medium+/HD flash size register to read the flash size in Kb rather
than the 0/1 code in the Medium+ parts.
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Change-Id: I870fe3bb1b473939b7211c3b2edb44b4b3643648
Reviewed-on: http://openocd.zylin.com/1790
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Some MB9Ax (especially few internal SRAM model) fails programming
because of wrong SRAM basic-address on running algorithm.
Default SRAM basic-address must be 0x20000000.
This patch is fixing default SRAM basic-address and ramcode offset.
Tested on a MB9BF618T and MB9AF112K.
Change-Id: Ibda9aceb4c317bcae0dcce9f6d0fd1c4b5d81952
Signed-off-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-on: http://openocd.zylin.com/1793
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Found by grepping for pointer casts.
Change-Id: I42ef3ebcce9fc6391154888b48601ede8377c34e
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1771
Tested-by: jenkins
Reviewed-by: Jens Bauer <jens@gpio.dk>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Found by grepping for pointer casts.
Change-Id: Ie2d698310b077c3849266e81df8e6a808cbc6896
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1775
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Found by grepping for pointer casts.
Change-Id: I56d5680590e37d8c61197488067fbb0776e5e0f0
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1774
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Found by grepping for pointer casts.
Change-Id: Ibd8f22a9e9ca71459ba0bedc8447a3623d0e4184
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1773
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Found by grepping for pointer casts.
Change-Id: If73184a16904ec2958e7253ba98f44479fdcad3f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1772
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Found by grepping for pointer casts.
Change-Id: Ib94957a0c53ec7abcbd5787d8c70e20c9eedc4b7
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1770
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Found by grepping for pointer casts.
Change-Id: I00e000515cb2573130b73423eb19ba941f524b05
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1769
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Probably shouldn't depend on that anyway.
Change-Id: Ic27ead4cb82cff1ab187696439da4b93941e09d8
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1766
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
When pointer casts are needed, cast directly to the correct type, instead
of going via void*.
Don't explicitly cast to void* if it would have been done implicitly.
Change-Id: I4093209200051c5eb62847d00a4b9c8567480068
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1669
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This eliminates most of the warnings reported when building for
arm-none-eabi (newlib).
Hsiangkai, there're many similar warnings left in your nds32 files, I
didn't have the nerve to clean them all, probably you could pick it
up.
Change-Id: Id3bbe2ed2e3f1396290e55bea4c45068165a4810
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1674
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The code didn't address the case where diva is bigger than 1.
Change-Id: I15d8c47aa7b5cf80df1f29e067f30575f5d60a90
Signed-off-by: Thomas Schmid <thomas.schmid@gmail.com>
Reviewed-on: http://openocd.zylin.com/1765
Tested-by: jenkins
Reviewed-by: Mathias Küster <kesmtp@freenet.de>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
For NFC v1 (i.MX27), swapping must be done between offset 464 of Main
buffer and offset 4 of Spare buffer.
Change-Id: I09c2036e88770032da87d5846cd2094847f47b46
Signed-off-by: Gaetan Carlier <gcembed@gmail.com>
Reviewed-on: http://openocd.zylin.com/1692
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Use the preferred code path according to the comment. Target_write_buffer()
now simply uses suitably aligned target_write_memory calls, so from this
pov, they should be equivalent.
Change-Id: I77f51ec3ac9faa822cf428708a1aecb67c77830c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1687
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Remove the static const array containing ARM instructions for a
bootstrap program. Despite what the comment says, the DAP can write to
the Flash and in fact this program is not referenced anywhere in openocd
so it's a bit confusing having it in there. There should be no
functionality change from this.
Change-Id: I4ca4206f090a896628ee9b675d1f04450ada1563
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1641
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
There's no way to print two lines, so let it wrap.
Change-Id: I1f6211358a58877c0b729d9fdefd5d3dea8cba00
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1643
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The stm32l family has an erased value of 0x00, so overide the defaults used
by OpenOCD.
Change-Id: I314bdef1f8482fbcbd43e0f413247d3a35af869d
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1636
Tested-by: jenkins
This adds support for setting the default value used when padding image
sections. Previously 0xff was used but some targets have an erased value
of 0x00.
Change-Id: If3df6fea3abf95b09daa3ff7be362acf991070ce
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1635
Tested-by: jenkins
Under certain versions of cygwin it appears PAGE_SIZE is already defined.
So change name to stop any possible build issues.
Change-Id: I6f0e0c352c06bb6118ac3a5b884ae8e93194b570
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1675
Tested-by: jenkins
some members of lpc2000_info structure sometimes used uninitialized
(cmd51_can_64b for all LPC except LPC800 as example).
Init allocated lpc2000_info structure with zeros to avoid this and similar bugs in the future.
Note: maybe discarding all cmd51_can_XXXb fields and using cmd51_dst_boundary instead will be a better solution.
Signed-off-by: Sergey A. Borshch <sb-sf@users.sourceforge.net>
Change-Id: Idf116a5b0bf4ea1c39ea0ce308ec2c13bfbd4d8c
Reviewed-on: http://openocd.zylin.com/1676
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Remove lots of no-op or dummy info function implementations and check if
it's implemented before invoking it.
Change-Id: I2144dad6a84a80359bb13a8a29a4614387e4c135
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1642
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Seems NetBSD does like the name reboot, so rename to keep happy.
Change-Id: I60ada9d217c4a8386a8d1ff1c88db7335451794e
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1623
Tested-by: jenkins
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Adds a flash driver for Nuvoton MINI51, MINI52 and MINI54 microcontrollers.
At the moment, it only supports the erase and write operations.
These microcontrollers have a 4 / 8 / 16 KB APROM for application code and a
2 KB LDROM for bootloaders. When the MCU has booted off the APROM, the LDROM
isn't mapped in memory but can be programmed, and the other way around.
This means that the ARM core is typically rebooted for programming. After a
successful write or erase operation, it is rebooted again, using the initial
boot source.
This driver only supports programming the APROM.
This driver is a pure JTAG implementation, it doesn't use any SRAM.
I've tested it on a MINI54ZAN microcontroller using an ST-LINK/V2. With the
microcontroller running at the default clock frequency of 22.1184 MHz, speed
seems to be around 1.1 KB/s.
Change-Id: I180889c55af9fb5614cd99a953b755baba14288a
Signed-off-by: Cosmin Gorgovan <cosmin@linux-geek.org>
Reviewed-on: http://openocd.zylin.com/1546
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Not all devices with devce id 0x419 have dual flash banks, only those
with > 1024kB.
Change-Id: I197d2b87df7599cd0837e25648af48439f2f1e50
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1544
Tested-by: jenkins
Unfortunately the Medium+ density and 0x436 devices have their F_SIZE register
at a different location: 0x1FF800CC instead of 0x1FF8004C. Fix this for
the 0x427 Medium+ devices and also the 0x436 devices. Furthermore, for
0x436 devices the flash size is reported as a 0 or 1 code rather than
the size in Kb. Please see RM0038 r8 or newer for an explanation, as
noted in the comments.
Change-Id: Ie03b1e119a61f2a854bc2ccc5f90ce3e8852e272
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1522
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
This adds example config and flash driver for russian Cortex-M3
microcontroller model.
Run-time tested on MDR32F9Q2I evaluation board; the flash driver
should be compatible with MDR32F2x (Cortex-M0) too but I lack hardware
to test.
There're no status bits at all, the datasheets specifies some delays
for flash operations instead. All being in <100us range, they're hard
to violate with JTAG, I hope. There're also no flash identification
registers so the flash size and type has to be hardcoded into the
config.
The flashing is considerably complicated because the flash is split
into pages, and each page consists of 4 interleaved non-consecutive
"sectors" (on MDR32F9 only, MDR32F2 is single-sectored), so the
fastest way is to latch the page and sector address and then write
only the part that should go into the current page and current sector.
Performance testing results with adapter_khz 1000 and the chip running
on its default HSI 8MHz oscillator:
When working area is specified, a target helper algorithm is used:
wrote 131072 bytes from file testfile.bin in 3.698427s (34.609 KiB/s)
This can theoretically be sped up by ~1.4 times if the helper
algorithm is fed some kind of "loader instructions stream" to allow
sector-by-sector writing.
Pure JTAG implementation (when target memory area is not available)
flashes all the 128k memory in 49.5s.
Flashing "info" memory region is also implemented, but due to the
overlapping memory addresses (resulting in incorrect memory map
calculations for GDB) it can't be used at the same time, so OpenOCD
needs to be started this way: -c "set IMEMORY true" -f
target/mdr32f9q2i.cfg
It also can't be read/verified because it's not memory-mapped anywhere
ever, and OpenOCD NOR framework doesn't really allow to provide a
custom handler that would be used when verifying.
Change-Id: I80c0632da686d49856fdbf9e05d908846dd44316
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1532
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Since the driver doesn't support any hardware flash protection, it
doesn't make sense to report "protected" status after probing, as it
requires extra commands to unprotect before flashing and might be
confusing for the end-users.
Change-Id: I04d96790cc42412df5334951f39fb6723c972ced
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1525
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Add support for the new STM32F401 parts. These are similar to the
STM32F405/407 however they are a new Low Power variant with ID code
0x423 and have 256K of Flash. Tested with a modified F4 discovery
board.
Change-Id: Ida5fb14a0832934b4d6d1ec11e602df5076edbc8
Signed-off-by: Andrey Yurovsky <yurovsky@gmail.com>
Reviewed-on: http://openocd.zylin.com/1521
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Uppercase device/family names and change them to be more specific and
consistent across all STM32 families.
High-density STM32F10x has a Rev Y according to RM0008 Rev 14, so add
it.
I have a STM32F30x Rev Y, sitting on my desk, but it isn't described in
the reference manual. Add it as well.
Split the STM32L1xx Medium+ Density devices based on ID, to match the
reference manual. If I read it correctly, the Medium+ devices have
different revision mappings depending on their package/device ID. I have
no real devices to examine, however.
Change-Id: I5b95e5fa3cdeba219aa96838ea06ec1bb62bd921
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1497
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Factor out common bit masking and printing code and use intermediate
strings to avoid buffer size handling.
Change-Id: I7d8c12df11ade6cdca8c917b5524372daa498bf4
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1496
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
These chips are capable of reading the flash registers while they're
running.
Change-Id: I76b90b2bae1aa79b5a063b2073faa5d3ed93cfd7
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1495
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The device was correctly used in stm32lx_probe but missing from stm32lx_get_info.
Change-Id: If288b8df3210a945e727e4e27cfbdb948db32fc7
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1491
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
Only the support for at91sam3s8b is tested on real hardware.
Change-Id: I4ce23bc2f6131d9cf3ff1b301ab9e470d20845ab
Signed-off-by: Ulf Wetzker <ulf.wetzker@eas.iis.fraunhofer.de>
Reviewed-on: http://openocd.zylin.com/1424
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This update is untested due to missing hardware.
Change-Id: Ibe286b741ebbb1c8ae0bd3dea4b8f3e12320ab34
Signed-off-by: Ulf Wetzker <ulf.wetzker@eas.iis.fraunhofer.de>
Reviewed-on: http://openocd.zylin.com/1423
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
According to the "AT91SAM ARM-based Flash MCU SAM3S Series datasheet"
(http://www.atmel.com/Images/doc11090s.pdf) p. 30 the lock region
size for the at91sam3sd9 family is 32 kbyte.
This fix is only based on the datasheet due to missing hardware.
Change-Id: Ic47b0642e4f11a60de477eaa0167038103b8ff15
Signed-off-by: Ulf Wetzker <ulf.wetzker@eas.iis.fraunhofer.de>
Reviewed-on: http://openocd.zylin.com/1422
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
* Add Thumb-2 code to write flash memories that don't support DQ5 polling
* Make sure default values for unlock commands are set even if there is no PRI information given by the flash
* Add a fixup to disable DQ5 polling for the SST 39VF3201C
Change-Id: Ib08cf20547d0f500d5f78241521e6b49050c3d40
Signed-off-by: IS2T development team <dev.is2t@gmail.com>
Reviewed-on: http://openocd.zylin.com/1449
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Fixes regression introduced in 9785f51f that caused write outside
allocated memory during probe of devices with <1024K flash.
Reported-by: Alexander Pakhomov <ker0sin@yandex.ru>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Change-Id: Ifba8833e436064624efbf678162538fd351a5702
Reviewed-on: http://openocd.zylin.com/1450
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This will enable the user to use either name when calling flash driver cmds.
For example the stm32f3x family use the same flash driver as the stm32f1x, so
the user has to use 'stm32f1x mass_erase 0' which can be confusing.
Now the user can also use 'stm32f3x mass_erase 0' with the same result.
Change-Id: I14280674c8dfa2ce1c01e327af7f38e36150462c
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1428
Tested-by: jenkins
The following warnings prevent OpenOCD from building:
efm32.c: In function 'efm32x_read_lock_data':
efm32.c:373:8: error: cast increases required alignment of target type [-Werror=cast-align]
efm32.c:386:9: error: cast increases required alignment of target type [-Werror=cast-align]
efm32.c:394:9: error: cast increases required alignment of target type [-Werror=cast-align]
efm32.c:402:9: error: cast increases required alignment of target type [-Werror=cast-align]
efm32.c: In function 'efm32x_get_page_lock':
efm32.c:430:17: error: cast increases required alignment of target type [-Werror=cast-align]
efm32.c: In function 'efm32x_set_page_lock':
efm32.c:441:19: error: cast increases required alignment of target type [-Werror=cast-align]
cc1: all warnings being treated as errors
This patch is compile-tested only.
Change-Id: Ia3a8f342e0f5e30c8ea4de9435c5c7a80bc100e3
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/1370
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Ensure FlexRAM usage is limited to half the FlexRAM size when programming.
Assume the FlexNVM sector size is equal to half the FlexRAM.
Fix sector erase checking which had an error introduced when the
kinetis_ftfx_command( ) signature was changed.
Change-Id: I88edd9c7d4a4ba474cad7b00052feaeedfa8ced8
Signed-off-by: Christopher Kilgour <techie@whiterocker.com>
Reviewed-on: http://openocd.zylin.com/1358
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
This patch adds flash programming support for internal flash of the
LPC43x2/3/5/7 part, tested on a LPC4337 (also tested on a LPC1768
and LPC2468). It should also work with LPC1800's with onchip flash.
The "base" parameter of the "flash bank" command is now significant
for the lpc4300 variant and required to determine the bank number
parameter needed by the IAP routines.
NOTE: I could only program flash successfully when the chip is powered
with "P2_7" pulled low to put it in ISP mode. When running from flash
(and not the ISP ROM), the target fails to halt and the sector erase
fails. This is similar to the behavior I remember when trying out the
spifi driver on a LPC4350... lots of power cycles to make progress, one
To burn, one to run. So I am not confident my config is set up correctly.
Change-Id: I8a75ef1b95cedd5b5898b2dedff477f502fd19f3
Signed-off-by: Matt Dittrich <mdittrich.dev@gmail.com>
Reviewed-on: http://openocd.zylin.com/1126
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Tested-by: jenkins
The em357 driver only supported one page configuration (192k in 96 2048k)
pages. This is fine for em357 chips since that's the size they have, but
ST's STM32W chips (pretty much the same) have different flash
configurations available (64, 128, 192, 256k). I can't find anywhere
that would indicate the size of the chip anywhere in memory so the
selection must be manual, using the 'size' parameter. For backwards
compatibility, any size not known to be in use defaults to the 192k
configuration. I don't have any em357 devices to test, but I also found
that I had to re-assert the FPEC clock enable before performing an
erase. This is a single line and shouldn't break any configurations.
My testing so far has only been with a 64k device with 8k of RAM.
Change-Id: Ic0ac400a9696efaa09d1407dd4a4d456bc2c318b
Signed-off-by: Ben Nahill <bnahill@gmail.com>
Reviewed-on: http://openocd.zylin.com/1336
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
Disable polling the target before we issue a 'reset run'. This stops errors or
warnings if the target disables the SWD or JTAG interface as part of the
application code.
Change-Id: I5019dffdad41a8e210003ece1caf89069ee0f223
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1331
Tested-by: jenkins
Added support for ARMv7-M targets in arm_nandwrite and
arm_nandread.
Change-Id: Iab1d78d401f735e191c6a8519f3619035a300fae
Signed-off-by: Henrik Nilsson <henrik.nilsson@bytequest.se>
Reviewed-on: http://openocd.zylin.com/1188
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The command 'at91sam3 info' ignores PLLA DIV values >1. This patch fixes it.
Tested on a SAM3S4C chip.
Change-Id: I051f41bb3dcefe1ac785fbcb48477a807daa16a2
Signed-off-by: Thomas Schmid <thomas.schmid@gmail.com>
Reviewed-on: http://openocd.zylin.com/1307
Tested-by: jenkins
Reviewed-by: Peter Stuge <peter@stuge.se>
The only caller was arm_nandwrite(). Replace that call with
target_write_buffer() instead, which in turn may end up calling the same
bulk_write_memory target API function.
Change-Id: If34c7474df5cf14af3b732fb4774816818f28e79
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1214
Tested-by: jenkins
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
The kinetis datasheets specify the flash registers as bytes rather
than as words, as the previous implementation did. This also makes
a few code sections slightly less endian-magical.
Change-Id: If8f4adfc7f4341085ae5b6eacbf7d74bbd74cf08
Signed-off-by: Alex Austin <alex.austin@spectrumdsi.com>
Reviewed-on: http://openocd.zylin.com/1192
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
This adds a program proc that simplifies using OpenOCD as a standalone
programmer.
Change-Id: I6ece492cd878c170b734e8bb2e09fe8c4557d5a6
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1199
Tested-by: jenkins
Reviewed-by: Jörg Fischer <turboj@gmx.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
This fixes an issue if the device is manually probed after the initial probe
fails due to being unable to read flash size register. In this situation the
driver assumes the user has overridden the flash size when infact this may
not be the case.
It also seems on the older stm32f1 devices the flash register is not readable
when locked, this does not seem to apply to the newer parts - f0, f3, f4.
Change-Id: I125f872fcb2d962ca6705f97b62d957e2b31303b
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1187
Tested-by: jenkins
Reviewed-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
The stm32f0 and stm32f3 share the same option byte location, but the format
differs.
Adding an option_offset fixes the broken options_read cmd and incorrectly
setting Hardware Watchdog when unlocking a f3x device.
Change-Id: I82d66b6198294ea9eedb44ca8b2fb368c0cb15e8
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/1184
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Added support for new ST devices in the stm32lx portfolio, with device
id 0x427. These have 256k flash, but in a single bank compared to
device id 0x436 which is a dual bank flash.
Change-Id: Iafdfe990f24bd04b0d6e00385ee70690f3bf8d5f
Signed-off-by: Johan Almquist <johan.almquist@assaabloy.com>
Reviewed-on: http://openocd.zylin.com/1140
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Angus Gratton
Andreas Fritiofson
Paul Fertser
Jens Hoffmann
Andrey Smirnov
Andrey Yurovsky
Nemui Trinomius
Joerg Fischer
Kuldeep Singh Dhaka
Spencer Oliver
Steve Moorby
Per Ekman
Ed Maste
Sergey A. Borshch
Thomas Schmid
Gaëtan Carlier
John David Anglin
Petri Laakso
Cosmin Gorgovan
Ulf Wetzker
IS2T
Antonio Borneo
Christopher Kilgour
Freddie Chopin
Matt Dittrich
Ben Nahill
Peter Dietzsch
Henrik Nilsson
Alex Austin
Johan Almquist