Commit Graph

9288 Commits

Author SHA1 Message Date
Antonio Borneo 122f36ed7b arm_adi_v5: add arm Neoverse N2 part numbers
Change-Id: Ib7a8c9d460f12762f6d106e9331e84b6d2dec213
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6453
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-09-25 13:11:23 +00:00
Kevin Burke a931c99f5b arm_adi_v5: add arm Neoverse N1 part numbers
Split from change https://review.openocd.org/6077/

Change-Id: I5e3d3736beb741de3940ea6e23b0ccbf47e8dec7
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6452
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-09-25 13:11:10 +00:00
Antonio Borneo 8f73bd3d48 arm_adi_v5: add arm Cortex-R52 part numbers
Extract new part numbers from Arm Cortex-R52 Processor Technical
Reference Manual Revision r1p3 and add them to the array
dap_partnums.

Change-Id: I8020f36de587951af60422ef33d7e438dc7d9d53
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6451
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-09-25 13:07:41 +00:00
Antonio Borneo c55fbe190b arm_adi_v5: add arm SoC-600 part numbers
Extract new part numbers from ARM CoreSight System-on-Chip SoC-600
Technical Reference Manual Revision r4p1 and add them to the array
dap_partnums.

Change-Id: I88d8aa3c084f6e832b75032e75bfb6d377a08360
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6450
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-09-25 13:06:53 +00:00
Antonio Borneo 02b5fa5103 arm_adi_v5: add helper to search for part number
Improve code readability and prepare to re-use the helper.

Change-Id: Iee5e01047c82be3dd86707f5c283f0b20cc4070d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6449
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-09-25 13:06:01 +00:00
Kevin Burke cf6909a57c arm_adi_v5: move in a separate function devtype decode/display
For readability, move in a separate function the decoding and the
display of devtype register.
The function will be reused with ADIv6.

Split from change https://review.openocd.org/6077/

Change-Id: I7a26a2c9759d5db5f9acfae5c169b90b3deb2f18
Signed-off-by: Kevin Burke <kevinb@os.amperecomputing.com>
Signed-off-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6448
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-09-25 13:04:53 +00:00
Antonio Borneo ddbc13a6f2 arm_adi_v5: simplify handling of AP type
The complete AP type should include 'class' and 'manufacturer'.

Cleanup the definition of AP type from AP_REG_IDR register.
Include the check of 'class', together with manufacturer and type.
Add the new MEM-AP from ARM IHI0074C.

Change-Id: Ic8db7c040108ba237b54f73b1abe24b8b853699b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6447
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
2021-09-25 13:00:55 +00:00
Antonio Borneo 06d2e430db arm_coresight: add include file and use it
Several magic numbers related to ARM CoreSight specification
IHI0029E are spread around OpenOCD code.

Define through macros the ARM CoreSight magic numbers and collect
them in a single include file.
Use the new macros wherever possible.

Change-Id: I9b0c1c651ce4ffbaf08d31791ef16e95983ee4cb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6446
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
2021-09-25 13:00:27 +00:00
Antonio Borneo c4e6034e26 armv7m.h: relax dependency from 'arm_adi_v5.h'
The include file 'armv7m.h' includes 'arm_adi_v5.h' only to get
the definition of 'struct adiv5_ap', but doesn't need the struct
content.

Reducing the cross dependencies speeds-up the compile time during
code development by avoiding re-compiling file.

Relax the dependency by locally declaring 'struct adiv5_ap' in
'armv7m.h' and remove the include of 'arm_adi_v5.h'.
Fix the other files that have now lost the includes file that
'arm_adi_v5.h' depends from.

Change-Id: Ic0d40b17db6045fa43f348bda83eaf211a6b347d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6468
Tested-by: jenkins
Reviewed-by: Daniel Goehring <dgoehrin@os.amperecomputing.com>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-09-25 12:59:12 +00:00
Oleksij Rempel a0bd3c9924 Partially Revert "flash/stm32l4x: introduce flash programming without loader"
This partially reverts commit 1247eee4e6.

There is no reasonable use cases where work-area should be enabled
and working, and it can't be used for the flash loader.

Instead of introducing driver specific property, users can disable
flash load by disabling work-area, for example by setting it to 0.

But still we keep the function stm32l4_write_block_without_loader
to be used when workarea is not available (no sufficient size or zero)

Change-Id: Ibb046c74df354c6067bac978e8ef7efb47d9fd2b
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6569
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-09-18 18:15:35 +00:00
Tarek BOCHKATI a1903f2867 flash/stm32l4x: fix dual bank support for STM32L552xC devices
For STM32L552xC devices with 256K flash:
  dual bank mode is activated if DB256 is set
  page size is 2KB if DBANK is set

For parts with 512K (aka STM32L5x2xE):
  DBANK controls both of dual/single bank mode and page size as well.

Change-Id: I8be668d5552fefe81acffaf2e3e35ef5e938162e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reported-by: Patrik Bachan <diggit@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/317/
Reviewed-on: https://review.openocd.org/c/openocd/+/6538
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-18 18:15:15 +00:00
Tarek BOCHKATI 050fcb1760 helper/command: fix echo return values
the echo command is managed through command handler and not jim_handler
to be consistent rename the handler from jim_echo to handle_echo
and update the return values

Fixes: 4747af362d (JIM: document "echo" command)
Change-Id: I5ae87ea802d8430b573fb83daa6b35490b5d5775
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6549
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-18 15:27:46 +00:00
Florian Zaruba 1efd12a6de jep106.inc: Update to revision JEP106BC
Signed-off-by: Florian Zaruba <florian@openhwgroup.org>
Change-Id: I566eb331b2884de3df5ad3f02c2ec7961539257b
Reviewed-on: https://review.openocd.org/c/openocd/+/6551
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-18 15:27:31 +00:00
Andreas Sandberg 564e7576ab stlink: Add PID for V3 device without MSD
Add the 0x3754 PID used by some STLINK-V3 devices when MSD has been
disabled. This PID has been observed on a Nucleo-G431RB board.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Change-Id: Idb85874fa5a9dff5940bae7e95426a956693b976
Reviewed-on: https://review.openocd.org/c/openocd/+/6555
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-18 15:27:16 +00:00
Andreas Sandberg 00b16b294f hla: Increase HLA_MAX_USB_IDS
We are already at the limit for the number of VID/PID pairs declared
in stlink.cfg and stlink-dap.cfg. Increase the maximum number of pairs
from 8 to 16 to make room for a few more devices.

Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Change-Id: Ifad8e7ef67b930edbb5421730f00eb3390812f06
Reviewed-on: https://review.openocd.org/c/openocd/+/6554
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-18 15:26:57 +00:00
Antonio Borneo 73c6416799 target: do not cast NULL in assignment
NULL is defined as 'void *'.
There is no need to cast NULL while assigning it to a pointer.

Change-Id: Ibaf18e5d47329707ec9c1c184cd4bba2e8e702ff
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6540
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
2021-09-18 15:26:14 +00:00
Antonio Borneo 79800db98a openocd: remove last NULL comparisons
The NULL pointers preceded by cast where not detected by the
scripting tools looking for NULL pointer comparison.

Remove them and, while there, further simplify the code and apply
the other coding style rules.

Change-Id: Ia7406122e07ef56ef311579ab0ee7ddb22c8e4b5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6539
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-09-18 15:22:30 +00:00
Tarek BOCHKATI ea562985b5 gerrit url: update the gerrit server address to https://review.openocd.org
change the gerrit server address from http://openocd.zylin.com to the new
address in order to avoid re-directions.

Change-Id: I76e128c277f63783d1a6f63a6a387aa838f51f80
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6481
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-18 15:21:02 +00:00
Tarek BOCHKATI c865879eb8 doc: add a note to use 'stm32l4x option_load' after changing option bytes
Change-Id: I502be27da892e393731d11e02203c736e77033d0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6533
Tested-by: jenkins
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-09-17 12:59:05 +00:00
Tarek BOCHKATI fc74ccda52 tcl/target/stm32(f7/h7)x: do not assume presence of the reset
do not force the presence of the reset line, since some custom boards
may do not contain the reset line.

Change-Id: I031ab34012b34a1b49def9db16461f9de0ae29cc
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reported-by: Fleck <fleckz@users.sourceforge.net>
Fixes: https://sourceforge.net/p/openocd/tickets/316/
Reviewed-on: https://review.openocd.org/c/openocd/+/6506
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2021-09-17 12:57:57 +00:00
Tarek BOCHKATI b61a280860 flash/stm32l4x: fix flash programming in 64-bit hosts
stm32l4_work_area struct is shared between the loader and stm32l4x flash driver

'*wp' and '*rp' pointers' size is 4 bytes each since stm32l4x devices have
32-bit processors.

however when used in openocd code, their size depends on the host
  if the host is 32-bit, then the size is 4 bytes each.
  if the host is 64-bit, then the size is 8 bytes each.

to avoid this size difference, change their types depending on the
usage (pointers for the loader, and 32-bit integers in openocd code).

Change-Id: I0a3df4bb4bf872b01cdb9357eb28307868d7d469
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6556
Tested-by: jenkins
Reviewed-by: Yestin Sun <sunyi0804@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-09-12 14:26:31 +00:00
Tim Newsome f78f9a90a6 In SMP config, replicate watchpoints on each core
This works well with gdb on RISC-V, since hardware breakpoints are
per-core and gdb thinks that targets are really processes on a machine.

Are there targets where this is a bad idea? Should the target definition
specify whether this behavior is desired or not?

Change-Id: Ia32be2707b04347fd8bf2ca6fbb2b0ceaad3704a
Signed-off-by: Tim Newsome <tim@sifive.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6528
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-11 12:08:38 +00:00
Tarek BOCHKATI e63297045b flash/stm32l4x: do not use magic number for dual bank option bits
Change-Id: I27211e7d44b48f65546e31710ec6ae129acb416f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6537
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-11 12:06:42 +00:00
Tarek BOCHKATI 5070425d6a flash/stm32l4x: introduce is_max_flash_size and use it
Change-Id: Idb421b9cf737d222baf4dd890032f69dec7a366e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6536
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-11 12:05:15 +00:00
Tarek BOCHKATI cdb6ea4f9f flash/stm32l4x: fix segmentation fault with HLA adapters and STM32WLx devices
CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1.
Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers
a segfault.

Change-Id: I501f5b69e629aa8d2836b5194063d74d5bfddb12
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Fixes: https://github.com/STMicroelectronics/OpenOCD/issues/6
Reviewed-on: https://review.openocd.org/c/openocd/+/6535
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-11 12:03:02 +00:00
Tarek BOCHKATI f24a283ac7 flash/nor/tcl: 'flash list' command: add the flash bank target
add the target assigned to the flash bank at creation
this is useful in daisy chains, to filter out the target banks.

Change-Id: Ic39e44914e34bb62991783762e5a65ef8871e82f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6426
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-04 07:26:10 +00:00
Tarek BOCHKATI 9f733ba2f2 flash/nor/tcl: fix the flash name returned by 'flash list' command
The 'flash list' command returns the driver name as flash name which seems
to be incorrect, the proposal is:
 - to fix this by returning the flash name
 - and add a new item 'driver' in the returned list

example:
before the change
> flash list
  {name stm32l4x base 134217728 size 0 bus_width 0 chip_width 0}
  {name stm32l4x base 201326592 size 0 bus_width 0 chip_width 0}
  {name stm32l4x base 200933376 size 0 bus_width 0 chip_width 0}

after the change
> flash list
  {name stm32l5x.flash_ns driver stm32l4x ...}
  {name stm32l5x.flash_alias_s driver stm32l4x ...}
  {name stm32l5x.otp driver stm32l4x ...}

Change-Id: I6d307b73c457549981a93c260be344378719af82
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6425
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-09-04 07:25:56 +00:00
Tarek BOCHKATI 57c61cee4b tcl/board: add st_nucleo_g4.cfg to cover known STM32G4 NUCLEO boards
known boards are NUCLEO-G431KB, NUCLEO-G431RB and NUCLEO-G474RE

note: this work safely with B-G431B-ESC1, B-G474E-DPOW1,
      STM32G474E-EVAL and STM32G484E-EVAL

Change-Id: I132a97e1816620b182983edc8a4b272b52b9241d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5484
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-09-04 07:25:20 +00:00
Tarek BOCHKATI be22b93a44 tcl/board: add st_nucleo_g0.cfg to cover known STM32G0 NUCLEO boards
known boards are NUCLEO-G031K8, NUCLEO-G070RB, NUCLEO-G071RB

note: this work safely with STM32G0316-DISCO, STM32G071B-DISCO
      and STM32G081B-EVAL

Change-Id: I483b6f44409228cd8c2c97b3c560927d1645c517
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5483
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-09-04 07:25:06 +00:00
Yasushi SHOJI 3ae2583b48 target: cortex_m: Fix a typo VECTRESET
According to ARM Cortex M3 technical reference manual, it's
"VECTRESET" instead of "VECRESET".

Change-Id: Iff5534beac2b313cee6da3252d76d4d44a61eeed
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6508
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-04 07:24:50 +00:00
Marc Schink 3359419e6a tcl/board/arty_s7: Fix proc and chip name
Tested with Digilent Arty S7 board.

Change-Id: I064f3b6537ae8d765d7f380ad53b922d584fdbe7
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6509
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-04 07:23:58 +00:00
Antonio Borneo 01f1f599c5 jimtcl: update to master branch 20210715
This version of jimtcl:
- fixes memory leak in API Jim_CreateCommand();
- fixes 'make distcheck';
- uses single-argument syntax for 'expr'.

With the 'expr' syntax already fixed in all the tcl scripts in
OpenOCD, let's use the latest jimtcl to check it and anticipate
any further issues.
By using this version, the workaround for the memory leak and for
distcheck can be reverted.

Change-Id: I58e1bdc752a728f1b479de1c55067b698e817ef5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6226
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
2021-09-04 07:23:25 +00:00
Antonio Borneo c7eaaf6204 openocd: prepare for jimtcl 0.81 'expr' syntax change
Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
arg") drops the support for multi-argument syntax for the TCL
command 'expr'.
All the scripts distributed with OpenOCD are already compliant
with the new syntax.

To avoid breaking user script, introduce a replacement for 'expr'
command that handles the old syntax while issuing a deprecated
warning.
This change should be part of OpenOCD v0.12.0, then reverted.

Change-Id: Ib08aa8ebcb634c81a3ce9d24fb4938b0418c947c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6510
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
2021-09-04 07:23:08 +00:00
Tarek BOCHKATI 48f267d4ad flash/stm32l4x: avoid using magic numbers for device ids
Change-Id: I54c41f31c16b91904e8cbca823b90caa3807826d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6437
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:40 +00:00
Tarek BOCHKATI 4f371e8eed flash/stm32l4x: add support of STM32WB1x
STM32WB1x devices has a single flash bank up to 320 KB (page 2KB)

note: STM32WB5x/WB3x are single banks as well but do have 4KB as page size.
note: remove the assert that checks if max_mages is power of two, because
      STM32WB1x flash size is not a power of 2

Change-Id: Ib514cf989ecb819d25d1c4a65d641d0a1a3d9f18
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6129
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:34 +00:00
Tarek BOCHKATI af3575b931 flash/stm32l4x: add support of STM32G05/G06x
this device has single bank flash architecture up to 64KB (page 2KB)
reference: RM0444 rev 5

Change-Id: Ia213c01accb950fcbb7519e08057dae11b4443dd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6128
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:26 +00:00
Tarek BOCHKATI 4b1492bb8e flash/stm32l4x: switch to to c loader instead of assembly loader
switching to C loader instead of the assembly version will enhance readability
will reduce the maintenance effort.

besides the switch to C loader, we added a new parameters to the loader
like flash_word_size and flash_sr_bsy_mask in order to support properly
STM32U5x and STM32G0Bx/G0Cx in dual-bank mode.

Change-Id: I24cafc2ba637a065593a0506eae787b21080a0ba
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6109
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:13 +00:00
Wealian Liao 385eedfc6f flash/nor: add support for Nuvoton NPCX series flash
Added NPCX flash driver to support the Nuvoton NPCX series
microcontrollers. Add config file for NPCX series.

Change-Id: Ia10b019a3521f59ad1e10ccdc56827ba30c3eac8
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5950
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 06:42:54 +00:00
Tarek BOCHKATI a098816a65 server/telnet: add variables auto-completion
Change-Id: Ie690afad18065cde8d754c8af50dacd9f467c8e5
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6442
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-31 04:13:01 +00:00
Tarek BOCHKATI 259e400276 server/telnet: simplify telnet_input function
running complexity on this file tells that:
NOTE: proc telnet_input in file telnet_server.c line 576
	nesting depth reached level 8
==>	*seriously consider rewriting the procedure*.
Complexity Scores
Score | ln-ct | nc-lns| file-name(line): proc-name
  319     272     226   src/server/telnet_server.c(576): telnet_input
total nc-lns      226

so try to reduce the complexity score of telnet_input function

Change-Id: I64ecb0c54da83c27a343f2a1df99fc8f9484572a
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6440
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-31 04:12:52 +00:00
Tarek BOCHKATI 9a9e9e2c66 server/telnet: enhance telnet_move_cursor
instrument the telnet_move_cursor to detect when there is no change
of cursor position and if the requested new position is out of bounds.

Change-Id: I24da877e538a458da6d2f8ddc2a681eee404d2cb
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6441
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-30 13:54:06 +00:00
Tarek BOCHKATI 70cd395f3f server/telnet: support 'CTRL+C'
like in terminal 'CTRL+C':
 - keeps the line content so the user can refer to it (like copy/paste)
 - marks the line with '^C', as hint that the command was not executed
 - permit the user to write a new command

Change-Id: Ib784c827d64fdc439a35db461d8387a62d3bfbbf
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6439
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-30 13:53:48 +00:00
Tarek BOCHKATI efe944dfc9 server/telnet: cleanup the if statement mixed style
Change-Id: Ie5f67288511d46fa196bc9f41e6af5504244adaa
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6438
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-30 13:53:32 +00:00
Antonio Borneo 12e2dfd31f Makefile: drop warning suppression on win build
Commit dcdf71c21b ("- fix signed/unsigned build errors under
win32. Thanks Zach Welch <zw@superlucidity.net>") in 2009 prevents
gcc warnings on sign/unsigned comparisons while building for Win
on folders 'helper' and 'server'.
In 2011, commit b69119668e ("RTOS Thread awareness support wip")
uses the same method on the new folder 'rtos'.

In mean time, all the incorrect sign/unsigned comparisons has been
fixed and no warning is present with the default -Wextra flag that
implies -Wsign-compare.
The comment:
	# FD_* macros are sloppy with their signs on MinGW32 platform
seems linked to some old implementation of MinGW32 include file
that doesn't apply on current versions.

Remove the obsolete hacks to suppress the warnings.

Change-Id: I76dba9e54a647d3b9fbf1b7e9ae1844e3d7adc9a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6254
Tested-by: jenkins
Reviewed-by: Xiaofan Chen <xiaofanc@gmail.com>
2021-08-30 13:52:12 +00:00
Antonio Borneo b3a51bbb59 helper: remove fix for libusb pre-v1.0.9
Libusb v1.0.9 has been released on April 2012. We can reasonably
expect that every user has already updated his system to a libusb
newer of equel to v1.0.9.

Remove the fix for older libusb.

Change-Id: I0c40e53d7af85a11b0bb265bbf8035857a2dfce1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6253
Tested-by: jenkins
Reviewed-by: Xiaofan Chen <xiaofanc@gmail.com>
2021-08-30 13:51:46 +00:00
Tarek BOCHKATI c281c64469 flash/stm32l4x: free write_algorithm work area if no space left for the buffer
If the remaining memory for the buffer is less than 256 bytes,
the memory allocated for the write algorithm in the target is not freed.

Fixes: ba131f30a0 (Flash driver for STM32G0xx and STM32G4xx)
Change-Id: Ic649f6c39799d76725b0c69ff3a009a3f510e17f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6486
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-30 07:52:26 +00:00
Tarek BOCHKATI c2ad18d68b flash/stm32l4x: add support of STM32U57x/U58x
this device flash registers are quite similar to STM32L5
with this changes :
 - flash size is up to 2MB
 - 2MB variants are always dual bank
 - 1MB and 512KB variants could be dual bank (contiguous addressing)
   depending on DUALBANK bit(21)
 - flash data width is 16 bytes (quad-word)

Change-Id: Id13c552270ce1071479ad418526e8a39ebe83cb1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6108
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-30 07:51:52 +00:00
Tarek BOCHKATI 6c1e1a212a flash/stm32l4x: add support of STM32WL5x dual core
according the RM0453, the second core  have a different Flash CR and SR
registers for flash operations (called C2CR and C2SR).
so we need to a different flash_regs than older L4 devices.
@see stm32wl_cpu2_flash_regs

the C2CR register don't contain LOCK and OPTLOCK bits, and this explain
the addition of new register index called STM32_FLASH_CR_WLK_INDEX to
look-up the CR with lock, to be used in locking/unlocking the flash.

note: DBGMCU_IDCODE cannot be read using CPU1 (Cortex-M0+) at AP1,
to solve this read the UID64 (IEEE 64-bit unique device ID register)

Change-Id: Ifb6e291bf97f814f0b9987b2c40f3037959f7af4
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6050
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-26 13:13:02 +00:00
Sebastiaan de Schaetzen 64fbd60787 flash/stm32l4x: prevent undefined behavior warnings caused by signed integer operations
When running OpenOCD with -fsanitize=undefined, a warning is emitted
for an bit-shifting operation whose result cannot be stored in a
signed integer.

This is because (1 << 31) overflows a signed integer, which is
undefined behavior. By making each of the bit masks act on an
unsigned number, the warning is avoided.

Whether this warning emitted by UBSan would ever manifest into a real
error is debatable, but fixing this does make UBSan happy.

Change-Id: I0455a26b234cb4f5e239a6ba90023d28380e9464
Signed-off-by: Sebastiaan de Schaetzen <sebastiaan.de.schaetzen@gmail.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6429
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:38:45 +00:00
Tarek BOCHKATI 43d31a8fd5 flash/stm32l4x: add support of STM32G0Bx/G0Cx devices
this device has a dual bank flash architecture up to 512 KB (page 2KB)
reference: RM0444 Rev 5

notes:
 - 128k variant is always single bank
 - 256k variant flash is contiguous (no gap) in dual bank mode
 - BKER is bit 13 vs bit 11 for other devices
   > added cr_bker_mask in stm32l4_flash_bank struct
 - BSY2 for bank 2 operations
   > added sr_bsy_mask in stm32l4_flash_bank struct
   > proposed optimization: always wait for (BSY1 | BSY2) with
     STM32G0Bx/G0Cx devices only (for L4+ devices BSY2=PEMPTY)

TODO: update flashloader to use the proper BSY bits
      temporarily don't use the loader in dual bank mode

Change-Id: I54b0c93b494e7209da818791d15edd8cd42c2732
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6036
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:38:17 +00:00