- Xtensa LX8 is fully supported in addition to prior LX and NX cores.
Change-Id: I2f3f0a21ce1518b3ced6d241f0ab84c65af64423
Signed-off-by: Ian Thompson <ianst@cadence.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8362
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Current script does not enforces the check for the SPDX tag in the
linker scripts.
Add the extension '.ld' in the OpenOCD specific part.
Change-Id: I1cb6bc52e9dd86d99a26393085c7e2c9e8bac11f
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8475
Tested-by: jenkins
Two different sizes uint8_t and uint32_t was used for this value
without a good reason.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: I4bb60cc5397ffd0d37e7034e3930e62793140c8d
Reviewed-on: https://review.openocd.org/c/openocd/+/8439
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Tested-by: jenkins
Could be handy for dummy transfer size detection.
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Change-Id: Ibb485218f6c2ff9066910bb58be0fc614b77add3
Reviewed-on: https://review.openocd.org/c/openocd/+/8438
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Use the TRAX interface DEBUGPC if available.
Otherwise use default stop-and-go profiling.
ESP32-S3, before this patch:
Internal: 8 samples/second
FT2232H: 12 samples/second
After this patch:
Internal: 18ksamples/second
FT2232H: 100ksamples/second
Change-Id: I681f0bccf4263c1e24f38be511e3b3aec8bf4d60
Signed-off-by: Richard Allen <rsaxvc@rsaxvc.net>
Reviewed-on: https://review.openocd.org/c/openocd/+/8431
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Ian Thompson <ianst@cadence.com>
Reviewed-by: Yurii Shutkin <yurii.shutkin@gmail.com>
Simplify the code using the target endianness independent API.
Change-Id: I39f720d0db9cf24eb41d7f359e4321bbc2045658
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8474
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
This adds support of TI LP-CC1352P7 evaluation kit.
For further details, see https://www.ti.com/tool/LP-CC1352P7.
Change-Id: I4aba160dbf4920febb7897458d06450e7d134147
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8194
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Vaishnav M A <vaishnav@beagleboard.org>
This adds support for TI CC13X2X7 / CC26X2X7 family.
For further details, see https://www.ti.com/lit/ug/swcu192/swcu192.pdf.
Change-Id: Ifd9b505716ddf0abbdd00f617e50a93a3d4fbe6a
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8193
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Vaishnav M A <vaishnav@beagleboard.org>
This updates the flash driver to support more than one bank.
This is required to support the cc1352p7 which has two banks.
This only have been tested on a cc1352p7.
The loader has been built using a gcc-arm-none-eabi-4_8-2014q3
toolchain.
Change-Id: Ia813421ececd96d6e2fd4dae910ad60fcc3d3c88
Signed-off-by: Alexandre Bailon <abailon@baylibre.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8192
Tested-by: jenkins
Reviewed-by: Vaishnav M A <vaishnav@beagleboard.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Flash banks created in kinetis_create_missing_banks did not populate
bank->minimal_write_gap. The default value of 0 was interpreted as
FLASH_WRITE_CONTINUOUS. This created unnecessary large padding if your
binary had a gap in the populated flash. It also caused flash errors
when loading with GDB because the erroneously padded pages were not
erased first. Tested using an S32k148 using s32k.cfg.
Change-Id: I9b7af698e29ac2c4f5fc8ecd82fa7f4b1a0d43f1
Signed-off-by: daniellizewski <daniellizewski@geotab.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8463
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Sipeed USB-JTAG/TTL Debugger is a compact FT2232D-based JTAG adapter.
Change-Id: Ibc9075723f47cd9b49ba4bb39e3d292e7d80bed7
Signed-off-by: Jun Yan <jerrysteve1101@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8472
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
When multiple jlink programmers are connected and no specific serial
or USB location is specified, print out the detected serial numbers.
Signed-off-by: Marcus Nilsson <brainbomb@gmail.com>
Change-Id: I280da2b85363f7054c5f466637120427cadcf7d1
Reviewed-on: https://review.openocd.org/c/openocd/+/8356
Reviewed-by: Mark Zhuang <mark.zhuang@spacemit.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Looks like 7f2d3e2925 introduced a regression by incorrectly assigning
threads. The title of the commit message says that the intention was to
"derive threadid from SMP index", this is not what happens, however.
Instead threadid is assigned based on an index of all examined targets
in an SMP group.
This introduces two logical errors.
*Error 1*
Here is the code that assigns threads to harts:
```
foreach_smp_target(head, target->smp_targets) {
struct target *curr = head->target;
if (!target_was_examined(curr))
continue;
threadid_t tid = threads_found + 1;
hwthread_fill_thread(rtos, curr, threads_found, tid);
```
Now, imagine a situation when we have two targets: `target.A` and
`target.B`. Let's assume that `target.A` is NOT examined (it could be
under reset, for example). Then, according to the algorithm when
assigning thread identifiers `target.B` will be assigned tid of 1. The
respected inferior on GDB side will be called `Thread 1`.
Now, imagine that `target.A` activates and succefully examined - OpenOCD
will re-assign thread identifiers. And now on GDB side `Thread 1` will
represent the state of `target.A`. Which is incorrect.
*Error 2*
The reverse mapping between `threadid` and targets does not take the
state of targets into account.
```
static struct target *
hwthread_find_thread(struct target *target, threadid_t thread_id)
...
threadid_t tid = 1;
foreach_smp_target(head, target->smp_targets) {
if (thread_id == tid)
head->target;
++tid;
}
```
So the constructed mapping is incorrect. Since in example above
`Thread 1` will get mapped to `target.A`.
*Solution:*
It seems that threadids should be assigned based on position of the
thread in an smp group disregarding the target state.
Change-Id: Ib93b7ed3bb03696afdf56a105b333e22b9ec69b5
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8471
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Mark Zhuang <mark.zhuang@spacemit.com>
Tested-by: jenkins
Reviewed-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
hide_csrs should not emit warnings on an attempt to hide non-exitents CSR.
hide_csrs funcitonality is intended to be used for scenarios when we don`t
want certain groups of registers to be available in GDB. Typically this is
needed to simplify integration with various IDE. In such scenarious it may
be impractical/unfeseable to figure out which register is present on a
target. So reporting a situation when a user wants to hide a non-existent
register creates way too much noise. This commit reduces severity of
relevant debug message to LOG_TARGET_DEBUG
Change-Id: Icbb982c4bcce7586fe35b6b004d0874d6014d5a7
This reverts commit e56dc61697.
The reverted commit claims to be the same as
b201a5db23, but it's not -- it changes the
warning in `riscv_reg_impl_expose_csrs()` instead of the one in
`riscv_reg_impl_hide_csrs()`.
The _targets has to be global as it is accessed at the end of this file.
This is already the case for setup_a5x {}, assure it is the same way for
setup_crx{} . Without this change, the _targets at the end of this file
is empty in case the Cortex-R is the boot core, fix this.
Change-Id: I4979e3125ec7d93bbd56eee0096ae1d9c5f6a565
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8470
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
virtex2 refresh replaced virtex2 program, but the even older programming
commands like xc6s_program still suggest the old, now-removed program
command. This changes the warnings to suggest the command that is still
there, and also adds some indication that you will need to use the .pld
name instead of the .tap name.
Change-Id: I292da62a95a9b414c69cdb1bba8a28dfd16a7336
Signed-off-by: Adam Novak <interfect@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8468
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Daniel Anselmi <danselmi@gmx.ch>
If no mask is given, the value in the option register is replaced
completely. If a mask is set, only those bits that are set in the mask
are transferred into the option register; the others remain unchanged.
Change-Id: If488a10f92d7dcc0e0f192aef5e67c255fd529c3
Signed-off-by: Ondřej Hošek <ondra.hosek@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8466
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
stm32l4x option_write works like stm32h7x option_write, i.e. expects the
value to write after reg_offset and optionally reg_mask after the value.
Change-Id: I57fb4fb1dbf7f43fe063b48f4db2dd5f2ef0ade0
Signed-off-by: Ondřej Hošek <ondra.hosek@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8464
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Use mbstowcs() to get required length of wide character string and
include space for terminating null wide character.
Change-Id: I668de6f0acc9b3ec5aca033d870dd9ef354f9077
Signed-off-by: Marcus Nilsson <brainbomb@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8232
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Integer values are interpreted by TCL as decimal, binary, octal
or hexadecimal if prepended with '0d', '0b', '0o' or '0x'
respectively.
The case of '0' prefix has been interpreted as octal till TCL 8.6
but is interpreted as part of a decimal number by JimTCL and from
TCL 9.
Align str_to_buf() to latest TCL syntax by:
- addding support for '0d', '0b' and '0o' prefix;
- dropping support for '0' prefix.
Change-Id: I708ef72146d75b7bf429df329a0269cf48700a44
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8465
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
Before the change, if the user wrote to any `tdata*` register, OpenOCD
would sometimes start to disable all the triggers (by writing zeroes to
`tdata1`) and re-enable them again (by witing all trigger registers to the
values read before for each `tselect` value), e.g. on `step`
(see `disable/enable_triggers()`).
There are a couple of issues with such approach:
1. RISC-V Debug Specification does not require custom register types
to support re-enabling by such sequence of writes (e.g. some custom
trigger type may require writing a custom CSR to enable it).
2. OpenOCD may still overwrite these triggers when a user asks to set a
new WP.
This commit introduces `riscv reserve_trigger ...` command to explicitly
mark the triggers OpenOCD should not touch.
Such approach allows to separate management of custom triggers and
offload it onto the user (e.g. disable/enable such triggers by setting up
an event handler on `step`-related events).
Change-Id: I3339000445185ab221368442a070f412bf44bfab
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Currently, during register file examination:
1. A read of an XPR is attempted via 64-bit abstract access.
2. If such a read fails (e.g. connection unstable) XLEN is assumed to be
32.
3. Then `misa` is read. Since `misa` is a CSR and it may be only
readable via program buffer, `s0` should be readable beforehand (at
least some assumption about `xlen` should be made).
4. Before the commit, the `misa.mxl` field was not checked against
`xlen`, therefore erroneous info may have been reported to the user.
Moreover, the `examine()` would pass indicating no error at all.
5. After the commit, `misa.mxl` is checked against `xlen` value.
Change-Id: I3fe5bd6742e564e6de782aad9ed10e65c0728923
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
* removed `progbuf_size` field from `riscv_info`; added getter
* moved `impebreak` field from `riscv_info` to `riscv013_info`
as implementation dependent field; added getter
Signed-off-by: Farid Khaydari <f.khaydari@syntacore.com>
Instead of making people type this in all the time, just default to
"SEGGER RTT" so more things work out of the box.
Change-Id: I147142cf0a755e635d3f66e047be2eb5049cf511
Signed-off-by: Karl Palsson <karl.palsson@marel.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8354
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Open output file in binary mode to disable EOL
conversion on Windows (and sometimes cygwin depending
on installation settings and path).
Change-Id: I38276dd1af011ce5781b0264b7cbb08c32a1a2ad
Signed-off-by: Richard Allen <rsaxvc@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8278
Reviewed-by: Karl Palsson <karlp@tweak.au>
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
OpenOCD disables breakpoints on step/resume if they
match the current code position. This is a non-obvious
behavior that should be documented
Change-Id: Id762066569ec6452869a58dfcd9df88c8a14d6ab
Signed-off-by: Parshintsev Anatoly <anatoly.parshintsev@syntacore.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8388
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
This is useful for setting a reset catch on a CPU that is being
brought out of reset.
Change-Id: Id8fe9bc3f75fd170f207f470a9f3b0faba7f24c1
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8422
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reduce the amount of boilerplate by moving cti_regs into its only
user, making it a local variable and removing the now-redundant
p_val pointer.
Change-Id: I778cc1e960532fae1ac1a952c6ff19c54e578a5f
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8421
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Some targets start up with the sticky overrun bit set. On such targets
we need to clear it in order to avoid subsequent incorrect reads.
Change-Id: I3e939a9e092de6fcea9494d3179a3386aa1701d2
Signed-off-by: Peter Collingbourne <pcc@google.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/8420
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
While at it, fix some small coding style issues.
Change-Id: Ifb8e78b55d29a06d69a3ce71d12d0040777aef13
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/8423
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Ian Thompson
liangzhen
Antonio Borneo
Jiafei Pan
Tomas Vanek
Richard Allen
Parshintsev Anatoly
Alexandre Bailon
daniellizewski
Jun Yan
Marcus Nilsson
Evgeniy Naydanov
Evgeniy Naydanov
Marek Vasut
Adam Novak
Ondřej Hošek
Tim Newsome
Farid Khaydari
Anatoly Parshintsev
Karl Palsson
Richard Allen
Marc Schink
Peter Collingbourne