Commit Graph

12391 Commits

Author SHA1 Message Date
Paul Fertser f8a6553e82 Restore normal development cycle
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2023-01-15 02:33:06 +03:00
Paul Fertser 9ea7f3d647 The openocd-0.12.0 release
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2023-01-14 23:14:31 +03:00
Antonio Borneo f71b5f5a37 configure.ac: fix check for jimtcl submodule
The file configure.ac checks if jimtcl submodule is present by
looking for the file jimtcl/configure.ac .
But jimtcl has switched to its own build system in 2011 and thus
dropped configure.ac . This cause a build issue on OpenOCD that
was incorrectly fixed by adding a dummy configure.ac in jimtcl.

Fix OpenOCD configure.ac to look for the correct file
jimtcl/configure .
After this fix, another fix would be proposed to jimtcl to drop
its useless dummy file configure.ac .

Change-Id: I705f72d83e374c8dd700baaa0c0bbe041f153605
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7437
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2023-01-14 20:06:11 +00:00
Antonio Borneo d92ebb5ab4 jtag: esp_usb_jtag: remove macro __packed
In FreeBSB 13.0 the build fails due to redefined macro __packed.

	src/jtag/drivers/esp_usb_jtag.c:19:9: error: '__packed' macro
	    redefined [-Werror,-Wmacro-redefined]
	#define __packed __attribute__((packed))
	        ^
	/usr/include/sys/cdefs.h:223:9: note: previous definition is here
	#define __packed        __attribute__((__packed__))
	        ^
	1 error generated.

Drop the macro and align the code with the other files in OpenOCD
project, where the attribute is directly applied without using a
macro.

Change-Id: I89ae943e77036206d40d4d54172cd4a73e76e5c5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Wojciech Puchar <wojtek@puchar.net>
Reviewed-on: https://review.openocd.org/c/openocd/+/7435
Tested-by: jenkins
Reviewed-by: Erhan Kurubas <erhan.kurubas@espressif.com>
2023-01-11 17:02:44 +00:00
Marcin Niestroj 7dd5b6a464 rtt: fix corner-cases of finding control block
This patch fixes two corner-cases of finding RTT control block.

The first one is when there was a partial match (even single byte) at
the end of loaded buffer (uint8_t buf[1024]), but this was not part of
full match. In that case `cb_offset` was not updated correctly and the
returned `*address` was lower by the legth of the partial match. In case
of searched 'SEGGER RTT' (the default control block ID) string, it was
enough to match `buf[1023] == 'S'`, which is quite likely to happen, and
the `*address` was offset by 1 (e.g. it was 0x20000fff instead of
0x20010000).

Updating (or even maintaining) `cb_offset` is not needed, as start
address of control block can be calculated based on memory address that
was loaded into `uint8_t buf[1024]`, the offset within this buffer and
the length of expected string.

The second issue is when control block is prepended with a byte that
matches first ID character, e.g. there is `SEGGER RTT` control block ID
is prepended by another `S`, making memory contents be `SSEGGER RTT`. In
that case there was no match found.

Fix that issue by making sure that tested byte is always compared with
first byte of expected control block ID.

While at it, change names of local variables to better describe their
meaning.

Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Change-Id: I12aa6e202bf12bedcbb888ab595751a2a2518a24
Reviewed-on: https://review.openocd.org/c/openocd/+/7429
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-01-11 17:02:25 +00:00
Parshintsev Anatoly 71e3d0aecb target/riscv: added support for missing VCSR register
Change-Id: I0ce7b9e76c613400916c46fad0f19984ea4b482e
2023-01-10 17:41:13 +03:00
Tim Newsome 43ea20dfbb
Merge pull request #777 from riscv/itrigger
target/riscv: Add `riscv` `itrigger` and `etrigger` commands.
2023-01-04 10:31:55 -08:00
Tim Newsome 5a72150604
target/riscv: Remove `riscv test_sba_config_reg` command. (#780)
This command is supposed to be a start at a compliance test for system
bus access. It doesn't pass against spike because it doesn't handle all
cases where the interface might be busy. It's not documented. As far as
I know nobody uses it.

So delete 400 lines of code instead of trying to fix it.

Change-Id: Ib94f2acb95a48f7c07d4f44206ff7373b03857f3
Signed-off-by: Tim Newsome <tim@sifive.com>

Signed-off-by: Tim Newsome <tim@sifive.com>
2023-01-03 10:54:33 -08:00
Tim Newsome d2ebfc8770 target/riscv: Use unsigned int for trigger indexes.
Change-Id: I1f7cf3a5c8b86f3d6825f45a67ff05822ea67d28
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-01-03 10:08:18 -08:00
Tim Newsome 9efa7775d4 target/riscv: Read back tdata2 in set_trigger()
Change-Id: I2a9271c66565a4c93de3322e14be8b75577ed1b6
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-01-03 10:06:12 -08:00
Tim Newsome 6c027e0df4 target/riscv: Add `riscv etrigger` command.
Change-Id: I7982231c5067b82e4ddb2999bca51dba06ccac7a
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-01-02 13:54:45 -08:00
Tim Newsome 0b022a349e target/riscv: Add `riscv itrigger` command.
This lets the user set an itrigger trigger, which doesn't fit in the
normal breakpoint abstraction.

This implementation only allows control of a single itrigger. Hardware
could support more than one, and that may be useful to catch different
interrupts in different execution modes. But it would make the code/UI
more complex and it feels like an unlikely use case.

Change-Id: I76c88636ee73d4bd298b2bd1435cb5d052e86c91
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-01-02 13:54:35 -08:00
Tim Newsome 2258a59a0f target/riscv: Use macros for trigger types.
Change-Id: I6ced3fb5a22bff4694fbceb8cf91f6cf6ce37ebf
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-12-27 12:54:12 -08:00
Tim Newsome eb8bb957d4
flash: fix clang static analyzer build errors (#778)
Fixes "variable set but not used" errors.
Tested with Homebrew clang version 13.0.1

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: Ia90baf5b4857db2b5569ebe6adbbb832de772aad
Reviewed-on: https://review.openocd.org/c/openocd/+/6971
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Co-authored-by: Erhan Kurubas <erhan.kurubas@espressif.com>
2022-12-27 10:54:26 -08:00
Paul Fertser dfe57baa16 Restore +dev suffix
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
2022-12-20 15:49:44 +03:00
Antonio Borneo fcb40f49b1 The openocd-0.12.0-rc3 release candidate
Change-Id: Id7ddf232593e1aa7cb36f2b30fe832ebf79c1535
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-20 13:50:45 +03:00
Antonio Borneo 77c281d2df cortex_m: handle armv8m cores without security extension
Cores armv8m, e.g. Cortex-M33, can be instantiated without the
optional Security Extension.
In this case, the secure registers are not present and when GDB
try accessing them it triggers a set of errors.

For armv8m cores without security extension, don't provide to GDB
the description of the secure registers.

Change-Id: I254478a4cf883e85b786df3f62c726b2f40d88d9
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7402
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-12-18 21:52:41 +00:00
Antonio Borneo c913e4d5a6 jtag: fix build with configure --enable-verbose
With flag --enable-verbose, configure enables compiling some
conditional code that with new gcc triggers an error:
	error: '%04x' directive output may be truncated writing
	between 4 and 8 bytes into a region of size 5
	[-Werror=format-truncation=]

Extend the buffer to contain the full 8 bytes of %04x on a 'int'
and change the limit in snprintf.
Skip the intermediate buffer 's[4]'.
Align the code to the coding style.

Change-Id: Ifc8a6e4686555578a7355a1f6049471fd5e31913
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Karl Hammar <karl@aspodata.se>
Reported-by: Tommy Murphy <tommy_murphy@hotmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/376/
Reviewed-on: https://review.openocd.org/c/openocd/+/7403
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-12-18 21:50:17 +00:00
Dan Stahlke 77c7abe4e7 at91samd: wait for nvm ready
Flashing a SAMD21J17D was failing during NVM erase.  The samd21
datasheet specifies that one cause of error conditions is executing an
NVM command while the previous command is still running.  The solution
is to wait for INTFLAG.READY after a command is issued.

SAMD21J17A was not exhibiting this problem.  Perhaps the later silicon
revision has slower NVM erase times.

Signed-off-by: Dan Stahlke <dan@stahlke.org>
Change-Id: I19745dae4d3fc6e3a7611dcac628e067cb41e0f0
Reviewed-on: https://review.openocd.org/c/openocd/+/7391
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-12-17 09:33:40 +00:00
Antonio Borneo 0a829efda5 driver: vdebug: fix mode of cmd 'vdebug mem_path'
The command 'vdebug mem_path' is reported in the documentation as
'{Config Command}', but the code sets mode = COMMAND_ANY.
The code of the commands sets some value that is only used during
the init phase, so the documentation is correct.

Change mode of command 'vdebug mem_path' to COMMAND_CONFIG.

Change-Id: Icb940fe382cbc75015273b35dcc8a88fc2a7d0ac
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7395
Tested-by: jenkins
Reviewed-by: Jacek Wuwer <jacekmw8@gmail.com>
2022-12-17 09:33:06 +00:00
Antonio Borneo 2b6fe8f1ab target: fix assert in 'monitor profile' on constant PC
When target is stopped in WFI/WFE or is in an infinite loop, the
sampled PC will always return the same value.
Command 'profile' requires that distance between min and max PC
should be at least 2, which is not the case for constant PC, and
incorrectly enforces the check through as assert().

Move the code that reads the optional parameters 'start' and 'end'
and check the gap 'end - start' before running the profile.
For self-computed min and max, increase max (or decrease min) to
match the required constraint.
Drop the assert().

Change-Id: I2be8df8568ce8c889923888c492e4f7ce354b16b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/370/
Reviewed-on: https://review.openocd.org/c/openocd/+/7400
Tested-by: jenkins
2022-12-17 09:32:34 +00:00
Antonio Borneo a51ac964c6 target: fix unsigned computation in 'monitor profile'
The implementation of command 'monitor profile' has few
issues:
- the address_space is a signed int, so cannot wrap-around on
  space over INT_MAX;
- max address is incremented without check for overflow;
- assert() used on errors instead of returning error codes;
- only handles 32 bits PC;
- output file created and left empty on error.

This patch fixes the first two issues, as a wider fix would be too
invasive and should be postponed in a following series.

Change-Id: Id8ead3f6db0fd5730682a0d1638f11836d06a632
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/370/
Reviewed-on: https://review.openocd.org/c/openocd/+/7394
Tested-by: jenkins
2022-12-17 09:32:09 +00:00
Antonio Borneo a6b0221952 target: cortex_a: fix clang error core.CallAndMessage
Clang complains about the variable 'orig_dfsr' that can be used
uninitialized both in cortex_a_read_cpu_memory() and in
cortex_a_write_cpu_memory().

The issue is caused by an incorrect error path that used to jump
through 'goto out'. The code after the label 'out' is specific to
handle the case of an error during memory R/W; it is incorrect to
jump there to handle an error during the initialization that
precedes the memory R/W.

Replace the 'goto out' with 'return retval'.
Remove the label 'out' that is now unused.

Change-Id: Ib4b140221d1c1b63419de109579bde8b63fc2e8c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7393
Tested-by: jenkins
2022-12-17 09:31:29 +00:00
Antonio Borneo c6fe10de75 arm_adi_v5: fix SIGSEGV due to failing re-examine
Commit 35a503b08d ("arm_adi_v5: add ap refcount and add get/put
around ap use") modifies the examine functions of mem_ap, cortex_m,
cortex_a and aarch64 by calling dap_put_ap() and then looking again
for the mem-ap and calling dap_get_ap().
This causes an issue if the system is irresponsive and the examine
fails and left the AP pointer to NULL. If the system was already
examined the NULL pointer will cause a SIGSEGV.

Commit b6dad912b8 ("target/cortex_m: prevent segmentation fault
in cortex_m_poll()") proposes a fix for one specific case and only
on cortex_m.

Modify all the examine functions by skipping look-up for the AP if
it was already set in a previous examine; the target's AP is not
supposed to change during runtime.

Remove the partial fix for cortex_m as it is not needed anymore.

Change-Id: I806ec3b1b02fcc76e141c8dd3a65044febbf0a8c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 35a503b08d ("arm_adi_v5: add ap refcount and add get/put around ap use")
Reviewed-on: https://review.openocd.org/c/openocd/+/7392
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2022-12-17 09:30:45 +00:00
Nima Palizban 2278878a05 src/target/mips_m4k.c: set missing flag in set_watchpoint
Without the fix, will see "Can not find free FP Comparator" error log

Change-Id: Id0d91cc02b7055e44d27507f9c05ccd48ff49838
Signed-off-by: Nima Palizban <n.palizban@gmail.com>
Fixes: fb43f1ff4e (target: Rework 'set' variable of break-/watchpoints)
Reviewed-on: https://review.openocd.org/c/openocd/+/7389
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-17 09:29:32 +00:00
Karl Palsson 9501b263e0 doc: describe tcl port consistently.
One place described the tcl port as 5555, which was changed in 163bd86071
Reported on IRC.

Change-Id: If740a29443793d6a4d4f8c9db54f0fc8344a6c1c
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: https://review.openocd.org/c/openocd/+/7385
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-03 09:27:27 +00:00
Evgeniy Naydanov 04887d3b68 Fix jim_target_smp for smp rtos target
If multiple targets are specified as -rtos <rtos_type>, the
rtos_update_threads was called only if the last target was specified as
rtos, which is inconsistent with other checks of whether or not smp target
is an rtos one.

Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
Change-Id: Ie52bc6b6c8f841d31b9590fcbc44e985d3cba0eb
Reviewed-on: https://review.openocd.org/c/openocd/+/7244
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-03 09:27:00 +00:00
Koudai Iwahori 4fe3997294 hwthread: Restore current_threadid in hwthread_update_threads
When OpenOCD receives a step-execution command from GDB and the target
is configured as rtos=hwthread, OpenOCD reconstructs the thread-info.
However, OpenOCD does not restore the thread id which is currently
selected by GDB. Due to this issue, OpenOCD sends the information of
wrong thread to GDB after the step execution.
This commit fixes the above issue by adding a code to save/restore the
thread id selected by GDB.

Signed-off-by: Koudai Iwahori <koudai@google.com>
Change-Id: I761a1141c04d48f1290e4f09baa7c7024f86f36a
Reviewed-on: https://review.openocd.org/c/openocd/+/7358
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-03 09:26:29 +00:00
Koudai Iwahori a9d7428535 hwthread: Add register validity check in get_thread_reg_list
When OpenOCD receives 'g' packet (read general registers) from GDB and
target is configured as rtos=hwthread, hwthread_get_thread_reg_list is
called. However, it does not check if the register valid or not. Due to
this issue, OpenOCD returns invalid register values to GDB.
This commit adds a validity check to hwthread_get_thread_reg_list. If
the register is not valid, it tries to read the register from the
target.

Signed-off-by: Koudai Iwahori <koudai@google.com>
Change-Id: Iad6424b62124271ec411b1dfc044b57dfc460280
Reviewed-on: https://review.openocd.org/c/openocd/+/7357
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-12-03 09:26:04 +00:00
Antonio Borneo 3ea1bfce4f jtag: xds110: fix clang error core.StackAddressEscape
Clang ignores that xds110_swd_write_reg() is always called with
bit SWD_CMD_RNW in 'cmd' set to zero.
It then complains that the local variable 'value' gets passed by
address to xds110_swd_queue_cmd() and in case of 'read request'
such stack address get stored for later use:
	src/jtag/drivers/xds110.c:1363:1: warning: Address of
	 stack memory associated with local variable 'value' is
	 still referred to by the global variable 'xds110' upon
	 returning to the caller. This will be a dangling
	 reference [core.StackAddressEscape]

To both xds110_swd_write_reg() and xds110_swd_read_reg(), add an
assert() to inform Clang about the state of bit SWD_CMD_RNW.

Change-Id: I7687c055ec71424b642e152f478723a930966e3a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7380
Tested-by: jenkins
2022-12-03 09:25:27 +00:00
Antonio Borneo 0f034868f2 flash: lpc2900: fix clang error 'dead assignment'
The variable retval is assigned a value that is never used.
Scan-build reports:
	Although the value stored to 'retval' is used in the
	enclosing expression, the value is never actually read
	from 'retval'.

Drop the dead assignment.

Change-Id: I11588dee748a55d52aa7f35bc1967b7df55af7fc
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7379
Tested-by: jenkins
2022-12-03 09:24:59 +00:00
Dolu1990 b337b0cfb4
riscv/run_algorithm : Add support for memory parameters (#773)
* riscv/run_algorithm : Add support for memory parameters

Change-Id: I5045a3843dcd96edb0cf8cc54bbd41969e3260a6
Signed-off-by: Dolu1990 <charles.papon.90@gmail.com>

* riscv/run_algorithm : better parameter handeling

Change-Id: If3da8b83f784ef7b13ca83e98bc629e2219cc632
Signed-off-by: Dolu1990 <charles.papon.90@gmail.com>

* riscv/run_algorithm : Better mem param error reporting

Change-Id: I09f99ca117f7e5373b23cad0f69d9d5b2a77e61d
Signed-off-by: Dolu1990 <charles.papon.90@gmail.com>

Signed-off-by: Dolu1990 <charles.papon.90@gmail.com>
2022-12-02 09:38:40 -08:00
Tim Newsome f7a5f4719d
Merge pull request #772 from riscv/resume_state
target/riscv: Set target->state in riscv013_halt_go()
2022-11-30 10:21:24 -08:00
Tim Newsome 86e84d3f6d target/riscv: Set target->state in riscv013_halt_go()
Then also set it when we resume in examine(), which doesn't use the full
abstractions because not all required data structures are filled out
yet.

Hopefully fixes #749.

Change-Id: I0c6ab16da1f035ca2fbdb9f7be1462d44ddce3a0
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-29 09:24:24 -08:00
Marc Schink 6ea1ccf3e6 flash/nor/stm32lx: Add revision '1, X' for Cat.2 devices
Change-Id: I0ff1e2102175ee952b066b325c9acbcb598b3af7
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7378
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-28 22:23:47 +00:00
Rocco Marco Guglielmi 5193f61cf5 tcl: max326xx: fix target scripts for latest version of OpenOCD
Change-Id: Iec5aba3a082f2e25f21d7ca173ed710894b370a4

Signed-off-by: Rocco Marco Guglielmi <roccomarco.guglielmi@gmail.com>
Change-Id: Ia83850e326661c8acb0712a280fdf961258322a4
Reviewed-on: https://review.openocd.org/c/openocd/+/7373
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-28 22:23:30 +00:00
Nick Kraus e345cefabd jtag/drivers/cmsis_dap.c: Fix Length of SWO Baudrate Command
The command should now send the full 5 byte command length, which
includes the command tag (0x19) and the 4-byte baudrate word, instead
of only the last 3 bytes of the baudrate.

Signed-off-by: Nick Kraus <nick@nckraus.com>
Change-Id: Idd6e084efd7492489aa900cdbf08f540944041cb
Reviewed-on: https://review.openocd.org/c/openocd/+/7370
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-11-28 22:23:03 +00:00
Tim Newsome d6bf022560
Merge pull request #767 from riscv/unavailable
Handle harts becoming unavailable while they're being debugged.
2022-11-25 10:18:12 -08:00
Tim Newsome 2d7dc3f5f5 target/riscv: Fix small riscv013_halt_go() bug
Exit the loop when no harts are running, instead of when at least one
hart has halted.

Change-Id: Ia69b626bf1fee4034bd5ccc800a651bfe0e53685
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-23 13:00:01 -08:00
Tim Newsome 69222be761 target/riscv: RISCV_HALT_BREAKPOINT -> RISCV_HALT_EBREAK
Simple rename to make code slightly more clear.

Change-Id: I959f83164c55de064d902d4e5bcd49333cef5c91
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-23 13:00:01 -08:00
Tim Newsome bf15b00315 target/riscv: Set correct target->state in riscv013_halt_go()
It used to set all states to halted, but that's not right for harts that
are now unavailable. (It might be possible to call poll() at the right
time instead of duplicating some of its code, but I didn't see an easy
way to do that. The real requirement is that target->state is set to
TARGET_UNAVAILABLE before TARGET_EVENT_HALTED is is sent in
halt_finish(), because that's what triggers hwthread_update_threads(),
which must know about unavailable harts so they can be hidden from gdb.

Change-Id: I0a0bbdd4ec9ff8c9898e04045b84e1d2512c9336
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-23 12:59:58 -08:00
Tim Newsome e69735db0b gdb_server: Operate on available targets.
When SMP is enabled, gdb will always use the first target in the SMP
group. That doesn't work when that first target is unavailable, but
others in the SMP group are still available.

For cases where gdb expects an operation to affect the entire group (run
control, memory access), find the first available target in an SMP group
and use that.

Change-Id: I4bed600da3ac0fdfe4287d8fdd090a58452db501
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-22 09:29:50 -08:00
Tim Newsome b1f3a75819 target/riscv: Don't resume unavailable harts.
Change-Id: I30a2e9ec6c1b99fb92ab1a160ddb63682167c6d8
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-22 09:29:50 -08:00
Tim Newsome d3bffe3d86 target/riscv: Share single-target and SMP resume code.
Change-Id: I416d8cc4c8c5ca0337c1f7e392b6b4fa3d75757f
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-22 09:29:50 -08:00
Tim Newsome 5832b983f5 rtos/hwthread: Hide unavailable targets from thread list.
Change-Id: I53c6e2876d9bab70800a0f080e72a2abe0499120
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-22 09:29:50 -08:00
Tim Newsome ad93fda7e8 target/riscv: Make poll() use TARGET_UNAVAILABLE.
Change-Id: I7052dd08581f0ce6a05cd8319e9bec0086296fc3
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-22 09:29:47 -08:00
Tim Newsome e5f9024bb0 target/riscv: Refactor riscv_openocd_poll()
There used to be entirely separate code paths depending on whether we're
in SMP mode or not. Now they're both the same.

Change-Id: I8f46295e4bc005f441af0c03d4f608c53b8a6586
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-21 10:26:21 -08:00
Tim Newsome 5a48975118 target/riscv: Error when hart becomes unavailable during resume
Change-Id: I731e6178b2b08b65206614b0dc2a0d993c149cc3
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-21 10:26:21 -08:00
Tim Newsome cc5e78172a
Merge pull request #769 from riscv/0.11
Revive 0.11 debug spec support
2022-11-21 09:26:38 -08:00
Tim Newsome f1e20767bc target/riscv: 0.11, call handle_halt() after step
This ensures that we populate the register cache and set target->state.
Some RISC-V changes had upset the balance.

Change-Id: I47fbf8ebd8fe39fa5b752212080f87e3b7e6e5e5
Signed-off-by: Tim Newsome <tim@sifive.com>
2022-11-17 11:41:27 -08:00