Commit Graph

9564 Commits

Author SHA1 Message Date
Tarek BOCHKATI cdb6ea4f9f flash/stm32l4x: fix segmentation fault with HLA adapters and STM32WLx devices
CPU2 (Cortex-M0+) is supported only with non-hla adapters because it is on AP1.
Using HLA adapters armv7m.debug_ap is null, and checking ap_num triggers
a segfault.

Change-Id: I501f5b69e629aa8d2836b5194063d74d5bfddb12
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Fixes: https://github.com/STMicroelectronics/OpenOCD/issues/6
Reviewed-on: https://review.openocd.org/c/openocd/+/6535
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-11 12:03:02 +00:00
Tarek BOCHKATI f24a283ac7 flash/nor/tcl: 'flash list' command: add the flash bank target
add the target assigned to the flash bank at creation
this is useful in daisy chains, to filter out the target banks.

Change-Id: Ic39e44914e34bb62991783762e5a65ef8871e82f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6426
Tested-by: jenkins
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-04 07:26:10 +00:00
Tarek BOCHKATI 9f733ba2f2 flash/nor/tcl: fix the flash name returned by 'flash list' command
The 'flash list' command returns the driver name as flash name which seems
to be incorrect, the proposal is:
 - to fix this by returning the flash name
 - and add a new item 'driver' in the returned list

example:
before the change
> flash list
  {name stm32l4x base 134217728 size 0 bus_width 0 chip_width 0}
  {name stm32l4x base 201326592 size 0 bus_width 0 chip_width 0}
  {name stm32l4x base 200933376 size 0 bus_width 0 chip_width 0}

after the change
> flash list
  {name stm32l5x.flash_ns driver stm32l4x ...}
  {name stm32l5x.flash_alias_s driver stm32l4x ...}
  {name stm32l5x.otp driver stm32l4x ...}

Change-Id: I6d307b73c457549981a93c260be344378719af82
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6425
Reviewed-by: zapb <dev@zapb.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-09-04 07:25:56 +00:00
Tarek BOCHKATI 57c61cee4b tcl/board: add st_nucleo_g4.cfg to cover known STM32G4 NUCLEO boards
known boards are NUCLEO-G431KB, NUCLEO-G431RB and NUCLEO-G474RE

note: this work safely with B-G431B-ESC1, B-G474E-DPOW1,
      STM32G474E-EVAL and STM32G484E-EVAL

Change-Id: I132a97e1816620b182983edc8a4b272b52b9241d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5484
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-09-04 07:25:20 +00:00
Tarek BOCHKATI be22b93a44 tcl/board: add st_nucleo_g0.cfg to cover known STM32G0 NUCLEO boards
known boards are NUCLEO-G031K8, NUCLEO-G070RB, NUCLEO-G071RB

note: this work safely with STM32G0316-DISCO, STM32G071B-DISCO
      and STM32G081B-EVAL

Change-Id: I483b6f44409228cd8c2c97b3c560927d1645c517
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5483
Reviewed-by: Andreas Bolsch <hyphen0break@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-09-04 07:25:06 +00:00
Yasushi SHOJI 3ae2583b48 target: cortex_m: Fix a typo VECTRESET
According to ARM Cortex M3 technical reference manual, it's
"VECTRESET" instead of "VECRESET".

Change-Id: Iff5534beac2b313cee6da3252d76d4d44a61eeed
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6508
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-04 07:24:50 +00:00
Marc Schink 3359419e6a tcl/board/arty_s7: Fix proc and chip name
Tested with Digilent Arty S7 board.

Change-Id: I064f3b6537ae8d765d7f380ad53b922d584fdbe7
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6509
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-04 07:23:58 +00:00
Antonio Borneo 01f1f599c5 jimtcl: update to master branch 20210715
This version of jimtcl:
- fixes memory leak in API Jim_CreateCommand();
- fixes 'make distcheck';
- uses single-argument syntax for 'expr'.

With the 'expr' syntax already fixed in all the tcl scripts in
OpenOCD, let's use the latest jimtcl to check it and anticipate
any further issues.
By using this version, the workaround for the memory leak and for
distcheck can be reverted.

Change-Id: I58e1bdc752a728f1b479de1c55067b698e817ef5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6226
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-by: zapb <dev@zapb.de>
Tested-by: jenkins
2021-09-04 07:23:25 +00:00
Antonio Borneo c7eaaf6204 openocd: prepare for jimtcl 0.81 'expr' syntax change
Jimtcl commit 1843b79a03dd ("expr: TIP 526, only support a single
arg") drops the support for multi-argument syntax for the TCL
command 'expr'.
All the scripts distributed with OpenOCD are already compliant
with the new syntax.

To avoid breaking user script, introduce a replacement for 'expr'
command that handles the old syntax while issuing a deprecated
warning.
This change should be part of OpenOCD v0.12.0, then reverted.

Change-Id: Ib08aa8ebcb634c81a3ce9d24fb4938b0418c947c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6510
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Tested-by: jenkins
2021-09-04 07:23:08 +00:00
Tarek BOCHKATI 48f267d4ad flash/stm32l4x: avoid using magic numbers for device ids
Change-Id: I54c41f31c16b91904e8cbca823b90caa3807826d
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6437
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:40 +00:00
Tarek BOCHKATI 4f371e8eed flash/stm32l4x: add support of STM32WB1x
STM32WB1x devices has a single flash bank up to 320 KB (page 2KB)

note: STM32WB5x/WB3x are single banks as well but do have 4KB as page size.
note: remove the assert that checks if max_mages is power of two, because
      STM32WB1x flash size is not a power of 2

Change-Id: Ib514cf989ecb819d25d1c4a65d641d0a1a3d9f18
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6129
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:34 +00:00
Tarek BOCHKATI af3575b931 flash/stm32l4x: add support of STM32G05/G06x
this device has single bank flash architecture up to 64KB (page 2KB)
reference: RM0444 rev 5

Change-Id: Ia213c01accb950fcbb7519e08057dae11b4443dd
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6128
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:26 +00:00
Tarek BOCHKATI 4b1492bb8e flash/stm32l4x: switch to to c loader instead of assembly loader
switching to C loader instead of the assembly version will enhance readability
will reduce the maintenance effort.

besides the switch to C loader, we added a new parameters to the loader
like flash_word_size and flash_sr_bsy_mask in order to support properly
STM32U5x and STM32G0Bx/G0Cx in dual-bank mode.

Change-Id: I24cafc2ba637a065593a0506eae787b21080a0ba
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6109
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 17:21:13 +00:00
Wealian Liao 385eedfc6f flash/nor: add support for Nuvoton NPCX series flash
Added NPCX flash driver to support the Nuvoton NPCX series
microcontrollers. Add config file for NPCX series.

Change-Id: Ia10b019a3521f59ad1e10ccdc56827ba30c3eac8
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5950
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-09-02 06:42:54 +00:00
Tarek BOCHKATI a098816a65 server/telnet: add variables auto-completion
Change-Id: Ie690afad18065cde8d754c8af50dacd9f467c8e5
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6442
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-31 04:13:01 +00:00
Tarek BOCHKATI 259e400276 server/telnet: simplify telnet_input function
running complexity on this file tells that:
NOTE: proc telnet_input in file telnet_server.c line 576
	nesting depth reached level 8
==>	*seriously consider rewriting the procedure*.
Complexity Scores
Score | ln-ct | nc-lns| file-name(line): proc-name
  319     272     226   src/server/telnet_server.c(576): telnet_input
total nc-lns      226

so try to reduce the complexity score of telnet_input function

Change-Id: I64ecb0c54da83c27a343f2a1df99fc8f9484572a
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6440
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-31 04:12:52 +00:00
Tarek BOCHKATI 9a9e9e2c66 server/telnet: enhance telnet_move_cursor
instrument the telnet_move_cursor to detect when there is no change
of cursor position and if the requested new position is out of bounds.

Change-Id: I24da877e538a458da6d2f8ddc2a681eee404d2cb
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6441
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-30 13:54:06 +00:00
Tarek BOCHKATI 70cd395f3f server/telnet: support 'CTRL+C'
like in terminal 'CTRL+C':
 - keeps the line content so the user can refer to it (like copy/paste)
 - marks the line with '^C', as hint that the command was not executed
 - permit the user to write a new command

Change-Id: Ib784c827d64fdc439a35db461d8387a62d3bfbbf
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6439
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-30 13:53:48 +00:00
Tarek BOCHKATI efe944dfc9 server/telnet: cleanup the if statement mixed style
Change-Id: Ie5f67288511d46fa196bc9f41e6af5504244adaa
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6438
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-30 13:53:32 +00:00
Antonio Borneo 12e2dfd31f Makefile: drop warning suppression on win build
Commit dcdf71c21b ("- fix signed/unsigned build errors under
win32. Thanks Zach Welch <zw@superlucidity.net>") in 2009 prevents
gcc warnings on sign/unsigned comparisons while building for Win
on folders 'helper' and 'server'.
In 2011, commit b69119668e ("RTOS Thread awareness support wip")
uses the same method on the new folder 'rtos'.

In mean time, all the incorrect sign/unsigned comparisons has been
fixed and no warning is present with the default -Wextra flag that
implies -Wsign-compare.
The comment:
	# FD_* macros are sloppy with their signs on MinGW32 platform
seems linked to some old implementation of MinGW32 include file
that doesn't apply on current versions.

Remove the obsolete hacks to suppress the warnings.

Change-Id: I76dba9e54a647d3b9fbf1b7e9ae1844e3d7adc9a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6254
Tested-by: jenkins
Reviewed-by: Xiaofan Chen <xiaofanc@gmail.com>
2021-08-30 13:52:12 +00:00
Antonio Borneo b3a51bbb59 helper: remove fix for libusb pre-v1.0.9
Libusb v1.0.9 has been released on April 2012. We can reasonably
expect that every user has already updated his system to a libusb
newer of equel to v1.0.9.

Remove the fix for older libusb.

Change-Id: I0c40e53d7af85a11b0bb265bbf8035857a2dfce1
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6253
Tested-by: jenkins
Reviewed-by: Xiaofan Chen <xiaofanc@gmail.com>
2021-08-30 13:51:46 +00:00
Tarek BOCHKATI c281c64469 flash/stm32l4x: free write_algorithm work area if no space left for the buffer
If the remaining memory for the buffer is less than 256 bytes,
the memory allocated for the write algorithm in the target is not freed.

Fixes: ba131f30a0 (Flash driver for STM32G0xx and STM32G4xx)
Change-Id: Ic649f6c39799d76725b0c69ff3a009a3f510e17f
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6486
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-30 07:52:26 +00:00
Tarek BOCHKATI c2ad18d68b flash/stm32l4x: add support of STM32U57x/U58x
this device flash registers are quite similar to STM32L5
with this changes :
 - flash size is up to 2MB
 - 2MB variants are always dual bank
 - 1MB and 512KB variants could be dual bank (contiguous addressing)
   depending on DUALBANK bit(21)
 - flash data width is 16 bytes (quad-word)

Change-Id: Id13c552270ce1071479ad418526e8a39ebe83cb1
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6108
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-30 07:51:52 +00:00
Tarek BOCHKATI 6c1e1a212a flash/stm32l4x: add support of STM32WL5x dual core
according the RM0453, the second core  have a different Flash CR and SR
registers for flash operations (called C2CR and C2SR).
so we need to a different flash_regs than older L4 devices.
@see stm32wl_cpu2_flash_regs

the C2CR register don't contain LOCK and OPTLOCK bits, and this explain
the addition of new register index called STM32_FLASH_CR_WLK_INDEX to
look-up the CR with lock, to be used in locking/unlocking the flash.

note: DBGMCU_IDCODE cannot be read using CPU1 (Cortex-M0+) at AP1,
to solve this read the UID64 (IEEE 64-bit unique device ID register)

Change-Id: Ifb6e291bf97f814f0b9987b2c40f3037959f7af4
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6050
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-26 13:13:02 +00:00
Sebastiaan de Schaetzen 64fbd60787 flash/stm32l4x: prevent undefined behavior warnings caused by signed integer operations
When running OpenOCD with -fsanitize=undefined, a warning is emitted
for an bit-shifting operation whose result cannot be stored in a
signed integer.

This is because (1 << 31) overflows a signed integer, which is
undefined behavior. By making each of the bit masks act on an
unsigned number, the warning is avoided.

Whether this warning emitted by UBSan would ever manifest into a real
error is debatable, but fixing this does make UBSan happy.

Change-Id: I0455a26b234cb4f5e239a6ba90023d28380e9464
Signed-off-by: Sebastiaan de Schaetzen <sebastiaan.de.schaetzen@gmail.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6429
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:38:45 +00:00
Tarek BOCHKATI 43d31a8fd5 flash/stm32l4x: add support of STM32G0Bx/G0Cx devices
this device has a dual bank flash architecture up to 512 KB (page 2KB)
reference: RM0444 Rev 5

notes:
 - 128k variant is always single bank
 - 256k variant flash is contiguous (no gap) in dual bank mode
 - BKER is bit 13 vs bit 11 for other devices
   > added cr_bker_mask in stm32l4_flash_bank struct
 - BSY2 for bank 2 operations
   > added sr_bsy_mask in stm32l4_flash_bank struct
   > proposed optimization: always wait for (BSY1 | BSY2) with
     STM32G0Bx/G0Cx devices only (for L4+ devices BSY2=PEMPTY)

TODO: update flashloader to use the proper BSY bits
      temporarily don't use the loader in dual bank mode

Change-Id: I54b0c93b494e7209da818791d15edd8cd42c2732
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6036
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:38:17 +00:00
Tarek BOCHKATI e7e46ba61e flash/stm32l4x: remove stm32l4_part_info.default_flash_regs
This struct element is replaced by the usage of F_HAS_L5_FLASH_REGS flag:
since over this driver stm32l4_flash_regs is the default register layout,
and the only exception is STM32L5 family,
so it's simpler to manage it using a flag.

Note: the same flag will be used with STM32U5 devices, as they have
the same registers layout, which explains the move of stm32l5_s_flash_regs
before the switch(device_id) in order to not re-write this for STM32U5.

Change-Id: I3b67a6f558d9350f609a22524012b6fceb7de7c2
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6435
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:37:38 +00:00
Tarek BOCHKATI 1247eee4e6 flash/stm32l4x: introduce flash programming without loader
this capability permits to program the flash if we cannot reserve a workarea.

the introduction the command 'stm32l4x flashloader <bank_id> [enable|disable]'
helps to automatically skip using the flashloader if needed.

Change-Id: Id29213c85ee5c7c487cfee21554f5a7ea50db6c9
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6273
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:27:17 +00:00
Tarek BOCHKATI e609d5a5de flash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0x55
when RDP level is 0.5 the provided work-area should reside in non-secure RAM
to ensure that:
 - add a hint in the driver level
 - reduce the usage of secure RAM only when TZEN=1 and RDP is not 0.5
   (check the target configuration file)

Change-Id: Idbf2325e609b84ef8480eefdb49a176fdf7e07c7
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6035
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:21:38 +00:00
Tarek BOCHKATI c9d40366ad flash/stm32l4x: STM32L5 support programming when TZEN=1 and RDP=0xAA
STM32L5 flash memory is aliased to 0x0C000000, this address mapping
is used for secure applications. (0x08000000 for non-secure)

this change allows the programming of secure and non-secure flash
when trustzone is enabled and RDP level is 0

Change-Id: I89d1f1b5d493cf01a142ca4dbfef5a3731cab96e
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5936
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-26 06:19:15 +00:00
Tarek BOCHKATI 80d323c6e8 flash/stm32l4x: introduce auto-probe when OPTR is changed
auto re-probing is ensured by having optr cache set in the
last probe operation.

this will help to detect if flash options have been modified by the
running application or by the user using direct register access.

Change-Id: I05cd7ab9e83a7fc26ac6cff175b3c11b0efa2eb5
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5935
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Tested-by: jenkins
2021-08-26 06:18:52 +00:00
Tarek BOCHKATI 84291d0269 flash/stm32l4x: introduce 'stm32l4x trustzone [enable|disable]' command
this command will help to enable/disable or display the TrustZone security,
using the TZEN option bit.

Note: This command works only with devices with TrustZone, eg. STM32L5.
Note: This command will perform an OBL_Launch after modifying the TZEN.

Change-Id: I4aef15bf57d09c1658d37858143d23b1d43de1f0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5542
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-26 06:17:12 +00:00
Tarek BOCHKATI 1bce8d3d80 flash/stm32l4x: do not report bank mode before probing [FIX]
in line 1391, get_stm32l4_bank_type_str(bank) will always output the same
value "Flash single" since the variable stm32l4_info->dual_bank_mode is false
by default, stm32l4_info->dual_bank_mode will be set correctly afterward
in the switch case at line 1467

thus the need to remove the usage of get_stm32l4_bank_type_str(bank) before
stm32l4_info->dual_bank_mode initialization.

Fixes: 64c2e03b23 ("flash/nor: improved API of flash_driver.info & fixed buffer overruns")
Change-Id: Ia8dc7e144e0ded6143682eb514c247f27859ff81
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6411
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-26 06:16:32 +00:00
Oleksij Rempel 76ba25a8a5 tcl: add lattice ECP5 family support
Add support for ECP5 FPGA targets and board based on this chips:
Radiona ULX3S and Lambdaconcept ECPIX-5

Change-Id: I932fc6e2458cda7d63ac21579acddea5b53410bc
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6112
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
2021-08-25 03:47:50 +00:00
root 3f1c15d2a7 target/adi_v5_jtag: Add support for 8-bit IR JTAG-DP
As per Arm Debug Interface Architecture Specification (ADIv5.0 to
ADIv5.2), B3.3.1, the JTAG-DP as an IR length of 4 or 8 bits
depending on the ARM implementation. The current code
only support 4-bit and this patch extends the support to 8-bit IR.
Not tested back yet on a 4-bit target.

Change-Id: Ie4f875dc336caf014c6cfced57574b54d0970623
Signed-off-by: Antoine C. <acalando@free.fr>
Reviewed-on: https://review.openocd.org/c/openocd/+/6285
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-22 20:27:59 +00:00
Antonio Borneo 347b88a3e1 cortex_a: use the ap number specified at target create
Current implementation ignores the flag '-ap-num' provided to
command 'target create' and searches for the first AP of APB type.

If specified, use the ap number.

Change-Id: If1ac12345220d14a4a60515efe46dc2a2eac079a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6413
Tested-by: jenkins
2021-08-22 20:26:38 +00:00
Antonio Borneo 7a61a006de jep106: use packed jedec manufacturer code
JEP106 encodes JEDEC-assigned manufacture code as:
a) a sequence of zero or more escape codes 0x7f;
b) an odd-parity bit of the next 7 bits;
c) 7 bits.

The same code is often represented as a single value composed by
the logical OR between:
- the number of escape codes in a), shifted left by 7 positions;
- the 7 bits in c).
This is the preferred packed representation used by this change.

Currently there are only two uses of JEP106 in openocd to get the
manufacturer name:
- to decode the JTAG IDCODE of each TAP, where the JEP106 code is
  already packed as in the preferred representation above in bits
  IDCODE[11:1];
- to decode the ARM CoreSight PIDR register, where the JEP106 code
  is split in 3 parts:
  = PIDR3[3:0], corresponding to bits [10:7] of the packed code;
  = PIDR2[2:0], corresponding to bits [6:4] of the packed code;
  = PIDR1[7:4], corresponding to bits [3:0] of the packed code.

Wrap the existing JEP106 decode function in a simpler API using
the packed code.
Simplify the callers by skipping the bit unpacking.
Change the manufacturer code in CoreSight table dap_partnums[] to
match the packed representation, by removing the always-one bit 7
erroneously taken from PIDR bit JEDEC and included in the former
table.

Change-Id: I63eb4da9e6801fab25e330f1f6b792d2fd619493
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6418
Tested-by: jenkins
2021-08-22 20:26:06 +00:00
Antonio Borneo 66175577e1 arm_adi_v5: update coresight class names
Update the list of ARM coresight classes wrt to latest ARM
documentation.
Use c99 array designator to easily track changes in future.
Add a comment for the entry "OptimoDE DESS". It was added in 2009
by David Brownell, but Google cannot find any reference other than
this line in openocd code its associated commit. It should not be
an issue keeping it as is.

Change-Id: Ia3b646131ee68ca5263095c3a0aeaf75c004b324
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6431
Tested-by: jenkins
2021-08-22 20:25:19 +00:00
Antonio Borneo 6933dd0231 command: log the command only when it is executed
In case of multi-word commands, the command dispatcher is nested
called at each word during command name parsing.
The improper position of the call to script_debug() causes the
command line to be logged once at each parsed word.
In the example of command "cpu arm disassemble 0" the full command
is logged three times for "cpu", "arm" and "disassemble":

	Debug: 656617 61843 command.c:201 script_debug(): command - cpu arm disassemble 0
	Debug: 656618 61843 command.c:201 script_debug(): command - cpu arm disassemble 0
	Debug: 656619 61843 command.c:201 script_debug(): command - cpu arm disassemble 0

Call script_debug() only when the parsing is terminated and the
command handler is going to be executed.

Change-Id: Ide4cb01b3b38912e2e24b073c94a9560f92d30bb
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6436
Tested-by: jenkins
Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-08-22 20:24:44 +00:00
Antonio Borneo 6f28ac8fde cortex_m: fix command 'step address'
The command 'step' accepts an optional parameter 'address' to run
the step-by-step execution from an address different from current
program counter.
When OpenOCD sets the new program counter value in the register
cache, it doesn't flag it as dirty. The following call to function
armv7m_restore_context() does not propagate the new value of the
program counter to the target. This cause the target to continue
from the old program counter value, ignoring the user's request.

It is hard to notice the issue if the target is halted in an idle
loop! In fact the default mode to operate step-by-step is to set a
breakpoint to the following instruction and resume execution. In
the idle loop the CPU will pass through the breakpoint whatever
the resume address is. User will find the target halting at the
instruction following 'address' which is consistent with the
expected behaviour of command 'step address'.

To verify the issue on an STM32F4, use a dummy code in SRAM:
	halt
	mww 0x20000000 0xbf00bf00
	mww 0x20000004 0xbf00bf00
	mww 0x20000008 0xe7fcbf00
	arm disassemble 0x20000000 6
	        0x20000000  bf00    nop
	        0x20000002  bf00    nop
	        0x20000004  bf00    nop
	   +--> 0x20000006  bf00    nop
	   |    0x20000008  bf00    nop
	   +-<- 0x2000000a  e7fc    b   #0x20000006
	resume 0x20000006
	halt
	step 0x20000000
the target doesn't halt because it is in the loop from 0x20000006
to 0x2000000a. The 'step 0x20000000' did not changed the program
counter so the temporary breakpoint at 0x20000002 is never hit.
Then:
	halt
	step 0x20000008
		target halted ...
		... pc: 0x2000000a
gives the feeling that only the instruction at 0x20000008 has been
executed, but actually the whole loop has been executed from the
place 'halt' stopped the execution till the breakpoint at the
instruction following 0x20000008.

Flag the program counter cached value as 'valid' and 'dirty' to
force armv7m_restore_context() to update the target's register.

Change-Id: I49bd8bb95b2f5429ec38ed016f2ad706618ae68a
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6434
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2021-08-22 20:23:09 +00:00
Antonio Borneo 044e0f8c9a stlink: fix SWIM mode on stlink-v3
Commit 89f07325f2 ("stlink: Set speed before entering JTAG/SWD
mode") anticipates setting the adapter speed just before entering
in the JTAG/SWD mode. This to initiate the communication with the
speed selected by the user.
But SWIM doesn't allow setting the speed before entering in SWIM
mode. The resulting error causes OpenOCD to quit.
The problem only happens with stlink-v3, due to the different way
to set the adapter speed on different stlink versions.

Set the speed before entering in the mode only for JTAG and SWD
modes.

Change-Id: Iab42cd9d72ecfac14c7e17bae74e0dee2218b235
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: 89f07325f2 ("stlink: Set speed before entering JTAG/SWD mode")
Reviewed-on: https://review.openocd.org/c/openocd/+/6443
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
2021-08-22 20:22:34 +00:00
Sebastiaan de Schaetzen 013a0e88d2 rtos/riot: fix out-of-bounds writes when target is corrupted
This protects against out-of-bounds writes when the memory
of RIOT's scheduler is corrupted.
This memory can be corrupted because of:
 - Programming errors
 - The scheduler not yet having been initialised
 - An incorrect symbol file being used during debugging.

This error can result in OpenOCD segfaulting. Valgrind was
used to find the approximate location of the error.

Change-Id: I60e7d7c245b8c4e38f4c98cb0c0347a9b5ec3177
Signed-off-by: Sebastiaan de Schaetzen <sebastiaan.de.schaetzen@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6381
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-22 20:21:47 +00:00
Sebastiaan de Schaetzen 085dd21a16 rtos/riot: fix out-of-bounds read of optional symbols array
This fixes an out-of-bounds read of the riot_optional_symbols array.

Change-Id: I172ae182dd0c7dd68edaa66ac030030d9bc65401
Signed-off-by: Sebastiaan de Schaetzen <sebastiaan.de.schaetzen@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6428
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-22 20:20:48 +00:00
Tarek BOCHKATI cbc1dc5049 flash/atsame5: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: Ia7fe9c4017108616f21676f115f151ac62924205
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6423
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-22 13:19:16 +00:00
Tarek BOCHKATI 3caa18729c flash/kinetis: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: I972da1a75ba7c41c1b714c2429289c3d24594235
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6422
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-22 13:19:07 +00:00
Tarek BOCHKATI 01da8f6c2a flash/xmc4xxx: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: Ibfe95ce73f147f467de8de23e9573ef0179aed96
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6421
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-22 13:18:52 +00:00
Tarek BOCHKATI dd0ee1fa5b flash/at91samd: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: I14061cb48da6bac13f9d2896190136f5784b8c07
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6424
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-08-22 13:15:24 +00:00
Tarek BOCHKATI 277b0a5d97 jtag/cmcis_dap: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: Ife9342c6088a241a0a4b77f9bd21f12c9b9862a0
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6420
Reviewed-by: Adrian M Negreanu <adrian.negreanu@nxp.com>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2021-08-22 11:10:26 +00:00
Tarek BOCHKATI 91b5626e7f flash/stm32l4x: use COMMAND_PARSE_NUMBER in command handlers
the usage of COMMAND_PARSE_NUMBER is safer in COMMAND_HANDLERs since it provides
better error checking than strto** functions.

Change-Id: I7e113b06b74f2d8d9cc4c0ce1957994a1c49c964
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6419
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
2021-08-22 10:45:17 +00:00
Tarek BOCHKATI 88c3e767b2 github/workflow: disable libusb static link for windows build
Current github build for windows is using dynamic libraries,
but libftdi is requiring libusb static libraries.

As a quick solution, just get rid of libftdi till it can be linked without
static libusb.

Change-Id: I9c7cb0b8853459ca48589674498403e255ade5cc
Reported-by: Xiaofan <xiaofanc@gmail.com>
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/6384
Reviewed-by: Xiaofan <xiaofanc@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
2021-08-22 08:39:59 +00:00