Commit Graph

12104 Commits

Author SHA1 Message Date
Tim Newsome 2a64da39b0 target/riscv: Remove unused riscv013_on_halt function
The riscv013_on_halt function was being called but its implementation was
empty, providing no additional functionality. Removed the function declaration,
calls to it, and its implementation since it is not required.

Change-Id: I425ea890deadeec945f0a47af247f3f99172e801
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-06-20 09:22:27 -07:00
Tim Newsome 2d4c53b338 jtag/drivers/xds110: Initialize `written`
Otherwise I get a compiler warning, which fails the build.

Change-Id: Ib7d4ab85160b537d07c74f8651ac42906fd661ed
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-06-20 09:22:27 -07:00
Marek Vrbka eebcf3cff1 riscv/semihosting: Fix ebreak skip on fileio mode
This patch fixes skipping the semihosting sequence if
the fileio mode is enabled on riscv. This change was
tested by me and is in the riscv-openocd fork for a year now.

Original merge request:
https://github.com/riscv/riscv-openocd/pull/699

Original author: Wu Zhigang
zhigang.wu@starfivetech.com
https://github.com/wzgpeter

Change-Id: Iadaa0a48d1f82d3a7ca168f8a6b656ff6ab78e03
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7729
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
2023-06-16 22:11:51 +00:00
Tim Newsome 5d1b50af52
Merge pull request #866 from riscv/semi_magic
target/riscv: Early exit magic sequence checks in riscv_semihosting
2023-06-16 09:42:59 -07:00
Tim Newsome ebfd43c84f target/riscv: Early exit magic sequence checks in riscv_semihosting
When halted we don't need to read all 3 instructions before deciding the
sequence doesn't match.

Change-Id: I9f8345960ce27e859265af901a368166a70b9fde
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-06-15 10:40:37 -07:00
Chao Du c6e0716ac9
rtos/FreeRTOS: pxCurrentTCB should be used for judgment. (#862)
* rtos/FreeRTOS: pxCurrentTCB should be used for judgment.

The current TCB is stored in pxCurrentTCB, which is somehow RISC-V-specific, should not be overwritten from upstream (#816).

* fix the code style check.

Signed-off-by: Chao Du <duchao@eswincomputing.com>
Change-Id: I9ffa8947f0cb9e93c7d96866882a5a1e8e69afad

* revert some over-changes in last commit.

Change-Id: Ie88bd75b59190503db11ee4538281bd13b554e50
Signed-off-by: Chao Du <duchao@eswincomputing.com>

---------

Signed-off-by: Chao Du <duchao@eswincomputing.com>
2023-06-14 11:39:21 -07:00
Tim Newsome 8f81655256
Merge pull request #864 from riscv/prototypes
target/riscv: Remove unnecessary prototypes.
2023-06-12 09:00:22 -07:00
Lorenz Brun 63f4e7c72a target/ti-cjtag: make switching to JTAG more reliable
The current cJTAG to JTAG switching commands for TI chips are not
particularly reliable, especially on chips with accurate timing.
On a Raspberry Pi the existing sequence has (depending on cabling and
chip) a ~50% chance of working, on a much better-behaved FT2232H
it doesn't manage to enable full JTAG at all.

This change runs a bunch of test-idle cycles before actually attempting
to switch to full JTAG. This makes the switch reliable even at high
clock speeds (>100kHz) and from precise sources like the FT2232H.

Change-Id: I9293e884bf3e9606d529756ae4483b844d3c39db
Reported-by: Phil Wiggum <p1mail2015@mail.com>
Fixes: https://sourceforge.net/p/openocd/tickets/375/
Signed-off-by: Lorenz Brun <lorenz@brun.one>
Reviewed-on: https://review.openocd.org/c/openocd/+/7419
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-06-10 17:11:46 +00:00
Antonio Borneo d8c9f66d25 jep106: update to revision JEP106BG May 2023
The original document from Jedec does not report the entry for
"21  NXP (Philips)", replaced by "c". It's clearly a typo.

Keep the line from JEP106BF.01 for "NXP (Philips)".

Change-Id: I30215c4ff08d5f112305cde6ab7a3176cdcef948
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7727
Tested-by: jenkins
2023-06-10 17:11:12 +00:00
Marek Vrbka 9f23a1d7c1 semihosting: fix non-zero value on Windows isatty()
On Windows, isatty() can return any non-zero value if it's an interactive
device. Which diverges from the ARM semihosting specification. This patch
introduces a fix to make the SYS_ISTTY operation conform to spec.

Change-Id: I9bc4f3cb82370812825d52419851910b3e3f35cc
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7725
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
Reviewed-by: Jan Matyas <jan.matyas@codasip.com>
2023-06-10 17:10:27 +00:00
Marek Vrbka 71180e6753 gdb_server: refactor and unify function gdb_get_char_inner
The old implementation of gdb socket error handling
in the gdb_get_char_inner() differs between Windows and *nix
platforms. This patch simplifies it by using an existing
function log_socket_error() which handles most of the platform
specific things. It also provides better error messages.

Change-Id: Iec871c4965b116dc7cfb03c3565bab66c8b41958
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7724
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-06-10 17:10:07 +00:00
Marek Vrbka 0854c83076 gdb_server: add debug signal reason prints
Added debug prints to show what is the target debug reason. Also added
debug print for Ctrl-C response. This is useful for troubleshooting and
log analysis.

Change-Id: I055936257d989efe7255656198a8d73a367fcd15
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7720
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-06-10 17:00:26 +00:00
iosabi 370bf43fb1 flash/nor: add support for NXP QN908x
This patch adds support for the NXP QN908x family of Bluetooth
microcontrollers, such as the QN9080. This chip features a Cortex-M4F
with 512 KiB of flash on all the available versions, although the
documentation suggests that there might be 256 kB versions as well.

The initial support allows to read, erase and write the whole user flash
area. Three new sub-commands under the new "qn908x" command are added
in this patch as well: disable_wdog to disabled the watchdog,
mass_erase to perform a mass erase and allow_brick to allow programming
images that disable the SWD interface.

Disabling the watchdog is required after a "reset halt" in order to run
the CRC algorithm from RAM when verifying the chip. However, this is not
done automatically on probing or other initialization since disabling
the watchdog might interfere with debugging real applications.

The "mass_erase" command allows to erase the whole flash without
probing it, since in some scenarios the chip can be locked such that no
flash or ram can be accessed from the SWD interface, allowing only to
run a mass_erase to be able to flash the program.

The flashing process allows to compute a checksum, similar to the
lpc2000 driver "calc_checksum" but done over a different region of the
memory. This checksum is required to be present for the QN908x
bootloader ROM to boot, and otherwise is useless. As with the lpc2000
design, verification when using "calc_checksum" is expected to fail if
the checksum was not valid in the image being verified.

This was manually tested on a QN9080, including the scan-view,
AddressSanitizer/UBSan and test coverage configurations.

Change-Id: Ibd6d8f3608654294795085fcaaffb448b77cc58b
Co-developed-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Signed-off-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Signed-off-by: iosabi <iosabi@protonmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/5584
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-06-10 16:58:35 +00:00
Tim Newsome 166b68c1b0 target/riscv: Remove unnecessary prototypes.
These functions used to exist but don't anymore. (Pointed out in #863)

Change-Id: Iac6b5edd320bdff7628a788861e332f956dcd93d
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-06-09 15:13:44 -07:00
Tim Newsome 973c72887c
Merge pull request #860 from riscv/examine_state
target/riscv: set_dcsr_ebreak() while target->state is still changed
2023-06-08 09:10:55 -07:00
Tim Newsome c8d6ffa6f0
Merge pull request #858 from MarekVCodasip/register-cache-invalidate
Add register cache flushing and invalidation to protobuf execution.
2023-06-08 09:04:54 -07:00
Tim Newsome ad89d570e7 target/riscv: set_dcsr_ebreak() while target->state is still changed
Otherwise it fails.

Fixes #859.

Change-Id: Ib59e6d840316b881481a9b1e01f9d546e73bf932
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-06-07 09:49:58 -07:00
Marek Vrbka 711ac4f0f0 target/riscv: add register cache flushing and invalidation to protobuf execution.
Previously, progbuf execution did not flush or invalidate the register cache which could lead to incorrect behavior. This patch fixes it as well as refactors few sore points in the code related to it.

Change-Id: I353b931ca70a1828d4a9cc512aead00441730875
Signed-off-by: Marek Vrbka <marek.vrbka@codasip.com>
2023-06-07 09:41:30 +02:00
Tim Newsome e0dd44a53c
Merge pull request #856 from riscv/select_hart
target/riscv: Select hart in update_dcsr()
2023-06-06 08:56:05 -07:00
Tim Newsome 0ab2ebd191 target/riscv: Select hart in update_dcsr()
Otherwise we may end up modifying DCSR of a different hart than
intended.

Change-Id: I39bde21a1444623ed150f2b3d504b9318b9d6191
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-06-05 09:39:14 -07:00
Jacek Wuwer 24b656bff5 jtag/vdebug: adding xtensa config
This change adds the extensa sample target and board configurations.
it removes the obsoleted vd_xtensa_jtag.cfg from targets.

Change-Id: I9d4d25abde46c0b15e5211a973012447872cb405
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7723
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-06-02 21:04:37 +00:00
Jacek Wuwer 146fec5820 jtag/vdebug: using tap_state
This change implements the predefined type tap_state instead of generic
uint8_t in the driver

Change-Id: I3478e8d7b40b961f3ba77711179016cdcc35cd32
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7722
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-06-02 21:04:17 +00:00
Jacek Wuwer 81cf948bf4 jtag/vdebug: fix endianness support
This change fixes endianness support in the driver.

Change-Id: Ida360bb58e988cea0a66fdc79e1610b528846fc4
Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7721
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-06-02 21:01:20 +00:00
Erhan Kurubas 4dc4280555 target/espressif: fix clang scan-build warning
Clang reports that 3rd function call argument is an uninitialized value
file esp32_apptrace.c line:1270

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: I73e254d4eb0c6b3152229717d8827d334784ab92
Reviewed-on: https://review.openocd.org/c/openocd/+/7719
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Tested-by: jenkins
2023-06-02 21:00:32 +00:00
Wolfram Sang b02cbafcc9 tcl/board/calao-usb-a9g20-c01: add proper initialization
Initialize clocks to max speed and setup SDRAM. NAND support is still
incomplete. Originally found at:

elinux.org/index.php?title=Calao_Atmel_AT91_development_board&oldid=73933

Updated the code from 2011 and improved it a bit.

Signed-off-by: Wolfram Sang <wsa@kernel.org>
Change-Id: I83474e07c8de8cc3b5d058029551935549693ef9
Reviewed-on: https://review.openocd.org/c/openocd/+/7578
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-06-02 20:59:57 +00:00
Dominik Wernberger 00cbf7bd31 Add/Correct STM8L15xx2/3/4/6/8 devices
Change-Id: I83fe1e50821ec15e1853aca96ebb32fe1ff5328f
Signed-off-by: Dominik Wernberger <dominik.wernberger@gmx.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7690
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-06-02 20:59:36 +00:00
Antonio Borneo 0e526314a1 flash: jtagspi: fix clang build warning
Clang is unable to fully track the content of the array
write_buffer[] and incorrectly complains that it could contain
some uninitialized value.

To help clang to track the execution flow, rewrite the handling of
the buffer by using simpler indexing and by moving away cmd_byte
from the first buffer's element to the variable cmd_byte.

While there:
- fix the error codes returned while parsing the command line and
- use directly command_print_sameline() instead of passing through
  intermediate buffers.

Change-Id: I1969e896887ea3a4abebee057cc04c03005fa57c
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7718
Tested-by: jenkins
2023-06-02 20:58:53 +00:00
Antonio Borneo 00603bf156 flash: psoc4: fix clang error
Clang 15.0.7 complains about snprintf output truncation due to
output between 13 and 22 bytes into a destination of size 20.

Increase the size of the buffer.

Change-Id: I0369255ca1bc02a0cf494f765e91a608c960a0d6
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7717
Tested-by: jenkins
2023-06-02 20:58:36 +00:00
Bohdan Tymkiv 72131e05e9 cortex_m: fix reading of DCB_DSCSR register
Value in the 'dscsr' variable is garbage until the DAP queue is run.
Postpone evaluation of the 'secure_state' variable. Reading the
core registers in between will execute the DAP queue.

Change-Id: I44959e882dbafb1b9779e813c3d13f3b3dbcd47f
Signed-off-by: Bohdan Tymkiv <bohdan200@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7693
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-06-02 20:57:49 +00:00
Antonio Borneo 4a57f3ebb2 target: armv8: fix support of pointer authentication
The registers pauth_dmask and pauth_cmask are not accessible in
AARCH32 mode. Tagging them as 'hidden' is not enough and triggers
error:
	Failed to read pauth_dmask register
while halting the core.

Tag the pauth registers as not existing, unless required by user.

Note: for non existing registers there should be no need to
      allocate their register cache. Let's keep this for a further
      improvement.

Change-Id: Iaa0d006a3d8ee611ee93333ed49a8615a6c94276
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Fixes: d0436b0cda ("armv8: Add support of pointer authentication")
Reviewed-on: https://review.openocd.org/c/openocd/+/7712
Tested-by: jenkins
Reviewed-by: Koudai Iwahori <koudai@google.com>
2023-06-02 20:57:05 +00:00
Tim Newsome 5a9654d272
Merge pull request #854 from en-sc/en-sc/fix-regacc-running
target/riscv: fix register access on running target
2023-06-02 08:25:07 -07:00
Evgeniy Naydanov 3a29542056 target/riscv: fix register access on running target
Register access on running target should fail if mstatus needs to be
modified.

Change-Id: Iec8e8d514ef2f5ca42606a5534cce55aaaa99180
Signed-off-by: Evgeniy Naydanov <evgeniy.naydanov@syntacore.com>
2023-05-31 22:22:53 +03:00
Tim Newsome 58b6a5eabf
Merge pull request #851 from riscv/power_dance
target/riscv: Handle harts powering down and coming back up.
2023-05-30 12:51:24 -07:00
Daniel Anselmi 78688fea98 flash/jtagspi: sending command and setting parameters without probing.
Change-Id: I6b9d90265ca5112b9ab2aae97bb4c6cf3ebc4112
Signed-off-by: Daniel Anselmi <danselmi@gmx.ch>
Reviewed-on: https://review.openocd.org/c/openocd/+/7432
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
2023-05-27 06:44:31 +00:00
Ian Thompson 2dd34cbe0b target/xtensa: add file-IO support
- Manual integration of File-IO support from xt0.2 release
- Verified with applications linked using gdbio LSP
- No new clang static analysis warnings

Signed-off-by: Ian Thompson <ianst@cadence.com>
Change-Id: Iedc5f885b2548097ef4f11ae1a675b5944f5fdf0
Reviewed-on: https://review.openocd.org/c/openocd/+/7550
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-05-27 06:43:59 +00:00
Jan Matyas df12552b5b jtag/adapter: Removed unused include of strings.h
Removed an unused include from src/jtag/adapter.c.

Signed-off-by: Jan Matyas <jan.matyas@codasip.com>
Change-Id: Ia5ea0acdfa1c011d7c88decd0f63e8032aafd699
Reviewed-on: https://review.openocd.org/c/openocd/+/7687
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-05-27 06:43:27 +00:00
Antonio Borneo 8297836170 jtag: rewrite jim_jtag_tap_enabler() as COMMAND_HANDLER
The function is used for commands:
- jtag tapisenabled
- jtag tapenable
- jtag tapdisable

While there, add the missing .help and .usage fields and fix the
incorrect check in jtag_tap_enable() and jtag_tap_disable().

Change-Id: I0e1c9f0b8d9fbad19d09610a97498bec8003c27e
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7554
Tested-by: jenkins
2023-05-27 06:42:51 +00:00
Antonio Borneo 5dd047fbbe jtag: rewrite commands 'jtag newtap' and 'swd newdap' as COMMAND_HANDLER
While there:
- fix memory leak in case of error on values tap->chip,
  tap->tapname, tap->expected_ids;
- check for out of memory error;
- fix minor coding style issue;
- add the missing .usage field;
- remove functions not in use anymore.

Change-Id: I1c8c3ffeb324e9eacb919c7e0d94fd72122c9a81
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7431
Tested-by: jenkins
2023-05-27 06:42:01 +00:00
Antonio Borneo da76f8f0b4 target: use unsigned int for timeout_ms
Change the prototype of functions:
- target_run_algorithm()
- target_wait_algorithm()
- target_wait_state()
- struct target_type::run_algorithm()
- struct target_type::wait_algorithm()
to use unsigned int for timeout_ms instead of int.
Change accordingly the variables passed as parameter.

Change-Id: I0b8d6e691bb3c749eeb2911dc5a86c38cc0cb65d
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7562
Tested-by: jenkins
2023-05-27 06:41:17 +00:00
Antonio Borneo fe6befbd80 target: rewrite command 'arp_waitstate' as COMMAND_HANDLER
While there, add the missing .usage field and remove the now
unused function jim_target_tap_disabled().

Change-Id: I79afcc5097643fc264354c6c3957786a55f40498
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7561
Tested-by: jenkins
2023-05-27 06:40:40 +00:00
Antonio Borneo 22ababc12e target: rewrite command 'arp_examine' as COMMAND_HANDLER
Change-Id: I8f227b219ca39f198e1e39847ddd36bb9880a328
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7560
Tested-by: jenkins
2023-05-27 06:40:16 +00:00
Antonio Borneo 0f0a4b1452 target: espressif: apptrace: declare a local function as static
The function esp32_cmd_apptrace_generic() is not used outside the
file.

Declare it as static.
Detected through 'sparse' tool.

Change-Id: I08c6b92fb01594320bc3ae6b16067ac4eb51ca12
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7676
Tested-by: jenkins
2023-05-27 06:39:35 +00:00
Erhan Kurubas a0fecd6c41 target/espressif: add system level tracing feature
Produces traces compatible with SEGGER SystemView tool.

Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com>
Change-Id: If1057309edbb91ed2cf1ebf9137c378d3deb9b88
Reviewed-on: https://review.openocd.org/c/openocd/+/7606
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2023-05-27 06:38:51 +00:00
Antonio Borneo 144d940a8b Revert "target/image: zero-initialize ELF segments up to p_memsz"
This reverts commit 047b1a8fc2.

Commit 047b1a8fc2 ("target/image: zero-initialize ELF segments
up to p_memsz") breaks the backward compatibility introducing some
problem:
- an empty bss segment with paddr in SRAM gets zero filled at load
  but does not survive after a reset, causing verify to fail;
- an empty bss segment with paddr in FLASH causes excessive flash
  usage, which can exceed flash size (causing error) and makes
  flash aging faster.

Revert it while looking for a better implementation.

Change-Id: Iaaf926dafce46a220a5bbe20c8576eb449996d76
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reported-by: Marian Buschsieweke <marian.buschsieweke@ovgu.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/7658
Reviewed-by: Bohdan Tymkiv <bohdan200@gmail.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-by: Peter Collingbourne <pcc@google.com>
Tested-by: jenkins
2023-05-27 06:38:12 +00:00
Tim Newsome f0898155d1 target/riscv: Set dcsr.ebreak* during examine()
This way if you connect to a running target, before it's hit a breakpoint,
then when it does hit the breakpoint OpenOCD will catch it.

Change-Id: I6f1e5f169fa385f46759015786e664693c3872e4
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-05-26 13:01:47 -07:00
Tim Newsome 21433e83ee target: poll() failure does not mean the target halted.
Poll failure just means poll failed. It's safer to assume the target is
still running, because then if it is running and subsequently halts we can
relay this to gdb correctly. We can't do the other way around, because once
gdb thinks the target has halted, it can't deal with it spontaneously
running.

Change-Id: Idb56137f1d6baa9afc1b0e55e4a48f407b8ebe83
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-05-26 13:00:13 -07:00
Tim Newsome 82ed02f92a target/riscv: Always clear progbuf cache in examine().
When a DM was powered down, we end up in examine() again, and clearly if
the DM was powered down we need to invalidate that cache.

Change-Id: I5eb6a289939f313e06c09cac22245db083026aa3
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-05-26 13:00:13 -07:00
Tim Newsome 1c5cf8023c target/riscv: Reset DTM when it reports an error.
The error state is sticky, so this has to be done to recover.

Change-Id: I589f3cdab0f2351fd25f89951830cbc16c39bd93
Signed-off-by: Tim Newsome <tim@sifive.com>
2023-05-26 13:00:13 -07:00
Tim Newsome c8e7e3535c
Merge pull request #842 from en-sc/en-sc/optimize-access
target:riscv: optimize register accesses
2023-05-25 09:34:49 -07:00
Matthijs Kooijman a5d34202c6 flash/nor/stm32f2x: Show error message when unprotecting OTP
Trying to disable OTP write protection by running e.g. `flash protect
1 0 1 off` would already be rejected with an error code, but that would
result in a generic "failed setting protection for blocks 0 to 1"
message. Now a more specific error message is also printed, telling the
user why it failed.

Change-Id: I6d4974eb0bcd23a0a6cf68ff955d9e59b8b1b06a
Signed-off-by: Matthijs Kooijman <matthijs@stdin.nl>
Reviewed-on: https://review.openocd.org/c/openocd/+/7615
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2023-05-25 16:25:44 +00:00