cbbdbeef1c
24.6.1 requires that CRS goes high fewer than 4 cycles after TX_EN goes high. This means we need to assert tx when we enter then START_J state, not when we actually transmit a /J/. This also has the upside of simplifying the logic a bit. Signed-off-by: Sean Anderson <seanga2@gmail.com> |
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common.vh | ||
io.vh | ||
pcs.v | ||
pmd.v |