ethernet/tb
Sean Anderson 34d6a1fd6a tb: axis_replay_buffer: Allow delaying the last byte
Allow delaying the last byte to make it easier to exactly time when the
MAC sees the byte. This way, we can test to ensure that everything works
even when valid is only high for one cycle. We can't change signals
once valid goes high, so this is the only way to ensure this kind of
timing.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
2023-01-11 17:20:12 -05:00
..
__init__.py Make testbenches a module 2022-08-21 12:36:28 -04:00
axis_mii_tx.py axis_mii_tx: Add reset 2023-01-10 23:56:04 -05:00
axis_replay_buffer.py tb: axis_replay_buffer: Allow delaying the last byte 2023-01-11 17:20:12 -05:00
descramble.py descrambler: Rename unscrambled* to descrambled* 2022-10-16 18:53:47 -04:00
mdio.py mdio: Support 2022-08-29 21:25:25 -04:00
mdio_io.py mdio:io: Don't drive mdio as X in testbench 2022-10-16 17:37:38 -04:00
mdio_regs.py pcs: Add false_carrier signal 2022-11-05 12:37:18 -04:00
mii_io_rx.py mii_io: Add isolation support 2022-08-28 18:43:23 -04:00
mii_io_tx.py mii_io: Add isolation support 2022-08-28 18:43:23 -04:00
nrzi_decode.py nrzi_decode: Add reset input 2022-11-30 18:14:23 -05:00
nrzi_encode.py nrzi_encode: Fix test name 2022-11-05 12:37:18 -04:00
pcs.py pcs: Split into rx/tx 2022-10-30 21:32:02 -04:00
pcs_rx.py tb: pcs_rx: Allow err to be optional 2023-01-09 21:02:35 -05:00
pcs_tx.py Add phy_core 2022-11-05 12:37:18 -04:00
phy_core.py tb: phy_core: Fix col/crs detection 2023-01-09 20:50:00 -05:00
pmd_dp83223.py Add DP83223-based PMD 2022-11-30 18:14:23 -05:00
pmd_dp83223_rx.py pmd: Export check_bits from testbench 2023-01-09 20:38:52 -05:00
scramble.py Add phy_core 2022-11-05 12:37:18 -04:00
util.py Add AXI stream replay buffer 2022-11-30 18:14:23 -05:00