tb: pcs_rx: Allow err to be optional
The downstream TX side of the MII is almost the same as the upstream RX side of the MII. However, MACs may never generate TX_ER, so I will be leaving it out. TO allow testing this, make the err signal optional. Signed-off-by: Sean Anderson <seanga2@gmail.com>
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@ -40,7 +40,7 @@ async def mii_recv_packet(pcs, signals=None):
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while signals['valid'].value:
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if signals['ce'].value:
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if signals['err'].value:
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if 'err' in signals and signals['err'].value:
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yield None
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else:
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yield signals['data'].value
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