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ethernet
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WIP 100BASE-TX PHY
67 Commits 2 Branches 0 Tags 290 KiB
Verilog 50.1%
Python 46.8%
Makefile 2.3%
SystemVerilog 0.8%
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Sean Anderson 1b47635644 descramble: Use lsfr counter for unlock_timer 
The critical path often includes the unlock timer. Switch to an lfsr
implementation. This saves around 20 LUTs and reduces the critical path
from the carry chain (and the or reduction) to just the and reduction.

Signed-off-by: Sean Anderson <seanga2@gmail.com>
 		2022-10-30 20:50:18 -04:00
rtl descramble: Use lsfr counter for unlock_timer 2022-10-30 20:50:18 -04:00
tb pcs: data_?x -> ?x_data 2022-10-16 18:58:29 -04:00
.gitignore Ignore post-synthesis verilog 2022-08-21 12:36:36 -04:00
4b5b.gtkw Initial commit 2022-05-23 20:57:03 -04:00
Makefile Automatically dump signals 2022-10-30 14:20:48 -04:00