pmd_dp83223: Don't intentionally cause bit errors

On stretches without transitions, we can lose (or gain) a bit, depending
on how the reciever is reckoning. This can cause spurious test failures
when we get especially unlucky. Keep track of our running disparity
(time-wise, not value-wise) and keep perfect time until we get a
transition (or we start moving back in the right direction).

Signed-off-by: Sean Anderson <seanga2@gmail.com>
This commit is contained in:
Sean Anderson 2022-10-30 22:14:18 -04:00
parent 63006ca9c0
commit f4c2b1eb1f
1 changed files with 15 additions and 0 deletions

View File

@ -40,8 +40,23 @@ async def test_rx(pmd, delays):
# random phase
await Timer(random.randrange(1, 8000), units='ps')
pmd.signal_detect.value = 1
last_bit = ins[0]
running_disparity = 0
for i, delay in zip(ins, delays(len(ins))):
pmd.indicate_data.value = i
# Keep track of how far off we are...
if i != last_bit:
running_disparity = 0
running_disparity += 8000 - delay
last_bit = i
# If we get more than a quarter cycle off, use perfect delay until
# we get a transition
if abs(running_disparity) >= 2000:
running_disparity -= 8000 - delay
delay = 8000
try:
pmd.delay.value = delay
except AttributeError: