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.gitignore
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Add some tests
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2019-10-21 16:25:15 +02:00 |
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add_sub.ys
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Add some tests
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2019-10-21 16:25:15 +02:00 |
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adffs.ys
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update test
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2019-12-03 16:56:15 +01:00 |
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compare.v
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gowin: Fix X output of $alu techmap
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2023-05-01 17:56:41 +02:00 |
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compare.ys
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gowin: Fix X output of $alu techmap
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2023-05-01 17:56:41 +02:00 |
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counter.ys
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Call equiv_opt with -multiclock and -assert
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2019-12-31 18:39:32 -08:00 |
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dffs.ys
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Add some tests
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2019-10-21 16:25:15 +02:00 |
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fsm.ys
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fix fsm test with proper clock enable polarity
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2019-11-11 17:51:26 +01:00 |
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init-error.ys
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gowin: Use dfflegalize.
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2020-07-06 12:27:46 +02:00 |
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init.v
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attempt to fix formatting
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2019-11-25 14:50:34 +01:00 |
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init.ys
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Replace opt_rmdff with opt_dff.
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2020-08-07 13:21:03 +02:00 |
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logic.ys
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Add some tests
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2019-10-21 16:25:15 +02:00 |
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lutram.ys
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gowin: Fix LUT RAM inference, add more models.
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2022-02-09 09:04:34 +01:00 |
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mux.ys
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Add opt_lut_ins pass. (#1673)
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2020-02-03 14:57:17 +01:00 |
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shifter.ys
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Add some tests
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2019-10-21 16:25:15 +02:00 |
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tribuf.ys
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Gowin: deal with active-low tristate (#2971)
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2021-08-20 21:21:06 +02:00 |
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