.. |
.gitignore
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Update .gitignore
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2020-10-01 15:53:14 +01:00 |
atom_type_signedness.ys
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Add missing is_signed to type_atom
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2021-02-11 15:05:38 +01:00 |
block_labels.ys
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Add check of begin/end labels for genblock
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2021-02-04 17:16:30 +01:00 |
bug656.v
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verilog: significant block scoping improvements
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2021-01-31 09:42:09 -05:00 |
bug656.ys
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verilog: significant block scoping improvements
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2021-01-31 09:42:09 -05:00 |
bug2037.ys
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test: add attribute-before-stmt test from @nakengelhardt
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2020-05-25 07:36:53 -07:00 |
bug2042-sv.ys
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tests: fix some test warnings
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2020-05-25 10:07:58 -07:00 |
bug2042.ys
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tests: update/extend task argument tests
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2020-05-13 10:11:45 -07:00 |
bug2493.ys
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verilog: significant block scoping improvements
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2021-01-31 09:42:09 -05:00 |
const_arst.ys
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add tests
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2020-09-28 18:16:08 +02:00 |
const_sr.ys
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add tests
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2020-09-28 18:16:08 +02:00 |
func_arg_mismatch_1.ys
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verilog: fix sizing of constant args for tasks/functions
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2021-02-21 15:44:43 -05:00 |
func_arg_mismatch_2.ys
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verilog: fix sizing of constant args for tasks/functions
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2021-02-21 15:44:43 -05:00 |
func_arg_mismatch_3.ys
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verilog: fix sizing of constant args for tasks/functions
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2021-02-21 15:44:43 -05:00 |
func_arg_mismatch_4.ys
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verilog: fix sizing of constant args for tasks/functions
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2021-02-21 15:44:43 -05:00 |
genblk_case.v
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verilog: significant block scoping improvements
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2021-01-31 09:42:09 -05:00 |
genblk_case.ys
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verilog: significant block scoping improvements
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2021-01-31 09:42:09 -05:00 |
genblk_port_decl.ys
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verlog: allow shadowing module ports within generate blocks
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2021-02-07 11:48:39 -05:00 |
hidden_decl.ys
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verilog: significant block scoping improvements
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2021-01-31 09:42:09 -05:00 |
macro_unapplied.ys
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verilog: error on macro invocations with missing argument lists
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2021-02-19 09:18:41 -05:00 |
macro_unapplied_newline.ys
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verilog: error on macro invocations with missing argument lists
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2021-02-19 09:18:41 -05:00 |
run-test.sh
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tests: Centralize test collection and Makefile generation
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2020-09-21 15:07:02 +02:00 |
task_attr.ys
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tests: attributes before task enable
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2020-05-14 16:09:41 -07:00 |
unnamed_block.ys
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verilog: significant block scoping improvements
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2021-01-31 09:42:09 -05:00 |
unnamed_genblk.sv
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verilog: significant block scoping improvements
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2021-01-31 09:42:09 -05:00 |
unnamed_genblk.ys
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verilog: significant block scoping improvements
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2021-01-31 09:42:09 -05:00 |
upto.ys
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techlibs/common: more robustness when *_WIDTH = 0
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2020-05-05 08:01:27 -07:00 |
wire_and_var.sv
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sv: fix support wire and var data type modifiers
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2021-01-20 09:16:21 -07:00 |
wire_and_var.ys
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sv: fix support wire and var data type modifiers
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2021-01-20 09:16:21 -07:00 |