yosys/techlibs
Clifford Wolf ec05242c27 Smaller default parameters in $mem simlib model 2015-02-15 00:20:05 +01:00
..
cmos Added test comments to techlibs/cmos/cmos_cells.lib 2014-01-29 10:51:02 +01:00
common Smaller default parameters in $mem simlib model 2015-02-15 00:20:05 +01:00
xilinx Disabled (unused) Xilinx tristate buffers 2015-02-04 16:33:59 +01:00
.gitignore added .gitignore files 2013-01-05 11:19:11 +01:00