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Disabled (unused) Xilinx tristate buffers

This commit is contained in:
Clifford Wolf 2015-02-04 16:33:59 +01:00
parent a8f4a099b5
commit 853e949c0e
1 changed files with 6 additions and 6 deletions
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12
techlibs/xilinx/cells_sim.v
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@ -23,13 +23,13 @@ module BUFG(output O, input I);
assign O = I;
endmodule
module OBUFT(output O, input I, T);
assign O = T ? 1'bz : I;
endmodule
// module OBUFT(output O, input I, T);
// assign O = T ? 1'bz : I;
// endmodule
module IOBUF(inout IO, output O, input I, T);
assign O = IO, IO = T ? 1'bz : I;
endmodule
// module IOBUF(inout IO, output O, input I, T);
// assign O = IO, IO = T ? 1'bz : I;
// endmodule
module INV(output O, input I);
assign O = !I;