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da076344cc
yosys
/
techlibs
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achronix
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speedster22i
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Miodrag Milanovic
50ef4561d4
Fix cells_sim.v for Achronix FPGA
2019-01-04 15:15:23 +01:00
..
cells_arith.v
Squelch trailing whitespace, including meta-whitespace
2018-03-11 16:03:41 +01:00
cells_map.v
Fix typographical and grammatical errors and inconsistencies.
2019-01-02 13:12:17 +00:00
cells_sim.v
Fix cells_sim.v for Achronix FPGA
2019-01-04 15:15:23 +01:00